2 * Copyright (C) 2010 Linaro Limited
4 * based on code from the following
5 * Copyright 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved.
6 * Copyright 2009-2010 Pegatron Corporation. All Rights Reserved.
7 * Copyright 2009-2010 Genesi USA, Inc. All Rights Reserved.
9 * The code contained herein is licensed under the GNU General Public
10 * License. You may obtain a copy of the GNU General Public License
11 * Version 2 or later at the following locations:
13 * http://www.opensource.org/licenses/gpl-license.html
14 * http://www.gnu.org/copyleft/gpl.html
17 #include <linux/init.h>
18 #include <linux/platform_device.h>
19 #include <linux/i2c.h>
20 #include <linux/gpio.h>
21 #include <linux/delay.h>
23 #include <linux/fsl_devices.h>
25 #include <mach/common.h>
26 #include <mach/hardware.h>
27 #include <mach/iomux-mx51.h>
29 #include <mach/mxc_ehci.h>
32 #include <asm/setup.h>
33 #include <asm/mach-types.h>
34 #include <asm/mach/arch.h>
35 #include <asm/mach/time.h>
37 #include "devices-imx51.h"
40 #define MX51_USB_PLL_DIV_24_MHZ 0x01
42 #define EFIKAMX_PCBID0 (2*32 + 16)
43 #define EFIKAMX_PCBID1 (2*32 + 17)
44 #define EFIKAMX_PCBID2 (2*32 + 11)
46 /* the pci ids pin have pull up. they're driven low according to board id */
47 #define MX51_PAD_PCBID0 IOMUX_PAD(0x518, 0x130, 3, 0x0, 0, PAD_CTL_PUS_100K_UP)
48 #define MX51_PAD_PCBID1 IOMUX_PAD(0x51C, 0x134, 3, 0x0, 0, PAD_CTL_PUS_100K_UP)
49 #define MX51_PAD_PCBID2 IOMUX_PAD(0x504, 0x128, 3, 0x0, 0, PAD_CTL_PUS_100K_UP)
51 static iomux_v3_cfg_t mx51efikamx_pads[] = {
53 MX51_PAD_UART1_RXD__UART1_RXD,
54 MX51_PAD_UART1_TXD__UART1_TXD,
55 MX51_PAD_UART1_RTS__UART1_RTS,
56 MX51_PAD_UART1_CTS__UART1_CTS,
64 #if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE)
65 static const struct imxuart_platform_data uart_pdata = {
66 .flags = IMXUART_HAVE_RTSCTS,
69 static inline void mxc_init_imx_uart(void)
71 imx51_add_imx_uart(0, &uart_pdata);
72 imx51_add_imx_uart(1, &uart_pdata);
73 imx51_add_imx_uart(2, &uart_pdata);
75 #else /* !SERIAL_IMX */
76 static inline void mxc_init_imx_uart(void)
79 #endif /* SERIAL_IMX */
81 /* This function is board specific as the bit mask for the plldiv will also
82 * be different for other Freescale SoCs, thus a common bitmask is not
83 * possible and cannot get place in /plat-mxc/ehci.c.
85 static int initialize_otg_port(struct platform_device *pdev)
88 void __iomem *usb_base;
89 void __iomem *usbother_base;
90 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
91 usbother_base = (void __iomem *)(usb_base + MX5_USBOTHER_REGS_OFFSET);
93 /* Set the PHY clock to 19.2MHz */
94 v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
95 v &= ~MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK;
96 v |= MX51_USB_PLL_DIV_24_MHZ;
97 __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
102 static struct mxc_usbh_platform_data dr_utmi_config = {
103 .init = initialize_otg_port,
104 .portsc = MXC_EHCI_UTMI_16BIT,
105 .flags = MXC_EHCI_INTERNAL_PHY,
108 /* PCBID2 PCBID1 PCBID0 STATE
114 static void __init mx51_efikamx_board_id(void)
118 /* things are taking time to settle */
121 gpio_request(EFIKAMX_PCBID0, "pcbid0");
122 gpio_direction_input(EFIKAMX_PCBID0);
123 gpio_request(EFIKAMX_PCBID1, "pcbid1");
124 gpio_direction_input(EFIKAMX_PCBID1);
125 gpio_request(EFIKAMX_PCBID2, "pcbid2");
126 gpio_direction_input(EFIKAMX_PCBID2);
128 id = gpio_get_value(EFIKAMX_PCBID0);
129 id |= gpio_get_value(EFIKAMX_PCBID1) << 1;
130 id |= gpio_get_value(EFIKAMX_PCBID2) << 2;
150 if ((system_rev == 0x10)
151 || (system_rev == 0x12)
152 || (system_rev == 0x14)) {
154 "EfikaMX: Unsupported board revision 1.%u!\n",
159 static void __init mxc_board_init(void)
161 mxc_iomux_v3_setup_multiple_pads(mx51efikamx_pads,
162 ARRAY_SIZE(mx51efikamx_pads));
163 mx51_efikamx_board_id();
164 mxc_register_device(&mxc_usbdr_host_device, &dr_utmi_config);
168 static void __init mx51_efikamx_timer_init(void)
170 mx51_clocks_init(32768, 24000000, 22579200, 24576000);
173 static struct sys_timer mxc_timer = {
174 .init = mx51_efikamx_timer_init,
177 MACHINE_START(MX51_EFIKAMX, "Genesi EfikaMX nettop")
178 /* Maintainer: Amit Kucheria <amit.kucheria@linaro.org> */
179 .boot_params = MX51_PHYS_OFFSET + 0x100,
180 .map_io = mx51_map_io,
181 .init_irq = mx51_init_irq,
182 .init_machine = mxc_board_init,