arch/arm/mach-mx3/devices.c

   1 /*
   2  * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
   3  * Copyright 2008 Sascha Hauer, kernel@pengutronix.de
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License
   7  * as published by the Free Software Foundation; either version 2
   8  * of the License, or (at your option) any later version.
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software
  16  * Foundation, Inc., 51 Franklin Street, Fifth Floor,
  17  * Boston, MA  02110-1301, USA.
  18  */
  19
  20 #include <linux/dma-mapping.h>
  21 #include <linux/module.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/serial.h>
  24 #include <linux/gpio.h>
  25 #include <mach/hardware.h>
  26 #include <mach/irqs.h>
  27 #include <mach/common.h>
  28 #include <mach/mx3_camera.h>
  29
  30 #include "devices.h"
  31
  32 /* GPIO port description */
  33 static struct mxc_gpio_port imx_gpio_ports[] = {
  34         {
  35                 .chip.label = "gpio-0",
  36                 .base = MX31_IO_ADDRESS(MX31_GPIO1_BASE_ADDR),
  37                 .irq = MX3x_INT_GPIO1,
  38                 .virtual_irq_start = MXC_GPIO_IRQ_START,
  39         }, {
  40                 .chip.label = "gpio-1",
  41                 .base = MX31_IO_ADDRESS(MX31_GPIO2_BASE_ADDR),
  42                 .irq = MX3x_INT_GPIO2,
  43                 .virtual_irq_start = MXC_GPIO_IRQ_START + 32,
  44         }, {
  45                 .chip.label = "gpio-2",
  46                 .base = MX31_IO_ADDRESS(MX31_GPIO3_BASE_ADDR),
  47                 .irq = MX3x_INT_GPIO3,
  48                 .virtual_irq_start = MXC_GPIO_IRQ_START + 64,
  49         }
  50 };
  51
  52 int __init imx3x_register_gpios(void)
  53 {
  54         return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
  55 }
  56
  57 #ifdef CONFIG_ARCH_MX31
  58 static struct resource mxcsdhc0_resources[] = {
  59         {
  60                 .start = MX31_MMC_SDHC1_BASE_ADDR,
  61                 .end = MX31_MMC_SDHC1_BASE_ADDR + SZ_16K - 1,
  62                 .flags = IORESOURCE_MEM,
  63         }, {
  64                 .start = MX31_INT_MMC_SDHC1,
  65                 .end = MX31_INT_MMC_SDHC1,
  66                 .flags = IORESOURCE_IRQ,
  67         },
  68 };
  69
  70 static struct resource mxcsdhc1_resources[] = {
  71         {
  72                 .start = MX31_MMC_SDHC2_BASE_ADDR,
  73                 .end = MX31_MMC_SDHC2_BASE_ADDR + SZ_16K - 1,
  74                 .flags = IORESOURCE_MEM,
  75         }, {
  76                 .start = MX31_INT_MMC_SDHC2,
  77                 .end = MX31_INT_MMC_SDHC2,
  78                 .flags = IORESOURCE_IRQ,
  79         },
  80 };
  81
  82 struct platform_device mxcsdhc_device0 = {
  83         .name = "mxc-mmc",
  84         .id = 0,
  85         .num_resources = ARRAY_SIZE(mxcsdhc0_resources),
  86         .resource = mxcsdhc0_resources,
  87 };
  88
  89 struct platform_device mxcsdhc_device1 = {
  90         .name = "mxc-mmc",
  91         .id = 1,
  92         .num_resources = ARRAY_SIZE(mxcsdhc1_resources),
  93         .resource = mxcsdhc1_resources,
  94 };
  95
  96 static struct resource rnga_resources[] = {
  97         {
  98                 .start = MX3x_RNGA_BASE_ADDR,
  99                 .end = MX3x_RNGA_BASE_ADDR + 0x28,
 100                 .flags = IORESOURCE_MEM,
 101         },
 102 };
 103
 104 struct platform_device mxc_rnga_device = {
 105         .name = "mxc_rnga",
 106         .id = -1,
 107         .num_resources = 1,
 108         .resource = rnga_resources,
 109 };
 110 #endif /* CONFIG_ARCH_MX31 */
 111
 112 /* i.MX31 Image Processing Unit */
 113
 114 /* The resource order is important! */
 115 static struct resource mx3_ipu_rsrc[] = {
 116         {
 117                 .start = MX3x_IPU_CTRL_BASE_ADDR,
 118                 .end = MX3x_IPU_CTRL_BASE_ADDR + 0x5F,
 119                 .flags = IORESOURCE_MEM,
 120         }, {
 121                 .start = MX3x_IPU_CTRL_BASE_ADDR + 0x88,
 122                 .end = MX3x_IPU_CTRL_BASE_ADDR + 0xB3,
 123                 .flags = IORESOURCE_MEM,
 124         }, {
 125                 .start = MX3x_INT_IPU_SYN,
 126                 .end = MX3x_INT_IPU_SYN,
 127                 .flags = IORESOURCE_IRQ,
 128         }, {
 129                 .start = MX3x_INT_IPU_ERR,
 130                 .end = MX3x_INT_IPU_ERR,
 131                 .flags = IORESOURCE_IRQ,
 132         },
 133 };
 134
 135 struct platform_device mx3_ipu = {
 136         .name = "ipu-core",
 137         .id = -1,
 138         .num_resources = ARRAY_SIZE(mx3_ipu_rsrc),
 139         .resource = mx3_ipu_rsrc,
 140 };
 141
 142 static struct resource fb_resources[] = {
 143         {
 144                 .start  = MX3x_IPU_CTRL_BASE_ADDR + 0xB4,
 145                 .end    = MX3x_IPU_CTRL_BASE_ADDR + 0x1BF,
 146                 .flags  = IORESOURCE_MEM,
 147         },
 148 };
 149
 150 struct platform_device mx3_fb = {
 151         .name           = "mx3_sdc_fb",
 152         .id             = -1,
 153         .num_resources  = ARRAY_SIZE(fb_resources),
 154         .resource       = fb_resources,
 155         .dev            = {
 156                 .coherent_dma_mask = DMA_BIT_MASK(32),
 157        },
 158 };
 159
 160 static struct resource camera_resources[] = {
 161         {
 162                 .start  = MX3x_IPU_CTRL_BASE_ADDR + 0x60,
 163                 .end    = MX3x_IPU_CTRL_BASE_ADDR + 0x87,
 164                 .flags  = IORESOURCE_MEM,
 165         },
 166 };
 167
 168 struct platform_device mx3_camera = {
 169         .name           = "mx3-camera",
 170         .id             = 0,
 171         .num_resources  = ARRAY_SIZE(camera_resources),
 172         .resource       = camera_resources,
 173         .dev            = {
 174                 .coherent_dma_mask = DMA_BIT_MASK(32),
 175         },
 176 };
 177
 178 static struct resource otg_resources[] = {
 179         {
 180                 .start  = MX31_OTG_BASE_ADDR,
 181                 .end    = MX31_OTG_BASE_ADDR + 0x1ff,
 182                 .flags  = IORESOURCE_MEM,
 183         }, {
 184                 .start  = MX31_INT_USB3,
 185                 .end    = MX31_INT_USB3,
 186                 .flags  = IORESOURCE_IRQ,
 187         },
 188 };
 189
 190 static u64 otg_dmamask = DMA_BIT_MASK(32);
 191
 192 /* OTG gadget device */
 193 struct platform_device mxc_otg_udc_device = {
 194         .name           = "fsl-usb2-udc",
 195         .id             = -1,
 196         .dev            = {
 197                 .dma_mask               = &otg_dmamask,
 198                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 199         },
 200         .resource       = otg_resources,
 201         .num_resources  = ARRAY_SIZE(otg_resources),
 202 };
 203
 204 /* OTG host */
 205 struct platform_device mxc_otg_host = {
 206         .name = "mxc-ehci",
 207         .id = 0,
 208         .dev = {
 209                 .coherent_dma_mask = 0xffffffff,
 210                 .dma_mask = &otg_dmamask,
 211         },
 212         .resource = otg_resources,
 213         .num_resources = ARRAY_SIZE(otg_resources),
 214 };
 215
 216 /* USB host 1 */
 217
 218 static u64 usbh1_dmamask = ~(u32)0;
 219
 220 static struct resource mxc_usbh1_resources[] = {
 221         {
 222                 .start = MX31_OTG_BASE_ADDR + 0x200,
 223                 .end = MX31_OTG_BASE_ADDR + 0x3ff,
 224                 .flags = IORESOURCE_MEM,
 225         }, {
 226                 .start = MX31_INT_USB1,
 227                 .end = MX31_INT_USB1,
 228                 .flags = IORESOURCE_IRQ,
 229         },
 230 };
 231
 232 struct platform_device mxc_usbh1 = {
 233         .name = "mxc-ehci",
 234         .id = 1,
 235         .dev = {
 236                 .coherent_dma_mask = 0xffffffff,
 237                 .dma_mask = &usbh1_dmamask,
 238         },
 239         .resource = mxc_usbh1_resources,
 240         .num_resources = ARRAY_SIZE(mxc_usbh1_resources),
 241 };
 242
 243 #ifdef CONFIG_ARCH_MX31
 244 /* USB host 2 */
 245 static u64 usbh2_dmamask = ~(u32)0;
 246
 247 static struct resource mxc_usbh2_resources[] = {
 248         {
 249                 .start = MX31_OTG_BASE_ADDR + 0x400,
 250                 .end = MX31_OTG_BASE_ADDR + 0x5ff,
 251                 .flags = IORESOURCE_MEM,
 252         }, {
 253                 .start = MX31_INT_USB2,
 254                 .end = MX31_INT_USB2,
 255                 .flags = IORESOURCE_IRQ,
 256         },
 257 };
 258
 259 struct platform_device mxc_usbh2 = {
 260         .name = "mxc-ehci",
 261         .id = 2,
 262         .dev = {
 263                 .coherent_dma_mask = 0xffffffff,
 264                 .dma_mask = &usbh2_dmamask,
 265         },
 266         .resource = mxc_usbh2_resources,
 267         .num_resources = ARRAY_SIZE(mxc_usbh2_resources),
 268 };
 269 #endif
 270
 271 static struct resource imx_wdt_resources[] = {
 272         {
 273                 .flags = IORESOURCE_MEM,
 274         },
 275 };
 276
 277 struct platform_device imx_wdt_device0 = {
 278         .name           = "imx2-wdt",
 279         .id             = 0,
 280         .num_resources  = ARRAY_SIZE(imx_wdt_resources),
 281         .resource       = imx_wdt_resources,
 282 };
 283
 284 static struct resource imx_rtc_resources[] = {
 285         {
 286                 .start  = MX31_RTC_BASE_ADDR,
 287                 .end    = MX31_RTC_BASE_ADDR + 0x3fff,
 288                 .flags  = IORESOURCE_MEM,
 289         },
 290         {
 291                 .start  = MX31_INT_RTC,
 292                 .flags  = IORESOURCE_IRQ,
 293         },
 294 };
 295
 296 struct platform_device imx_rtc_device0 = {
 297         .name           = "mxc_rtc",
 298         .id             = -1,
 299         .num_resources  = ARRAY_SIZE(imx_rtc_resources),
 300         .resource       = imx_rtc_resources,
 301 };
 302
 303 static struct resource imx_kpp_resources[] = {
 304         {
 305                 .start  = MX3x_KPP_BASE_ADDR,
 306                 .end    = MX3x_KPP_BASE_ADDR + 0xf,
 307                 .flags  = IORESOURCE_MEM
 308         }, {
 309                 .start  = MX3x_INT_KPP,
 310                 .end    = MX3x_INT_KPP,
 311                 .flags  = IORESOURCE_IRQ,
 312         },
 313 };
 314
 315 struct platform_device imx_kpp_device = {
 316         .name = "imx-keypad",
 317         .id = -1,
 318         .num_resources = ARRAY_SIZE(imx_kpp_resources),
 319         .resource = imx_kpp_resources,
 320 };
 321
 322 static int __init mx3_devices_init(void)
 323 {
 324 #if defined(CONFIG_ARCH_MX31)
 325         if (cpu_is_mx31()) {
 326                 imx_wdt_resources[0].start = MX31_WDOG_BASE_ADDR;
 327                 imx_wdt_resources[0].end = MX31_WDOG_BASE_ADDR + 0x3fff;
 328                 mxc_register_device(&mxc_rnga_device, NULL);
 329         }
 330 #endif
 331 #if defined(CONFIG_ARCH_MX35)
 332         if (cpu_is_mx35()) {
 333                 imx_gpio_ports[0].base = MX35_IO_ADDRESS(MX35_GPIO1_BASE_ADDR),
 334                 imx_gpio_ports[1].base = MX35_IO_ADDRESS(MX35_GPIO2_BASE_ADDR),
 335                 imx_gpio_ports[2].base = MX35_IO_ADDRESS(MX35_GPIO3_BASE_ADDR),
 336                 otg_resources[0].start = MX35_OTG_BASE_ADDR;
 337                 otg_resources[0].end = MX35_OTG_BASE_ADDR + 0x1ff;
 338                 otg_resources[1].start = MX35_INT_USBOTG;
 339                 otg_resources[1].end = MX35_INT_USBOTG;
 340                 mxc_usbh1_resources[0].start = MX35_OTG_BASE_ADDR + 0x400;
 341                 mxc_usbh1_resources[0].end = MX35_OTG_BASE_ADDR + 0x5ff;
 342                 mxc_usbh1_resources[1].start = MX35_INT_USBHS;
 343                 mxc_usbh1_resources[1].end = MX35_INT_USBHS;
 344                 imx_wdt_resources[0].start = MX35_WDOG_BASE_ADDR;
 345                 imx_wdt_resources[0].end = MX35_WDOG_BASE_ADDR + 0x3fff;
 346         }
 347 #endif
 348
 349         return 0;
 350 }
 351
 352 subsys_initcall(mx3_devices_init);