1 /* linux/arch/arm/mach-msm/devices.c
3 * Copyright (C) 2008 Google, Inc.
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
16 #include <linux/kernel.h>
17 #include <linux/platform_device.h>
19 #include <mach/irqs.h>
20 #include <mach/msm_iomap.h>
23 #include <asm/mach/flash.h>
24 #include <linux/mtd/nand.h>
25 #include <linux/mtd/partitions.h>
31 static struct resource resources_uart1[] = {
35 .flags = IORESOURCE_IRQ,
38 .start = MSM_UART1_PHYS,
39 .end = MSM_UART1_PHYS + MSM_UART1_SIZE - 1,
40 .flags = IORESOURCE_MEM,
41 .name = "uart_resource"
45 static struct resource resources_uart2[] = {
49 .flags = IORESOURCE_IRQ,
52 .start = MSM_UART2_PHYS,
53 .end = MSM_UART2_PHYS + MSM_UART2_SIZE - 1,
54 .flags = IORESOURCE_MEM,
55 .name = "uart_resource"
59 static struct resource resources_uart3[] = {
63 .flags = IORESOURCE_IRQ,
66 .start = MSM_UART3_PHYS,
67 .end = MSM_UART3_PHYS + MSM_UART3_SIZE - 1,
68 .flags = IORESOURCE_MEM,
69 .name = "uart_resource"
73 struct platform_device msm_device_uart1 = {
76 .num_resources = ARRAY_SIZE(resources_uart1),
77 .resource = resources_uart1,
80 struct platform_device msm_device_uart2 = {
83 .num_resources = ARRAY_SIZE(resources_uart2),
84 .resource = resources_uart2,
87 struct platform_device msm_device_uart3 = {
90 .num_resources = ARRAY_SIZE(resources_uart3),
91 .resource = resources_uart3,
94 static struct resource resources_i2c[] = {
96 .start = MSM_I2C_PHYS,
97 .end = MSM_I2C_PHYS + MSM_I2C_SIZE - 1,
98 .flags = IORESOURCE_MEM,
101 .start = INT_PWB_I2C,
103 .flags = IORESOURCE_IRQ,
107 struct platform_device msm_device_i2c = {
110 .num_resources = ARRAY_SIZE(resources_i2c),
111 .resource = resources_i2c,
114 static struct resource resources_hsusb[] = {
116 .start = MSM_HSUSB_PHYS,
117 .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE,
118 .flags = IORESOURCE_MEM,
123 .flags = IORESOURCE_IRQ,
127 struct platform_device msm_device_hsusb = {
130 .num_resources = ARRAY_SIZE(resources_hsusb),
131 .resource = resources_hsusb,
133 .coherent_dma_mask = 0xffffffff,
137 struct flash_platform_data msm_nand_data = {
142 static struct resource resources_nand[] = {
146 .flags = IORESOURCE_DMA,
150 struct platform_device msm_device_nand = {
153 .num_resources = ARRAY_SIZE(resources_nand),
154 .resource = resources_nand,
156 .platform_data = &msm_nand_data,
160 struct platform_device msm_device_smd = {
165 static struct resource resources_sdc1[] = {
167 .start = MSM_SDC1_PHYS,
168 .end = MSM_SDC1_PHYS + MSM_SDC1_SIZE - 1,
169 .flags = IORESOURCE_MEM,
174 .flags = IORESOURCE_IRQ,
180 .flags = IORESOURCE_IRQ,
184 .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED,
190 .flags = IORESOURCE_DMA,
194 static struct resource resources_sdc2[] = {
196 .start = MSM_SDC2_PHYS,
197 .end = MSM_SDC2_PHYS + MSM_SDC2_SIZE - 1,
198 .flags = IORESOURCE_MEM,
203 .flags = IORESOURCE_IRQ,
209 .flags = IORESOURCE_IRQ,
213 .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED,
219 .flags = IORESOURCE_DMA,
223 static struct resource resources_sdc3[] = {
225 .start = MSM_SDC3_PHYS,
226 .end = MSM_SDC3_PHYS + MSM_SDC3_SIZE - 1,
227 .flags = IORESOURCE_MEM,
232 .flags = IORESOURCE_IRQ,
238 .flags = IORESOURCE_IRQ,
242 .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED,
248 .flags = IORESOURCE_DMA,
252 static struct resource resources_sdc4[] = {
254 .start = MSM_SDC4_PHYS,
255 .end = MSM_SDC4_PHYS + MSM_SDC4_SIZE - 1,
256 .flags = IORESOURCE_MEM,
261 .flags = IORESOURCE_IRQ,
267 .flags = IORESOURCE_IRQ,
271 .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED,
277 .flags = IORESOURCE_DMA,
281 struct platform_device msm_device_sdc1 = {
284 .num_resources = ARRAY_SIZE(resources_sdc1),
285 .resource = resources_sdc1,
287 .coherent_dma_mask = 0xffffffff,
291 struct platform_device msm_device_sdc2 = {
294 .num_resources = ARRAY_SIZE(resources_sdc2),
295 .resource = resources_sdc2,
297 .coherent_dma_mask = 0xffffffff,
301 struct platform_device msm_device_sdc3 = {
304 .num_resources = ARRAY_SIZE(resources_sdc3),
305 .resource = resources_sdc3,
307 .coherent_dma_mask = 0xffffffff,
311 struct platform_device msm_device_sdc4 = {
314 .num_resources = ARRAY_SIZE(resources_sdc4),
315 .resource = resources_sdc4,
317 .coherent_dma_mask = 0xffffffff,
321 static struct platform_device *msm_sdcc_devices[] __initdata = {
328 int __init msm_add_sdcc(unsigned int controller,
329 struct msm_mmc_platform_data *plat,
330 unsigned int stat_irq, unsigned long stat_irq_flags)
332 struct platform_device *pdev;
333 struct resource *res;
335 if (controller < 1 || controller > 4)
338 pdev = msm_sdcc_devices[controller-1];
339 pdev->dev.platform_data = plat;
341 res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "status_irq");
345 res->start = res->end = stat_irq;
346 res->flags &= ~IORESOURCE_DISABLED;
347 res->flags |= stat_irq_flags;
350 return platform_device_register(pdev);
353 static struct resource resources_mddi0[] = {
355 .start = MSM_PMDH_PHYS,
356 .end = MSM_PMDH_PHYS + MSM_PMDH_SIZE - 1,
357 .flags = IORESOURCE_MEM,
360 .start = INT_MDDI_PRI,
362 .flags = IORESOURCE_IRQ,
366 static struct resource resources_mddi1[] = {
368 .start = MSM_EMDH_PHYS,
369 .end = MSM_EMDH_PHYS + MSM_EMDH_SIZE - 1,
370 .flags = IORESOURCE_MEM,
373 .start = INT_MDDI_EXT,
375 .flags = IORESOURCE_IRQ,
379 struct platform_device msm_device_mddi0 = {
382 .num_resources = ARRAY_SIZE(resources_mddi0),
383 .resource = resources_mddi0,
385 .coherent_dma_mask = 0xffffffff,
389 struct platform_device msm_device_mddi1 = {
392 .num_resources = ARRAY_SIZE(resources_mddi1),
393 .resource = resources_mddi1,
395 .coherent_dma_mask = 0xffffffff,
399 static struct resource resources_mdp[] = {
401 .start = MSM_MDP_PHYS,
402 .end = MSM_MDP_PHYS + MSM_MDP_SIZE - 1,
404 .flags = IORESOURCE_MEM
409 .flags = IORESOURCE_IRQ,
413 struct platform_device msm_device_mdp = {
416 .num_resources = ARRAY_SIZE(resources_mdp),
417 .resource = resources_mdp,
420 struct clk msm_clocks_7x01a[] = {
421 CLK_PCOM("adm_clk", ADM_CLK, NULL, 0),
422 CLK_PCOM("adsp_clk", ADSP_CLK, NULL, 0),
423 CLK_PCOM("ebi1_clk", EBI1_CLK, NULL, 0),
424 CLK_PCOM("ebi2_clk", EBI2_CLK, NULL, 0),
425 CLK_PCOM("ecodec_clk", ECODEC_CLK, NULL, 0),
426 CLK_PCOM("emdh_clk", EMDH_CLK, NULL, OFF),
427 CLK_PCOM("gp_clk", GP_CLK, NULL, 0),
428 CLK_PCOM("grp_clk", GRP_3D_CLK, NULL, OFF),
429 CLK_PCOM("i2c_clk", I2C_CLK, &msm_device_i2c.dev, 0),
430 CLK_PCOM("icodec_rx_clk", ICODEC_RX_CLK, NULL, 0),
431 CLK_PCOM("icodec_tx_clk", ICODEC_TX_CLK, NULL, 0),
432 CLK_PCOM("imem_clk", IMEM_CLK, NULL, OFF),
433 CLK_PCOM("mdc_clk", MDC_CLK, NULL, 0),
434 CLK_PCOM("mdp_clk", MDP_CLK, NULL, OFF),
435 CLK_PCOM("pbus_clk", PBUS_CLK, NULL, 0),
436 CLK_PCOM("pcm_clk", PCM_CLK, NULL, 0),
437 CLK_PCOM("mddi_clk", PMDH_CLK, NULL, OFF | CLK_MINMAX),
438 CLK_PCOM("sdac_clk", SDAC_CLK, NULL, OFF),
439 CLK_PCOM("sdc_clk", SDC1_CLK, &msm_device_sdc1.dev, OFF),
440 CLK_PCOM("sdc_pclk", SDC1_P_CLK, &msm_device_sdc1.dev, OFF),
441 CLK_PCOM("sdc_clk", SDC2_CLK, &msm_device_sdc2.dev, OFF),
442 CLK_PCOM("sdc_pclk", SDC2_P_CLK, &msm_device_sdc2.dev, OFF),
443 CLK_PCOM("sdc_clk", SDC3_CLK, &msm_device_sdc3.dev, OFF),
444 CLK_PCOM("sdc_pclk", SDC3_P_CLK, &msm_device_sdc3.dev, OFF),
445 CLK_PCOM("sdc_clk", SDC4_CLK, &msm_device_sdc4.dev, OFF),
446 CLK_PCOM("sdc_pclk", SDC4_P_CLK, &msm_device_sdc4.dev, OFF),
447 CLK_PCOM("tsif_clk", TSIF_CLK, NULL, 0),
448 CLK_PCOM("tsif_ref_clk", TSIF_REF_CLK, NULL, 0),
449 CLK_PCOM("tv_dac_clk", TV_DAC_CLK, NULL, 0),
450 CLK_PCOM("tv_enc_clk", TV_ENC_CLK, NULL, 0),
451 CLK_PCOM("uart_clk", UART1_CLK, &msm_device_uart1.dev, OFF),
452 CLK_PCOM("uart_clk", UART2_CLK, &msm_device_uart2.dev, 0),
453 CLK_PCOM("uart_clk", UART3_CLK, &msm_device_uart3.dev, OFF),
454 CLK_PCOM("uart1dm_clk", UART1DM_CLK, NULL, OFF),
455 CLK_PCOM("uart2dm_clk", UART2DM_CLK, NULL, 0),
456 CLK_PCOM("usb_hs_clk", USB_HS_CLK, &msm_device_hsusb.dev, OFF),
457 CLK_PCOM("usb_hs_pclk", USB_HS_P_CLK, &msm_device_hsusb.dev, OFF),
458 CLK_PCOM("usb_otg_clk", USB_OTG_CLK, NULL, 0),
459 CLK_PCOM("vdc_clk", VDC_CLK, NULL, OFF ),
460 CLK_PCOM("vfe_clk", VFE_CLK, NULL, OFF),
461 CLK_PCOM("vfe_mdc_clk", VFE_MDC_CLK, NULL, OFF),
464 unsigned msm_num_clocks_7x01a = ARRAY_SIZE(msm_clocks_7x01a);