arch/arm/mach-kirkwood/common.c

   1 /*
   2  * arch/arm/mach-kirkwood/common.c
   3  *
   4  * Core functions for Marvell Kirkwood SoCs
   5  *
   6  * This file is licensed under the terms of the GNU General Public
   7  * License version 2.  This program is licensed "as is" without any
   8  * warranty of any kind, whether express or implied.
   9  */
  10
  11 #include <linux/kernel.h>
  12 #include <linux/init.h>
  13 #include <linux/platform_device.h>
  14 #include <linux/serial_8250.h>
  15 #include <linux/mbus.h>
  16 #include <linux/mv643xx_eth.h>
  17 #include <linux/mv643xx_i2c.h>
  18 #include <linux/ata_platform.h>
  19 #include <linux/mtd/nand.h>
  20 #include <linux/spi/orion_spi.h>
  21 #include <net/dsa.h>
  22 #include <asm/page.h>
  23 #include <asm/timex.h>
  24 #include <asm/kexec.h>
  25 #include <asm/mach/map.h>
  26 #include <asm/mach/time.h>
  27 #include <mach/kirkwood.h>
  28 #include <mach/bridge-regs.h>
  29 #include <plat/audio.h>
  30 #include <plat/cache-feroceon-l2.h>
  31 #include <plat/ehci-orion.h>
  32 #include <plat/mvsdio.h>
  33 #include <plat/mv_xor.h>
  34 #include <plat/orion_nand.h>
  35 #include <plat/orion_wdt.h>
  36 #include <plat/common.h>
  37 #include <plat/time.h>
  38 #include "common.h"
  39
  40 /*****************************************************************************
  41  * I/O Address Mapping
  42  ****************************************************************************/
  43 static struct map_desc kirkwood_io_desc[] __initdata = {
  44         {
  45                 .virtual        = KIRKWOOD_PCIE_IO_VIRT_BASE,
  46                 .pfn            = __phys_to_pfn(KIRKWOOD_PCIE_IO_PHYS_BASE),
  47                 .length         = KIRKWOOD_PCIE_IO_SIZE,
  48                 .type           = MT_DEVICE,
  49         }, {
  50                 .virtual        = KIRKWOOD_PCIE1_IO_VIRT_BASE,
  51                 .pfn            = __phys_to_pfn(KIRKWOOD_PCIE1_IO_PHYS_BASE),
  52                 .length         = KIRKWOOD_PCIE1_IO_SIZE,
  53                 .type           = MT_DEVICE,
  54         }, {
  55                 .virtual        = KIRKWOOD_REGS_VIRT_BASE,
  56                 .pfn            = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE),
  57                 .length         = KIRKWOOD_REGS_SIZE,
  58                 .type           = MT_DEVICE,
  59         },
  60 };
  61
  62 void __init kirkwood_map_io(void)
  63 {
  64         iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
  65 }
  66
  67 /*
  68  * Default clock control bits.  Any bit _not_ set in this variable
  69  * will be cleared from the hardware after platform devices have been
  70  * registered.  Some reserved bits must be set to 1.
  71  */
  72 unsigned int kirkwood_clk_ctrl = CGC_DUNIT | CGC_RESERVED;
  73
  74
  75 /*****************************************************************************
  76  * EHCI
  77  ****************************************************************************/
  78 static struct orion_ehci_data kirkwood_ehci_data = {
  79         .dram           = &kirkwood_mbus_dram_info,
  80         .phy_version    = EHCI_PHY_NA,
  81 };
  82
  83 static u64 ehci_dmamask = DMA_BIT_MASK(32);
  84
  85
  86 /*****************************************************************************
  87  * EHCI0
  88  ****************************************************************************/
  89 static struct resource kirkwood_ehci_resources[] = {
  90         {
  91                 .start  = USB_PHYS_BASE,
  92                 .end    = USB_PHYS_BASE + SZ_4K - 1,
  93                 .flags  = IORESOURCE_MEM,
  94         }, {
  95                 .start  = IRQ_KIRKWOOD_USB,
  96                 .end    = IRQ_KIRKWOOD_USB,
  97                 .flags  = IORESOURCE_IRQ,
  98         },
  99 };
 100
 101 static struct platform_device kirkwood_ehci = {
 102         .name           = "orion-ehci",
 103         .id             = 0,
 104         .dev            = {
 105                 .dma_mask               = &ehci_dmamask,
 106                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 107                 .platform_data          = &kirkwood_ehci_data,
 108         },
 109         .resource       = kirkwood_ehci_resources,
 110         .num_resources  = ARRAY_SIZE(kirkwood_ehci_resources),
 111 };
 112
 113 void __init kirkwood_ehci_init(void)
 114 {
 115         kirkwood_clk_ctrl |= CGC_USB0;
 116         platform_device_register(&kirkwood_ehci);
 117 }
 118
 119
 120 /*****************************************************************************
 121  * GE00
 122  ****************************************************************************/
 123 struct mv643xx_eth_shared_platform_data kirkwood_ge00_shared_data = {
 124         .dram           = &kirkwood_mbus_dram_info,
 125 };
 126
 127 static struct resource kirkwood_ge00_shared_resources[] = {
 128         {
 129                 .name   = "ge00 base",
 130                 .start  = GE00_PHYS_BASE + 0x2000,
 131                 .end    = GE00_PHYS_BASE + SZ_16K - 1,
 132                 .flags  = IORESOURCE_MEM,
 133         }, {
 134                 .name   = "ge00 err irq",
 135                 .start  = IRQ_KIRKWOOD_GE00_ERR,
 136                 .end    = IRQ_KIRKWOOD_GE00_ERR,
 137                 .flags  = IORESOURCE_IRQ,
 138         },
 139 };
 140
 141 static struct platform_device kirkwood_ge00_shared = {
 142         .name           = MV643XX_ETH_SHARED_NAME,
 143         .id             = 0,
 144         .dev            = {
 145                 .platform_data  = &kirkwood_ge00_shared_data,
 146         },
 147         .num_resources  = ARRAY_SIZE(kirkwood_ge00_shared_resources),
 148         .resource       = kirkwood_ge00_shared_resources,
 149 };
 150
 151 static struct resource kirkwood_ge00_resources[] = {
 152         {
 153                 .name   = "ge00 irq",
 154                 .start  = IRQ_KIRKWOOD_GE00_SUM,
 155                 .end    = IRQ_KIRKWOOD_GE00_SUM,
 156                 .flags  = IORESOURCE_IRQ,
 157         },
 158 };
 159
 160 static struct platform_device kirkwood_ge00 = {
 161         .name           = MV643XX_ETH_NAME,
 162         .id             = 0,
 163         .num_resources  = 1,
 164         .resource       = kirkwood_ge00_resources,
 165         .dev            = {
 166                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 167         },
 168 };
 169
 170 void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
 171 {
 172         kirkwood_clk_ctrl |= CGC_GE0;
 173         eth_data->shared = &kirkwood_ge00_shared;
 174         kirkwood_ge00.dev.platform_data = eth_data;
 175
 176         platform_device_register(&kirkwood_ge00_shared);
 177         platform_device_register(&kirkwood_ge00);
 178 }
 179
 180
 181 /*****************************************************************************
 182  * GE01
 183  ****************************************************************************/
 184 struct mv643xx_eth_shared_platform_data kirkwood_ge01_shared_data = {
 185         .dram           = &kirkwood_mbus_dram_info,
 186         .shared_smi     = &kirkwood_ge00_shared,
 187 };
 188
 189 static struct resource kirkwood_ge01_shared_resources[] = {
 190         {
 191                 .name   = "ge01 base",
 192                 .start  = GE01_PHYS_BASE + 0x2000,
 193                 .end    = GE01_PHYS_BASE + SZ_16K - 1,
 194                 .flags  = IORESOURCE_MEM,
 195         }, {
 196                 .name   = "ge01 err irq",
 197                 .start  = IRQ_KIRKWOOD_GE01_ERR,
 198                 .end    = IRQ_KIRKWOOD_GE01_ERR,
 199                 .flags  = IORESOURCE_IRQ,
 200         },
 201 };
 202
 203 static struct platform_device kirkwood_ge01_shared = {
 204         .name           = MV643XX_ETH_SHARED_NAME,
 205         .id             = 1,
 206         .dev            = {
 207                 .platform_data  = &kirkwood_ge01_shared_data,
 208         },
 209         .num_resources  = ARRAY_SIZE(kirkwood_ge01_shared_resources),
 210         .resource       = kirkwood_ge01_shared_resources,
 211 };
 212
 213 static struct resource kirkwood_ge01_resources[] = {
 214         {
 215                 .name   = "ge01 irq",
 216                 .start  = IRQ_KIRKWOOD_GE01_SUM,
 217                 .end    = IRQ_KIRKWOOD_GE01_SUM,
 218                 .flags  = IORESOURCE_IRQ,
 219         },
 220 };
 221
 222 static struct platform_device kirkwood_ge01 = {
 223         .name           = MV643XX_ETH_NAME,
 224         .id             = 1,
 225         .num_resources  = 1,
 226         .resource       = kirkwood_ge01_resources,
 227         .dev            = {
 228                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 229         },
 230 };
 231
 232 void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
 233 {
 234         kirkwood_clk_ctrl |= CGC_GE1;
 235         eth_data->shared = &kirkwood_ge01_shared;
 236         kirkwood_ge01.dev.platform_data = eth_data;
 237
 238         platform_device_register(&kirkwood_ge01_shared);
 239         platform_device_register(&kirkwood_ge01);
 240 }
 241
 242
 243 /*****************************************************************************
 244  * Ethernet switch
 245  ****************************************************************************/
 246 static struct resource kirkwood_switch_resources[] = {
 247         {
 248                 .start  = 0,
 249                 .end    = 0,
 250                 .flags  = IORESOURCE_IRQ,
 251         },
 252 };
 253
 254 static struct platform_device kirkwood_switch_device = {
 255         .name           = "dsa",
 256         .id             = 0,
 257         .num_resources  = 0,
 258         .resource       = kirkwood_switch_resources,
 259 };
 260
 261 void __init kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq)
 262 {
 263         int i;
 264
 265         if (irq != NO_IRQ) {
 266                 kirkwood_switch_resources[0].start = irq;
 267                 kirkwood_switch_resources[0].end = irq;
 268                 kirkwood_switch_device.num_resources = 1;
 269         }
 270
 271         d->netdev = &kirkwood_ge00.dev;
 272         for (i = 0; i < d->nr_chips; i++)
 273                 d->chip[i].mii_bus = &kirkwood_ge00_shared.dev;
 274         kirkwood_switch_device.dev.platform_data = d;
 275
 276         platform_device_register(&kirkwood_switch_device);
 277 }
 278
 279
 280 /*****************************************************************************
 281  * NAND flash
 282  ****************************************************************************/
 283 static struct resource kirkwood_nand_resource = {
 284         .flags          = IORESOURCE_MEM,
 285         .start          = KIRKWOOD_NAND_MEM_PHYS_BASE,
 286         .end            = KIRKWOOD_NAND_MEM_PHYS_BASE +
 287                                 KIRKWOOD_NAND_MEM_SIZE - 1,
 288 };
 289
 290 static struct orion_nand_data kirkwood_nand_data = {
 291         .cle            = 0,
 292         .ale            = 1,
 293         .width          = 8,
 294 };
 295
 296 static struct platform_device kirkwood_nand_flash = {
 297         .name           = "orion_nand",
 298         .id             = -1,
 299         .dev            = {
 300                 .platform_data  = &kirkwood_nand_data,
 301         },
 302         .resource       = &kirkwood_nand_resource,
 303         .num_resources  = 1,
 304 };
 305
 306 void __init kirkwood_nand_init(struct mtd_partition *parts, int nr_parts,
 307                                int chip_delay)
 308 {
 309         kirkwood_clk_ctrl |= CGC_RUNIT;
 310         kirkwood_nand_data.parts = parts;
 311         kirkwood_nand_data.nr_parts = nr_parts;
 312         kirkwood_nand_data.chip_delay = chip_delay;
 313         platform_device_register(&kirkwood_nand_flash);
 314 }
 315
 316 void __init kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts,
 317                                    int (*dev_ready)(struct mtd_info *))
 318 {
 319         kirkwood_clk_ctrl |= CGC_RUNIT;
 320         kirkwood_nand_data.parts = parts;
 321         kirkwood_nand_data.nr_parts = nr_parts;
 322         kirkwood_nand_data.dev_ready = dev_ready;
 323         platform_device_register(&kirkwood_nand_flash);
 324 }
 325
 326 /*****************************************************************************
 327  * SoC RTC
 328  ****************************************************************************/
 329 static void __init kirkwood_rtc_init(void)
 330 {
 331         orion_rtc_init(RTC_PHYS_BASE, NO_IRQ);
 332 }
 333
 334
 335 /*****************************************************************************
 336  * SATA
 337  ****************************************************************************/
 338 static struct resource kirkwood_sata_resources[] = {
 339         {
 340                 .name   = "sata base",
 341                 .start  = SATA_PHYS_BASE,
 342                 .end    = SATA_PHYS_BASE + 0x5000 - 1,
 343                 .flags  = IORESOURCE_MEM,
 344         }, {
 345                 .name   = "sata irq",
 346                 .start  = IRQ_KIRKWOOD_SATA,
 347                 .end    = IRQ_KIRKWOOD_SATA,
 348                 .flags  = IORESOURCE_IRQ,
 349         },
 350 };
 351
 352 static struct platform_device kirkwood_sata = {
 353         .name           = "sata_mv",
 354         .id             = 0,
 355         .dev            = {
 356                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 357         },
 358         .num_resources  = ARRAY_SIZE(kirkwood_sata_resources),
 359         .resource       = kirkwood_sata_resources,
 360 };
 361
 362 void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
 363 {
 364         kirkwood_clk_ctrl |= CGC_SATA0;
 365         if (sata_data->n_ports > 1)
 366                 kirkwood_clk_ctrl |= CGC_SATA1;
 367         sata_data->dram = &kirkwood_mbus_dram_info;
 368         kirkwood_sata.dev.platform_data = sata_data;
 369         platform_device_register(&kirkwood_sata);
 370 }
 371
 372
 373 /*****************************************************************************
 374  * SD/SDIO/MMC
 375  ****************************************************************************/
 376 static struct resource mvsdio_resources[] = {
 377         [0] = {
 378                 .start  = SDIO_PHYS_BASE,
 379                 .end    = SDIO_PHYS_BASE + SZ_1K - 1,
 380                 .flags  = IORESOURCE_MEM,
 381         },
 382         [1] = {
 383                 .start  = IRQ_KIRKWOOD_SDIO,
 384                 .end    = IRQ_KIRKWOOD_SDIO,
 385                 .flags  = IORESOURCE_IRQ,
 386         },
 387 };
 388
 389 static u64 mvsdio_dmamask = DMA_BIT_MASK(32);
 390
 391 static struct platform_device kirkwood_sdio = {
 392         .name           = "mvsdio",
 393         .id             = -1,
 394         .dev            = {
 395                 .dma_mask = &mvsdio_dmamask,
 396                 .coherent_dma_mask = DMA_BIT_MASK(32),
 397         },
 398         .num_resources  = ARRAY_SIZE(mvsdio_resources),
 399         .resource       = mvsdio_resources,
 400 };
 401
 402 void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
 403 {
 404         u32 dev, rev;
 405
 406         kirkwood_pcie_id(&dev, &rev);
 407         if (rev == 0 && dev != MV88F6282_DEV_ID) /* catch all Kirkwood Z0's */
 408                 mvsdio_data->clock = 100000000;
 409         else
 410                 mvsdio_data->clock = 200000000;
 411         mvsdio_data->dram = &kirkwood_mbus_dram_info;
 412         kirkwood_clk_ctrl |= CGC_SDIO;
 413         kirkwood_sdio.dev.platform_data = mvsdio_data;
 414         platform_device_register(&kirkwood_sdio);
 415 }
 416
 417
 418 /*****************************************************************************
 419  * SPI
 420  ****************************************************************************/
 421 static struct orion_spi_info kirkwood_spi_plat_data = {
 422 };
 423
 424 static struct resource kirkwood_spi_resources[] = {
 425         {
 426                 .start  = SPI_PHYS_BASE,
 427                 .end    = SPI_PHYS_BASE + SZ_512 - 1,
 428                 .flags  = IORESOURCE_MEM,
 429         },
 430 };
 431
 432 static struct platform_device kirkwood_spi = {
 433         .name           = "orion_spi",
 434         .id             = 0,
 435         .resource       = kirkwood_spi_resources,
 436         .dev            = {
 437                 .platform_data  = &kirkwood_spi_plat_data,
 438         },
 439         .num_resources  = ARRAY_SIZE(kirkwood_spi_resources),
 440 };
 441
 442 void __init kirkwood_spi_init()
 443 {
 444         kirkwood_clk_ctrl |= CGC_RUNIT;
 445         platform_device_register(&kirkwood_spi);
 446 }
 447
 448
 449 /*****************************************************************************
 450  * I2C
 451  ****************************************************************************/
 452 static struct mv64xxx_i2c_pdata kirkwood_i2c_pdata = {
 453         .freq_m         = 8, /* assumes 166 MHz TCLK */
 454         .freq_n         = 3,
 455         .timeout        = 1000, /* Default timeout of 1 second */
 456 };
 457
 458 static struct resource kirkwood_i2c_resources[] = {
 459         {
 460                 .start  = I2C_PHYS_BASE,
 461                 .end    = I2C_PHYS_BASE + 0x1f,
 462                 .flags  = IORESOURCE_MEM,
 463         }, {
 464                 .start  = IRQ_KIRKWOOD_TWSI,
 465                 .end    = IRQ_KIRKWOOD_TWSI,
 466                 .flags  = IORESOURCE_IRQ,
 467         },
 468 };
 469
 470 static struct platform_device kirkwood_i2c = {
 471         .name           = MV64XXX_I2C_CTLR_NAME,
 472         .id             = 0,
 473         .num_resources  = ARRAY_SIZE(kirkwood_i2c_resources),
 474         .resource       = kirkwood_i2c_resources,
 475         .dev            = {
 476                 .platform_data  = &kirkwood_i2c_pdata,
 477         },
 478 };
 479
 480 void __init kirkwood_i2c_init(void)
 481 {
 482         platform_device_register(&kirkwood_i2c);
 483 }
 484
 485
 486 /*****************************************************************************
 487  * UART0
 488  ****************************************************************************/
 489
 490 void __init kirkwood_uart0_init(void)
 491 {
 492         orion_uart0_init(UART0_VIRT_BASE, UART0_PHYS_BASE,
 493                          IRQ_KIRKWOOD_UART_0, kirkwood_tclk);
 494 }
 495
 496
 497 /*****************************************************************************
 498  * UART1
 499  ****************************************************************************/
 500 void __init kirkwood_uart1_init(void)
 501 {
 502         orion_uart1_init(UART1_VIRT_BASE, UART1_PHYS_BASE,
 503                          IRQ_KIRKWOOD_UART_1, kirkwood_tclk);
 504 }
 505
 506 /*****************************************************************************
 507  * Cryptographic Engines and Security Accelerator (CESA)
 508  ****************************************************************************/
 509
 510 static struct resource kirkwood_crypto_res[] = {
 511         {
 512                 .name   = "regs",
 513                 .start  = CRYPTO_PHYS_BASE,
 514                 .end    = CRYPTO_PHYS_BASE + 0xffff,
 515                 .flags  = IORESOURCE_MEM,
 516         }, {
 517                 .name   = "sram",
 518                 .start  = KIRKWOOD_SRAM_PHYS_BASE,
 519                 .end    = KIRKWOOD_SRAM_PHYS_BASE + KIRKWOOD_SRAM_SIZE - 1,
 520                 .flags  = IORESOURCE_MEM,
 521         }, {
 522                 .name   = "crypto interrupt",
 523                 .start  = IRQ_KIRKWOOD_CRYPTO,
 524                 .end    = IRQ_KIRKWOOD_CRYPTO,
 525                 .flags  = IORESOURCE_IRQ,
 526         },
 527 };
 528
 529 static struct platform_device kirkwood_crypto_device = {
 530         .name           = "mv_crypto",
 531         .id             = -1,
 532         .num_resources  = ARRAY_SIZE(kirkwood_crypto_res),
 533         .resource       = kirkwood_crypto_res,
 534 };
 535
 536 void __init kirkwood_crypto_init(void)
 537 {
 538         kirkwood_clk_ctrl |= CGC_CRYPTO;
 539         platform_device_register(&kirkwood_crypto_device);
 540 }
 541
 542
 543 /*****************************************************************************
 544  * XOR
 545  ****************************************************************************/
 546 static struct mv_xor_platform_shared_data kirkwood_xor_shared_data = {
 547         .dram           = &kirkwood_mbus_dram_info,
 548 };
 549
 550
 551 /*****************************************************************************
 552  * XOR0
 553  ****************************************************************************/
 554 static struct resource kirkwood_xor0_shared_resources[] = {
 555         {
 556                 .name   = "xor 0 low",
 557                 .start  = XOR0_PHYS_BASE,
 558                 .end    = XOR0_PHYS_BASE + 0xff,
 559                 .flags  = IORESOURCE_MEM,
 560         }, {
 561                 .name   = "xor 0 high",
 562                 .start  = XOR0_HIGH_PHYS_BASE,
 563                 .end    = XOR0_HIGH_PHYS_BASE + 0xff,
 564                 .flags  = IORESOURCE_MEM,
 565         },
 566 };
 567
 568 static struct platform_device kirkwood_xor0_shared = {
 569         .name           = MV_XOR_SHARED_NAME,
 570         .id             = 0,
 571         .dev            = {
 572                 .platform_data = &kirkwood_xor_shared_data,
 573         },
 574         .num_resources  = ARRAY_SIZE(kirkwood_xor0_shared_resources),
 575         .resource       = kirkwood_xor0_shared_resources,
 576 };
 577
 578 static u64 kirkwood_xor_dmamask = DMA_BIT_MASK(32);
 579
 580 static struct resource kirkwood_xor00_resources[] = {
 581         [0] = {
 582                 .start  = IRQ_KIRKWOOD_XOR_00,
 583                 .end    = IRQ_KIRKWOOD_XOR_00,
 584                 .flags  = IORESOURCE_IRQ,
 585         },
 586 };
 587
 588 static struct mv_xor_platform_data kirkwood_xor00_data = {
 589         .shared         = &kirkwood_xor0_shared,
 590         .hw_id          = 0,
 591         .pool_size      = PAGE_SIZE,
 592 };
 593
 594 static struct platform_device kirkwood_xor00_channel = {
 595         .name           = MV_XOR_NAME,
 596         .id             = 0,
 597         .num_resources  = ARRAY_SIZE(kirkwood_xor00_resources),
 598         .resource       = kirkwood_xor00_resources,
 599         .dev            = {
 600                 .dma_mask               = &kirkwood_xor_dmamask,
 601                 .coherent_dma_mask      = DMA_BIT_MASK(64),
 602                 .platform_data          = &kirkwood_xor00_data,
 603         },
 604 };
 605
 606 static struct resource kirkwood_xor01_resources[] = {
 607         [0] = {
 608                 .start  = IRQ_KIRKWOOD_XOR_01,
 609                 .end    = IRQ_KIRKWOOD_XOR_01,
 610                 .flags  = IORESOURCE_IRQ,
 611         },
 612 };
 613
 614 static struct mv_xor_platform_data kirkwood_xor01_data = {
 615         .shared         = &kirkwood_xor0_shared,
 616         .hw_id          = 1,
 617         .pool_size      = PAGE_SIZE,
 618 };
 619
 620 static struct platform_device kirkwood_xor01_channel = {
 621         .name           = MV_XOR_NAME,
 622         .id             = 1,
 623         .num_resources  = ARRAY_SIZE(kirkwood_xor01_resources),
 624         .resource       = kirkwood_xor01_resources,
 625         .dev            = {
 626                 .dma_mask               = &kirkwood_xor_dmamask,
 627                 .coherent_dma_mask      = DMA_BIT_MASK(64),
 628                 .platform_data          = &kirkwood_xor01_data,
 629         },
 630 };
 631
 632 static void __init kirkwood_xor0_init(void)
 633 {
 634         kirkwood_clk_ctrl |= CGC_XOR0;
 635         platform_device_register(&kirkwood_xor0_shared);
 636
 637         /*
 638          * two engines can't do memset simultaneously, this limitation
 639          * satisfied by removing memset support from one of the engines.
 640          */
 641         dma_cap_set(DMA_MEMCPY, kirkwood_xor00_data.cap_mask);
 642         dma_cap_set(DMA_XOR, kirkwood_xor00_data.cap_mask);
 643         platform_device_register(&kirkwood_xor00_channel);
 644
 645         dma_cap_set(DMA_MEMCPY, kirkwood_xor01_data.cap_mask);
 646         dma_cap_set(DMA_MEMSET, kirkwood_xor01_data.cap_mask);
 647         dma_cap_set(DMA_XOR, kirkwood_xor01_data.cap_mask);
 648         platform_device_register(&kirkwood_xor01_channel);
 649 }
 650
 651
 652 /*****************************************************************************
 653  * XOR1
 654  ****************************************************************************/
 655 static struct resource kirkwood_xor1_shared_resources[] = {
 656         {
 657                 .name   = "xor 1 low",
 658                 .start  = XOR1_PHYS_BASE,
 659                 .end    = XOR1_PHYS_BASE + 0xff,
 660                 .flags  = IORESOURCE_MEM,
 661         }, {
 662                 .name   = "xor 1 high",
 663                 .start  = XOR1_HIGH_PHYS_BASE,
 664                 .end    = XOR1_HIGH_PHYS_BASE + 0xff,
 665                 .flags  = IORESOURCE_MEM,
 666         },
 667 };
 668
 669 static struct platform_device kirkwood_xor1_shared = {
 670         .name           = MV_XOR_SHARED_NAME,
 671         .id             = 1,
 672         .dev            = {
 673                 .platform_data = &kirkwood_xor_shared_data,
 674         },
 675         .num_resources  = ARRAY_SIZE(kirkwood_xor1_shared_resources),
 676         .resource       = kirkwood_xor1_shared_resources,
 677 };
 678
 679 static struct resource kirkwood_xor10_resources[] = {
 680         [0] = {
 681                 .start  = IRQ_KIRKWOOD_XOR_10,
 682                 .end    = IRQ_KIRKWOOD_XOR_10,
 683                 .flags  = IORESOURCE_IRQ,
 684         },
 685 };
 686
 687 static struct mv_xor_platform_data kirkwood_xor10_data = {
 688         .shared         = &kirkwood_xor1_shared,
 689         .hw_id          = 0,
 690         .pool_size      = PAGE_SIZE,
 691 };
 692
 693 static struct platform_device kirkwood_xor10_channel = {
 694         .name           = MV_XOR_NAME,
 695         .id             = 2,
 696         .num_resources  = ARRAY_SIZE(kirkwood_xor10_resources),
 697         .resource       = kirkwood_xor10_resources,
 698         .dev            = {
 699                 .dma_mask               = &kirkwood_xor_dmamask,
 700                 .coherent_dma_mask      = DMA_BIT_MASK(64),
 701                 .platform_data          = &kirkwood_xor10_data,
 702         },
 703 };
 704
 705 static struct resource kirkwood_xor11_resources[] = {
 706         [0] = {
 707                 .start  = IRQ_KIRKWOOD_XOR_11,
 708                 .end    = IRQ_KIRKWOOD_XOR_11,
 709                 .flags  = IORESOURCE_IRQ,
 710         },
 711 };
 712
 713 static struct mv_xor_platform_data kirkwood_xor11_data = {
 714         .shared         = &kirkwood_xor1_shared,
 715         .hw_id          = 1,
 716         .pool_size      = PAGE_SIZE,
 717 };
 718
 719 static struct platform_device kirkwood_xor11_channel = {
 720         .name           = MV_XOR_NAME,
 721         .id             = 3,
 722         .num_resources  = ARRAY_SIZE(kirkwood_xor11_resources),
 723         .resource       = kirkwood_xor11_resources,
 724         .dev            = {
 725                 .dma_mask               = &kirkwood_xor_dmamask,
 726                 .coherent_dma_mask      = DMA_BIT_MASK(64),
 727                 .platform_data          = &kirkwood_xor11_data,
 728         },
 729 };
 730
 731 static void __init kirkwood_xor1_init(void)
 732 {
 733         kirkwood_clk_ctrl |= CGC_XOR1;
 734         platform_device_register(&kirkwood_xor1_shared);
 735
 736         /*
 737          * two engines can't do memset simultaneously, this limitation
 738          * satisfied by removing memset support from one of the engines.
 739          */
 740         dma_cap_set(DMA_MEMCPY, kirkwood_xor10_data.cap_mask);
 741         dma_cap_set(DMA_XOR, kirkwood_xor10_data.cap_mask);
 742         platform_device_register(&kirkwood_xor10_channel);
 743
 744         dma_cap_set(DMA_MEMCPY, kirkwood_xor11_data.cap_mask);
 745         dma_cap_set(DMA_MEMSET, kirkwood_xor11_data.cap_mask);
 746         dma_cap_set(DMA_XOR, kirkwood_xor11_data.cap_mask);
 747         platform_device_register(&kirkwood_xor11_channel);
 748 }
 749
 750
 751 /*****************************************************************************
 752  * Watchdog
 753  ****************************************************************************/
 754 static struct orion_wdt_platform_data kirkwood_wdt_data = {
 755         .tclk           = 0,
 756 };
 757
 758 static struct platform_device kirkwood_wdt_device = {
 759         .name           = "orion_wdt",
 760         .id             = -1,
 761         .dev            = {
 762                 .platform_data  = &kirkwood_wdt_data,
 763         },
 764         .num_resources  = 0,
 765 };
 766
 767 static void __init kirkwood_wdt_init(void)
 768 {
 769         kirkwood_wdt_data.tclk = kirkwood_tclk;
 770         platform_device_register(&kirkwood_wdt_device);
 771 }
 772
 773
 774 /*****************************************************************************
 775  * Time handling
 776  ****************************************************************************/
 777 void __init kirkwood_init_early(void)
 778 {
 779         orion_time_set_base(TIMER_VIRT_BASE);
 780 }
 781
 782 int kirkwood_tclk;
 783
 784 static int __init kirkwood_find_tclk(void)
 785 {
 786         u32 dev, rev;
 787
 788         kirkwood_pcie_id(&dev, &rev);
 789
 790         if (dev == MV88F6281_DEV_ID || dev == MV88F6282_DEV_ID)
 791                 if (((readl(SAMPLE_AT_RESET) >> 21) & 1) == 0)
 792                         return 200000000;
 793
 794         return 166666667;
 795 }
 796
 797 static void __init kirkwood_timer_init(void)
 798 {
 799         kirkwood_tclk = kirkwood_find_tclk();
 800
 801         orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
 802                         IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
 803 }
 804
 805 struct sys_timer kirkwood_timer = {
 806         .init = kirkwood_timer_init,
 807 };
 808
 809 /*****************************************************************************
 810  * Audio
 811  ****************************************************************************/
 812 static struct resource kirkwood_i2s_resources[] = {
 813         [0] = {
 814                 .start  = AUDIO_PHYS_BASE,
 815                 .end    = AUDIO_PHYS_BASE + SZ_16K - 1,
 816                 .flags  = IORESOURCE_MEM,
 817         },
 818         [1] = {
 819                 .start  = IRQ_KIRKWOOD_I2S,
 820                 .end    = IRQ_KIRKWOOD_I2S,
 821                 .flags  = IORESOURCE_IRQ,
 822         },
 823 };
 824
 825 static struct kirkwood_asoc_platform_data kirkwood_i2s_data = {
 826         .dram        = &kirkwood_mbus_dram_info,
 827         .burst       = 128,
 828 };
 829
 830 static struct platform_device kirkwood_i2s_device = {
 831         .name           = "kirkwood-i2s",
 832         .id             = -1,
 833         .num_resources  = ARRAY_SIZE(kirkwood_i2s_resources),
 834         .resource       = kirkwood_i2s_resources,
 835         .dev            = {
 836                 .platform_data  = &kirkwood_i2s_data,
 837         },
 838 };
 839
 840 static struct platform_device kirkwood_pcm_device = {
 841         .name           = "kirkwood-pcm-audio",
 842         .id             = -1,
 843 };
 844
 845 void __init kirkwood_audio_init(void)
 846 {
 847         kirkwood_clk_ctrl |= CGC_AUDIO;
 848         platform_device_register(&kirkwood_i2s_device);
 849         platform_device_register(&kirkwood_pcm_device);
 850 }
 851
 852 /*****************************************************************************
 853  * General
 854  ****************************************************************************/
 855 /*
 856  * Identify device ID and revision.
 857  */
 858 static char * __init kirkwood_id(void)
 859 {
 860         u32 dev, rev;
 861
 862         kirkwood_pcie_id(&dev, &rev);
 863
 864         if (dev == MV88F6281_DEV_ID) {
 865                 if (rev == MV88F6281_REV_Z0)
 866                         return "MV88F6281-Z0";
 867                 else if (rev == MV88F6281_REV_A0)
 868                         return "MV88F6281-A0";
 869                 else if (rev == MV88F6281_REV_A1)
 870                         return "MV88F6281-A1";
 871                 else
 872                         return "MV88F6281-Rev-Unsupported";
 873         } else if (dev == MV88F6192_DEV_ID) {
 874                 if (rev == MV88F6192_REV_Z0)
 875                         return "MV88F6192-Z0";
 876                 else if (rev == MV88F6192_REV_A0)
 877                         return "MV88F6192-A0";
 878                 else if (rev == MV88F6192_REV_A1)
 879                         return "MV88F6192-A1";
 880                 else
 881                         return "MV88F6192-Rev-Unsupported";
 882         } else if (dev == MV88F6180_DEV_ID) {
 883                 if (rev == MV88F6180_REV_A0)
 884                         return "MV88F6180-Rev-A0";
 885                 else if (rev == MV88F6180_REV_A1)
 886                         return "MV88F6180-Rev-A1";
 887                 else
 888                         return "MV88F6180-Rev-Unsupported";
 889         } else if (dev == MV88F6282_DEV_ID) {
 890                 if (rev == MV88F6282_REV_A0)
 891                         return "MV88F6282-Rev-A0";
 892                 else
 893                         return "MV88F6282-Rev-Unsupported";
 894         } else {
 895                 return "Device-Unknown";
 896         }
 897 }
 898
 899 static void __init kirkwood_l2_init(void)
 900 {
 901 #ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
 902         writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
 903         feroceon_l2_init(1);
 904 #else
 905         writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
 906         feroceon_l2_init(0);
 907 #endif
 908 }
 909
 910 void __init kirkwood_init(void)
 911 {
 912         printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
 913                 kirkwood_id(), kirkwood_tclk);
 914         kirkwood_ge00_shared_data.t_clk = kirkwood_tclk;
 915         kirkwood_ge01_shared_data.t_clk = kirkwood_tclk;
 916         kirkwood_spi_plat_data.tclk = kirkwood_tclk;
 917         kirkwood_i2s_data.tclk = kirkwood_tclk;
 918
 919         /*
 920          * Disable propagation of mbus errors to the CPU local bus,
 921          * as this causes mbus errors (which can occur for example
 922          * for PCI aborts) to throw CPU aborts, which we're not set
 923          * up to deal with.
 924          */
 925         writel(readl(CPU_CONFIG) & ~CPU_CONFIG_ERROR_PROP, CPU_CONFIG);
 926
 927         kirkwood_setup_cpu_mbus();
 928
 929 #ifdef CONFIG_CACHE_FEROCEON_L2
 930         kirkwood_l2_init();
 931 #endif
 932
 933         /* internal devices that every board has */
 934         kirkwood_rtc_init();
 935         kirkwood_wdt_init();
 936         kirkwood_xor0_init();
 937         kirkwood_xor1_init();
 938         kirkwood_crypto_init();
 939
 940 #ifdef CONFIG_KEXEC
 941         kexec_reinit = kirkwood_enable_pcie;
 942 #endif
 943 }
 944
 945 static int __init kirkwood_clock_gate(void)
 946 {
 947         unsigned int curr = readl(CLOCK_GATING_CTRL);
 948         u32 dev, rev;
 949
 950         kirkwood_pcie_id(&dev, &rev);
 951         printk(KERN_DEBUG "Gating clock of unused units\n");
 952         printk(KERN_DEBUG "before: 0x%08x\n", curr);
 953
 954         /* Make sure those units are accessible */
 955         writel(curr | CGC_SATA0 | CGC_SATA1 | CGC_PEX0 | CGC_PEX1, CLOCK_GATING_CTRL);
 956
 957         /* For SATA: first shutdown the phy */
 958         if (!(kirkwood_clk_ctrl & CGC_SATA0)) {
 959                 /* Disable PLL and IVREF */
 960                 writel(readl(SATA0_PHY_MODE_2) & ~0xf, SATA0_PHY_MODE_2);
 961                 /* Disable PHY */
 962                 writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL);
 963         }
 964         if (!(kirkwood_clk_ctrl & CGC_SATA1)) {
 965                 /* Disable PLL and IVREF */
 966                 writel(readl(SATA1_PHY_MODE_2) & ~0xf, SATA1_PHY_MODE_2);
 967                 /* Disable PHY */
 968                 writel(readl(SATA1_IF_CTRL) | 0x200, SATA1_IF_CTRL);
 969         }
 970
 971         /* For PCIe: first shutdown the phy */
 972         if (!(kirkwood_clk_ctrl & CGC_PEX0)) {
 973                 writel(readl(PCIE_LINK_CTRL) | 0x10, PCIE_LINK_CTRL);
 974                 while (1)
 975                         if (readl(PCIE_STATUS) & 0x1)
 976                                 break;
 977                 writel(readl(PCIE_LINK_CTRL) & ~0x10, PCIE_LINK_CTRL);
 978         }
 979
 980         /* For PCIe 1: first shutdown the phy */
 981         if (dev == MV88F6282_DEV_ID) {
 982                 if (!(kirkwood_clk_ctrl & CGC_PEX1)) {
 983                         writel(readl(PCIE1_LINK_CTRL) | 0x10, PCIE1_LINK_CTRL);
 984                         while (1)
 985                                 if (readl(PCIE1_STATUS) & 0x1)
 986                                         break;
 987                         writel(readl(PCIE1_LINK_CTRL) & ~0x10, PCIE1_LINK_CTRL);
 988                 }
 989         } else  /* keep this bit set for devices that don't have PCIe1 */
 990                 kirkwood_clk_ctrl |= CGC_PEX1;
 991
 992         /* Now gate clock the required units */
 993         writel(kirkwood_clk_ctrl, CLOCK_GATING_CTRL);
 994         printk(KERN_DEBUG " after: 0x%08x\n", readl(CLOCK_GATING_CTRL));
 995
 996         return 0;
 997 }
 998 late_initcall(kirkwood_clock_gate);