2 * arch/arm/mach-kirkwood/common.c
4 * Core functions for Marvell Kirkwood SoCs
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/platform_device.h>
14 #include <linux/serial_8250.h>
15 #include <linux/mbus.h>
16 #include <linux/ata_platform.h>
17 #include <linux/mtd/nand.h>
18 #include <linux/dma-mapping.h>
21 #include <asm/timex.h>
22 #include <asm/kexec.h>
23 #include <asm/mach/map.h>
24 #include <asm/mach/time.h>
25 #include <mach/kirkwood.h>
26 #include <mach/bridge-regs.h>
27 #include <plat/audio.h>
28 #include <plat/cache-feroceon-l2.h>
29 #include <plat/mvsdio.h>
30 #include <plat/orion_nand.h>
31 #include <plat/common.h>
32 #include <plat/time.h>
35 /*****************************************************************************
37 ****************************************************************************/
38 static struct map_desc kirkwood_io_desc[] __initdata = {
40 .virtual = KIRKWOOD_PCIE_IO_VIRT_BASE,
41 .pfn = __phys_to_pfn(KIRKWOOD_PCIE_IO_PHYS_BASE),
42 .length = KIRKWOOD_PCIE_IO_SIZE,
45 .virtual = KIRKWOOD_PCIE1_IO_VIRT_BASE,
46 .pfn = __phys_to_pfn(KIRKWOOD_PCIE1_IO_PHYS_BASE),
47 .length = KIRKWOOD_PCIE1_IO_SIZE,
50 .virtual = KIRKWOOD_REGS_VIRT_BASE,
51 .pfn = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE),
52 .length = KIRKWOOD_REGS_SIZE,
57 void __init kirkwood_map_io(void)
59 iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
63 * Default clock control bits. Any bit _not_ set in this variable
64 * will be cleared from the hardware after platform devices have been
65 * registered. Some reserved bits must be set to 1.
67 unsigned int kirkwood_clk_ctrl = CGC_DUNIT | CGC_RESERVED;
70 /*****************************************************************************
72 ****************************************************************************/
73 void __init kirkwood_ehci_init(void)
75 kirkwood_clk_ctrl |= CGC_USB0;
76 orion_ehci_init(&kirkwood_mbus_dram_info,
77 USB_PHYS_BASE, IRQ_KIRKWOOD_USB);
81 /*****************************************************************************
83 ****************************************************************************/
84 void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
86 kirkwood_clk_ctrl |= CGC_GE0;
88 orion_ge00_init(eth_data, &kirkwood_mbus_dram_info,
89 GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM,
90 IRQ_KIRKWOOD_GE00_ERR, kirkwood_tclk);
94 /*****************************************************************************
96 ****************************************************************************/
97 void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
100 kirkwood_clk_ctrl |= CGC_GE1;
102 orion_ge01_init(eth_data, &kirkwood_mbus_dram_info,
103 GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM,
104 IRQ_KIRKWOOD_GE01_ERR, kirkwood_tclk);
108 /*****************************************************************************
110 ****************************************************************************/
111 void __init kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq)
113 orion_ge00_switch_init(d, irq);
117 /*****************************************************************************
119 ****************************************************************************/
120 static struct resource kirkwood_nand_resource = {
121 .flags = IORESOURCE_MEM,
122 .start = KIRKWOOD_NAND_MEM_PHYS_BASE,
123 .end = KIRKWOOD_NAND_MEM_PHYS_BASE +
124 KIRKWOOD_NAND_MEM_SIZE - 1,
127 static struct orion_nand_data kirkwood_nand_data = {
133 static struct platform_device kirkwood_nand_flash = {
134 .name = "orion_nand",
137 .platform_data = &kirkwood_nand_data,
139 .resource = &kirkwood_nand_resource,
143 void __init kirkwood_nand_init(struct mtd_partition *parts, int nr_parts,
146 kirkwood_clk_ctrl |= CGC_RUNIT;
147 kirkwood_nand_data.parts = parts;
148 kirkwood_nand_data.nr_parts = nr_parts;
149 kirkwood_nand_data.chip_delay = chip_delay;
150 platform_device_register(&kirkwood_nand_flash);
153 void __init kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts,
154 int (*dev_ready)(struct mtd_info *))
156 kirkwood_clk_ctrl |= CGC_RUNIT;
157 kirkwood_nand_data.parts = parts;
158 kirkwood_nand_data.nr_parts = nr_parts;
159 kirkwood_nand_data.dev_ready = dev_ready;
160 platform_device_register(&kirkwood_nand_flash);
163 /*****************************************************************************
165 ****************************************************************************/
166 static void __init kirkwood_rtc_init(void)
168 orion_rtc_init(RTC_PHYS_BASE, IRQ_KIRKWOOD_RTC);
172 /*****************************************************************************
174 ****************************************************************************/
175 static struct resource kirkwood_sata_resources[] = {
178 .start = SATA_PHYS_BASE,
179 .end = SATA_PHYS_BASE + 0x5000 - 1,
180 .flags = IORESOURCE_MEM,
183 .start = IRQ_KIRKWOOD_SATA,
184 .end = IRQ_KIRKWOOD_SATA,
185 .flags = IORESOURCE_IRQ,
189 static struct platform_device kirkwood_sata = {
193 .coherent_dma_mask = DMA_BIT_MASK(32),
195 .num_resources = ARRAY_SIZE(kirkwood_sata_resources),
196 .resource = kirkwood_sata_resources,
199 void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
201 kirkwood_clk_ctrl |= CGC_SATA0;
202 if (sata_data->n_ports > 1)
203 kirkwood_clk_ctrl |= CGC_SATA1;
204 sata_data->dram = &kirkwood_mbus_dram_info;
205 kirkwood_sata.dev.platform_data = sata_data;
206 platform_device_register(&kirkwood_sata);
210 /*****************************************************************************
212 ****************************************************************************/
213 static struct resource mvsdio_resources[] = {
215 .start = SDIO_PHYS_BASE,
216 .end = SDIO_PHYS_BASE + SZ_1K - 1,
217 .flags = IORESOURCE_MEM,
220 .start = IRQ_KIRKWOOD_SDIO,
221 .end = IRQ_KIRKWOOD_SDIO,
222 .flags = IORESOURCE_IRQ,
226 static u64 mvsdio_dmamask = DMA_BIT_MASK(32);
228 static struct platform_device kirkwood_sdio = {
232 .dma_mask = &mvsdio_dmamask,
233 .coherent_dma_mask = DMA_BIT_MASK(32),
235 .num_resources = ARRAY_SIZE(mvsdio_resources),
236 .resource = mvsdio_resources,
239 void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
243 kirkwood_pcie_id(&dev, &rev);
244 if (rev == 0 && dev != MV88F6282_DEV_ID) /* catch all Kirkwood Z0's */
245 mvsdio_data->clock = 100000000;
247 mvsdio_data->clock = 200000000;
248 mvsdio_data->dram = &kirkwood_mbus_dram_info;
249 kirkwood_clk_ctrl |= CGC_SDIO;
250 kirkwood_sdio.dev.platform_data = mvsdio_data;
251 platform_device_register(&kirkwood_sdio);
255 /*****************************************************************************
257 ****************************************************************************/
258 void __init kirkwood_spi_init()
260 kirkwood_clk_ctrl |= CGC_RUNIT;
261 orion_spi_init(SPI_PHYS_BASE, kirkwood_tclk);
265 /*****************************************************************************
267 ****************************************************************************/
268 void __init kirkwood_i2c_init(void)
270 orion_i2c_init(I2C_PHYS_BASE, IRQ_KIRKWOOD_TWSI, 8);
274 /*****************************************************************************
276 ****************************************************************************/
278 void __init kirkwood_uart0_init(void)
280 orion_uart0_init(UART0_VIRT_BASE, UART0_PHYS_BASE,
281 IRQ_KIRKWOOD_UART_0, kirkwood_tclk);
285 /*****************************************************************************
287 ****************************************************************************/
288 void __init kirkwood_uart1_init(void)
290 orion_uart1_init(UART1_VIRT_BASE, UART1_PHYS_BASE,
291 IRQ_KIRKWOOD_UART_1, kirkwood_tclk);
294 /*****************************************************************************
295 * Cryptographic Engines and Security Accelerator (CESA)
296 ****************************************************************************/
298 static struct resource kirkwood_crypto_res[] = {
301 .start = CRYPTO_PHYS_BASE,
302 .end = CRYPTO_PHYS_BASE + 0xffff,
303 .flags = IORESOURCE_MEM,
306 .start = KIRKWOOD_SRAM_PHYS_BASE,
307 .end = KIRKWOOD_SRAM_PHYS_BASE + KIRKWOOD_SRAM_SIZE - 1,
308 .flags = IORESOURCE_MEM,
310 .name = "crypto interrupt",
311 .start = IRQ_KIRKWOOD_CRYPTO,
312 .end = IRQ_KIRKWOOD_CRYPTO,
313 .flags = IORESOURCE_IRQ,
317 static struct platform_device kirkwood_crypto_device = {
320 .num_resources = ARRAY_SIZE(kirkwood_crypto_res),
321 .resource = kirkwood_crypto_res,
324 void __init kirkwood_crypto_init(void)
326 kirkwood_clk_ctrl |= CGC_CRYPTO;
327 platform_device_register(&kirkwood_crypto_device);
331 /*****************************************************************************
333 ****************************************************************************/
334 static void __init kirkwood_xor0_init(void)
336 kirkwood_clk_ctrl |= CGC_XOR0;
338 orion_xor0_init(&kirkwood_mbus_dram_info,
339 XOR0_PHYS_BASE, XOR0_HIGH_PHYS_BASE,
340 IRQ_KIRKWOOD_XOR_00, IRQ_KIRKWOOD_XOR_01);
344 /*****************************************************************************
346 ****************************************************************************/
347 static void __init kirkwood_xor1_init(void)
349 kirkwood_clk_ctrl |= CGC_XOR1;
351 orion_xor1_init(XOR1_PHYS_BASE, XOR1_HIGH_PHYS_BASE,
352 IRQ_KIRKWOOD_XOR_10, IRQ_KIRKWOOD_XOR_11);
356 /*****************************************************************************
358 ****************************************************************************/
359 static void __init kirkwood_wdt_init(void)
361 orion_wdt_init(kirkwood_tclk);
365 /*****************************************************************************
367 ****************************************************************************/
368 void __init kirkwood_init_early(void)
370 orion_time_set_base(TIMER_VIRT_BASE);
375 static int __init kirkwood_find_tclk(void)
379 kirkwood_pcie_id(&dev, &rev);
381 if (dev == MV88F6281_DEV_ID || dev == MV88F6282_DEV_ID)
382 if (((readl(SAMPLE_AT_RESET) >> 21) & 1) == 0)
388 static void __init kirkwood_timer_init(void)
390 kirkwood_tclk = kirkwood_find_tclk();
392 orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
393 IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
396 struct sys_timer kirkwood_timer = {
397 .init = kirkwood_timer_init,
400 /*****************************************************************************
402 ****************************************************************************/
403 static struct resource kirkwood_i2s_resources[] = {
405 .start = AUDIO_PHYS_BASE,
406 .end = AUDIO_PHYS_BASE + SZ_16K - 1,
407 .flags = IORESOURCE_MEM,
410 .start = IRQ_KIRKWOOD_I2S,
411 .end = IRQ_KIRKWOOD_I2S,
412 .flags = IORESOURCE_IRQ,
416 static struct kirkwood_asoc_platform_data kirkwood_i2s_data = {
417 .dram = &kirkwood_mbus_dram_info,
421 static struct platform_device kirkwood_i2s_device = {
422 .name = "kirkwood-i2s",
424 .num_resources = ARRAY_SIZE(kirkwood_i2s_resources),
425 .resource = kirkwood_i2s_resources,
427 .platform_data = &kirkwood_i2s_data,
431 static struct platform_device kirkwood_pcm_device = {
432 .name = "kirkwood-pcm-audio",
436 void __init kirkwood_audio_init(void)
438 kirkwood_clk_ctrl |= CGC_AUDIO;
439 platform_device_register(&kirkwood_i2s_device);
440 platform_device_register(&kirkwood_pcm_device);
443 /*****************************************************************************
445 ****************************************************************************/
447 * Identify device ID and revision.
449 static char * __init kirkwood_id(void)
453 kirkwood_pcie_id(&dev, &rev);
455 if (dev == MV88F6281_DEV_ID) {
456 if (rev == MV88F6281_REV_Z0)
457 return "MV88F6281-Z0";
458 else if (rev == MV88F6281_REV_A0)
459 return "MV88F6281-A0";
460 else if (rev == MV88F6281_REV_A1)
461 return "MV88F6281-A1";
463 return "MV88F6281-Rev-Unsupported";
464 } else if (dev == MV88F6192_DEV_ID) {
465 if (rev == MV88F6192_REV_Z0)
466 return "MV88F6192-Z0";
467 else if (rev == MV88F6192_REV_A0)
468 return "MV88F6192-A0";
469 else if (rev == MV88F6192_REV_A1)
470 return "MV88F6192-A1";
472 return "MV88F6192-Rev-Unsupported";
473 } else if (dev == MV88F6180_DEV_ID) {
474 if (rev == MV88F6180_REV_A0)
475 return "MV88F6180-Rev-A0";
476 else if (rev == MV88F6180_REV_A1)
477 return "MV88F6180-Rev-A1";
479 return "MV88F6180-Rev-Unsupported";
480 } else if (dev == MV88F6282_DEV_ID) {
481 if (rev == MV88F6282_REV_A0)
482 return "MV88F6282-Rev-A0";
484 return "MV88F6282-Rev-Unsupported";
486 return "Device-Unknown";
490 static void __init kirkwood_l2_init(void)
492 #ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
493 writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
496 writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
501 void __init kirkwood_init(void)
503 printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
504 kirkwood_id(), kirkwood_tclk);
505 kirkwood_i2s_data.tclk = kirkwood_tclk;
508 * Disable propagation of mbus errors to the CPU local bus,
509 * as this causes mbus errors (which can occur for example
510 * for PCI aborts) to throw CPU aborts, which we're not set
513 writel(readl(CPU_CONFIG) & ~CPU_CONFIG_ERROR_PROP, CPU_CONFIG);
515 kirkwood_setup_cpu_mbus();
517 #ifdef CONFIG_CACHE_FEROCEON_L2
521 /* internal devices that every board has */
524 kirkwood_xor0_init();
525 kirkwood_xor1_init();
526 kirkwood_crypto_init();
529 kexec_reinit = kirkwood_enable_pcie;
533 static int __init kirkwood_clock_gate(void)
535 unsigned int curr = readl(CLOCK_GATING_CTRL);
538 kirkwood_pcie_id(&dev, &rev);
539 printk(KERN_DEBUG "Gating clock of unused units\n");
540 printk(KERN_DEBUG "before: 0x%08x\n", curr);
542 /* Make sure those units are accessible */
543 writel(curr | CGC_SATA0 | CGC_SATA1 | CGC_PEX0 | CGC_PEX1, CLOCK_GATING_CTRL);
545 /* For SATA: first shutdown the phy */
546 if (!(kirkwood_clk_ctrl & CGC_SATA0)) {
547 /* Disable PLL and IVREF */
548 writel(readl(SATA0_PHY_MODE_2) & ~0xf, SATA0_PHY_MODE_2);
550 writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL);
552 if (!(kirkwood_clk_ctrl & CGC_SATA1)) {
553 /* Disable PLL and IVREF */
554 writel(readl(SATA1_PHY_MODE_2) & ~0xf, SATA1_PHY_MODE_2);
556 writel(readl(SATA1_IF_CTRL) | 0x200, SATA1_IF_CTRL);
559 /* For PCIe: first shutdown the phy */
560 if (!(kirkwood_clk_ctrl & CGC_PEX0)) {
561 writel(readl(PCIE_LINK_CTRL) | 0x10, PCIE_LINK_CTRL);
563 if (readl(PCIE_STATUS) & 0x1)
565 writel(readl(PCIE_LINK_CTRL) & ~0x10, PCIE_LINK_CTRL);
568 /* For PCIe 1: first shutdown the phy */
569 if (dev == MV88F6282_DEV_ID) {
570 if (!(kirkwood_clk_ctrl & CGC_PEX1)) {
571 writel(readl(PCIE1_LINK_CTRL) | 0x10, PCIE1_LINK_CTRL);
573 if (readl(PCIE1_STATUS) & 0x1)
575 writel(readl(PCIE1_LINK_CTRL) & ~0x10, PCIE1_LINK_CTRL);
577 } else /* keep this bit set for devices that don't have PCIe1 */
578 kirkwood_clk_ctrl |= CGC_PEX1;
580 /* Now gate clock the required units */
581 writel(kirkwood_clk_ctrl, CLOCK_GATING_CTRL);
582 printk(KERN_DEBUG " after: 0x%08x\n", readl(CLOCK_GATING_CTRL));
586 late_initcall(kirkwood_clock_gate);