arch/arm/mach-ixp4xx/ixdp425-setup.c

   1 /*
   2  * arch/arm/mach-ixp4xx/ixdp425-setup.c
   3  *
   4  * IXDP425/IXCDP1100 board-setup
   5  *
   6  * Copyright (C) 2003-2005 MontaVista Software, Inc.
   7  *
   8  * Author: Deepak Saxena <dsaxena@plexity.net>
   9  */
  10
  11 #include <linux/kernel.h>
  12 #include <linux/init.h>
  13 #include <linux/device.h>
  14 #include <linux/serial.h>
  15 #include <linux/tty.h>
  16 #include <linux/serial_8250.h>
  17 #include <linux/i2c-gpio.h>
  18 #include <linux/io.h>
  19 #include <linux/mtd/mtd.h>
  20 #include <linux/mtd/nand.h>
  21 #include <linux/mtd/partitions.h>
  22 #include <linux/delay.h>
  23 #include <asm/types.h>
  24 #include <asm/setup.h>
  25 #include <asm/memory.h>
  26 #include <mach/hardware.h>
  27 #include <asm/mach-types.h>
  28 #include <asm/irq.h>
  29 #include <asm/mach/arch.h>
  30 #include <asm/mach/flash.h>
  31
  32 #define IXDP425_SDA_PIN         7
  33 #define IXDP425_SCL_PIN         6
  34
  35 /* NAND Flash pins */
  36 #define IXDP425_NAND_NCE_PIN    12
  37
  38 #define IXDP425_NAND_CMD_BYTE   0x01
  39 #define IXDP425_NAND_ADDR_BYTE  0x02
  40
  41 static struct flash_platform_data ixdp425_flash_data = {
  42         .map_name       = "cfi_probe",
  43         .width          = 2,
  44 };
  45
  46 static struct resource ixdp425_flash_resource = {
  47         .flags          = IORESOURCE_MEM,
  48 };
  49
  50 static struct platform_device ixdp425_flash = {
  51         .name           = "IXP4XX-Flash",
  52         .id             = 0,
  53         .dev            = {
  54                 .platform_data = &ixdp425_flash_data,
  55         },
  56         .num_resources  = 1,
  57         .resource       = &ixdp425_flash_resource,
  58 };
  59
  60 #if defined(CONFIG_MTD_NAND_PLATFORM) || \
  61     defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
  62
  63 #ifdef CONFIG_MTD_PARTITIONS
  64 const char *part_probes[] = { "cmdlinepart", NULL };
  65
  66 static struct mtd_partition ixdp425_partitions[] = {
  67         {
  68                 .name   = "ixp400 NAND FS 0",
  69                 .offset = 0,
  70                 .size   = SZ_8M
  71         }, {
  72                 .name   = "ixp400 NAND FS 1",
  73                 .offset = MTDPART_OFS_APPEND,
  74                 .size   = MTDPART_SIZ_FULL
  75         },
  76 };
  77 #endif
  78
  79 static void
  80 ixdp425_flash_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
  81 {
  82         struct nand_chip *this = mtd->priv;
  83         int offset = (int)this->priv;
  84
  85         if (ctrl & NAND_CTRL_CHANGE) {
  86                 if (ctrl & NAND_NCE) {
  87                         gpio_line_set(IXDP425_NAND_NCE_PIN, IXP4XX_GPIO_LOW);
  88                         udelay(5);
  89                 } else
  90                         gpio_line_set(IXDP425_NAND_NCE_PIN, IXP4XX_GPIO_HIGH);
  91
  92                 offset = (ctrl & NAND_CLE) ? IXDP425_NAND_CMD_BYTE : 0;
  93                 offset |= (ctrl & NAND_ALE) ? IXDP425_NAND_ADDR_BYTE : 0;
  94                 this->priv = (void *)offset;
  95         }
  96
  97         if (cmd != NAND_CMD_NONE)
  98                 writeb(cmd, this->IO_ADDR_W + offset);
  99 }
 100
 101 static struct platform_nand_data ixdp425_flash_nand_data = {
 102         .chip = {
 103                 .chip_delay             = 30,
 104                 .options                = NAND_NO_AUTOINCR,
 105 #ifdef CONFIG_MTD_PARTITIONS
 106                 .part_probe_types       = part_probes,
 107                 .partitions             = ixdp425_partitions,
 108                 .nr_partitions          = ARRAY_SIZE(ixdp425_partitions),
 109 #endif
 110         },
 111         .ctrl = {
 112                 .cmd_ctrl               = ixdp425_flash_nand_cmd_ctrl
 113         }
 114 };
 115
 116 static struct resource ixdp425_flash_nand_resource = {
 117         .flags          = IORESOURCE_MEM,
 118 };
 119
 120 static struct platform_device ixdp425_flash_nand = {
 121         .name           = "gen_nand",
 122         .id             = -1,
 123         .dev            = {
 124                 .platform_data = &ixdp425_flash_nand_data,
 125         },
 126         .num_resources  = 1,
 127         .resource       = &ixdp425_flash_nand_resource,
 128 };
 129 #endif  /* CONFIG_MTD_NAND_PLATFORM */
 130
 131 static struct i2c_gpio_platform_data ixdp425_i2c_gpio_data = {
 132         .sda_pin        = IXDP425_SDA_PIN,
 133         .scl_pin        = IXDP425_SCL_PIN,
 134 };
 135
 136 static struct platform_device ixdp425_i2c_gpio = {
 137         .name           = "i2c-gpio",
 138         .id             = 0,
 139         .dev     = {
 140                 .platform_data  = &ixdp425_i2c_gpio_data,
 141         },
 142 };
 143
 144 static struct resource ixdp425_uart_resources[] = {
 145         {
 146                 .start          = IXP4XX_UART1_BASE_PHYS,
 147                 .end            = IXP4XX_UART1_BASE_PHYS + 0x0fff,
 148                 .flags          = IORESOURCE_MEM
 149         },
 150         {
 151                 .start          = IXP4XX_UART2_BASE_PHYS,
 152                 .end            = IXP4XX_UART2_BASE_PHYS + 0x0fff,
 153                 .flags          = IORESOURCE_MEM
 154         }
 155 };
 156
 157 static struct plat_serial8250_port ixdp425_uart_data[] = {
 158         {
 159                 .mapbase        = IXP4XX_UART1_BASE_PHYS,
 160                 .membase        = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
 161                 .irq            = IRQ_IXP4XX_UART1,
 162                 .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
 163                 .iotype         = UPIO_MEM,
 164                 .regshift       = 2,
 165                 .uartclk        = IXP4XX_UART_XTAL,
 166         },
 167         {
 168                 .mapbase        = IXP4XX_UART2_BASE_PHYS,
 169                 .membase        = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
 170                 .irq            = IRQ_IXP4XX_UART2,
 171                 .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
 172                 .iotype         = UPIO_MEM,
 173                 .regshift       = 2,
 174                 .uartclk        = IXP4XX_UART_XTAL,
 175         },
 176         { },
 177 };
 178
 179 static struct platform_device ixdp425_uart = {
 180         .name                   = "serial8250",
 181         .id                     = PLAT8250_DEV_PLATFORM,
 182         .dev.platform_data      = ixdp425_uart_data,
 183         .num_resources          = 2,
 184         .resource               = ixdp425_uart_resources
 185 };
 186
 187 /* Built-in 10/100 Ethernet MAC interfaces */
 188 static struct eth_plat_info ixdp425_plat_eth[] = {
 189         {
 190                 .phy            = 0,
 191                 .rxq            = 3,
 192                 .txreadyq       = 20,
 193         }, {
 194                 .phy            = 1,
 195                 .rxq            = 4,
 196                 .txreadyq       = 21,
 197         }
 198 };
 199
 200 static struct platform_device ixdp425_eth[] = {
 201         {
 202                 .name                   = "ixp4xx_eth",
 203                 .id                     = IXP4XX_ETH_NPEB,
 204                 .dev.platform_data      = ixdp425_plat_eth,
 205         }, {
 206                 .name                   = "ixp4xx_eth",
 207                 .id                     = IXP4XX_ETH_NPEC,
 208                 .dev.platform_data      = ixdp425_plat_eth + 1,
 209         }
 210 };
 211
 212 static struct platform_device *ixdp425_devices[] __initdata = {
 213         &ixdp425_i2c_gpio,
 214         &ixdp425_flash,
 215 #if defined(CONFIG_MTD_NAND_PLATFORM) || \
 216     defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
 217         &ixdp425_flash_nand,
 218 #endif
 219         &ixdp425_uart,
 220         &ixdp425_eth[0],
 221         &ixdp425_eth[1],
 222 };
 223
 224 static void __init ixdp425_init(void)
 225 {
 226         ixp4xx_sys_init();
 227
 228         ixdp425_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
 229         ixdp425_flash_resource.end =
 230                 IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
 231
 232 #if defined(CONFIG_MTD_NAND_PLATFORM) || \
 233     defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
 234         ixdp425_flash_nand_resource.start = IXP4XX_EXP_BUS_BASE(3),
 235         ixdp425_flash_nand_resource.end   = IXP4XX_EXP_BUS_BASE(3) + 0x10 - 1;
 236
 237         gpio_line_config(IXDP425_NAND_NCE_PIN, IXP4XX_GPIO_OUT);
 238
 239         /* Configure expansion bus for NAND Flash */
 240         *IXP4XX_EXP_CS3 = IXP4XX_EXP_BUS_CS_EN |
 241                           IXP4XX_EXP_BUS_STROBE_T(1) |  /* extend by 1 clock */
 242                           IXP4XX_EXP_BUS_CYCLES(0) |    /* Intel cycles */
 243                           IXP4XX_EXP_BUS_SIZE(0) |      /* 512bytes addr space*/
 244                           IXP4XX_EXP_BUS_WR_EN |
 245                           IXP4XX_EXP_BUS_BYTE_EN;       /* 8 bit data bus */
 246 #endif
 247
 248         if (cpu_is_ixp43x()) {
 249                 ixdp425_uart.num_resources = 1;
 250                 ixdp425_uart_data[1].flags = 0;
 251         }
 252
 253         platform_add_devices(ixdp425_devices, ARRAY_SIZE(ixdp425_devices));
 254 }
 255
 256 #ifdef CONFIG_ARCH_IXDP425
 257 MACHINE_START(IXDP425, "Intel IXDP425 Development Platform")
 258         /* Maintainer: MontaVista Software, Inc. */
 259         .phys_io        = IXP4XX_PERIPHERAL_BASE_PHYS,
 260         .io_pg_offst    = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
 261         .map_io         = ixp4xx_map_io,
 262         .init_irq       = ixp4xx_init_irq,
 263         .timer          = &ixp4xx_timer,
 264         .boot_params    = 0x0100,
 265         .init_machine   = ixdp425_init,
 266 MACHINE_END
 267 #endif
 268
 269 #ifdef CONFIG_MACH_IXDP465
 270 MACHINE_START(IXDP465, "Intel IXDP465 Development Platform")
 271         /* Maintainer: MontaVista Software, Inc. */
 272         .phys_io        = IXP4XX_PERIPHERAL_BASE_PHYS,
 273         .io_pg_offst    = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
 274         .map_io         = ixp4xx_map_io,
 275         .init_irq       = ixp4xx_init_irq,
 276         .timer          = &ixp4xx_timer,
 277         .boot_params    = 0x0100,
 278         .init_machine   = ixdp425_init,
 279 MACHINE_END
 280 #endif
 281
 282 #ifdef CONFIG_ARCH_PRPMC1100
 283 MACHINE_START(IXCDP1100, "Intel IXCDP1100 Development Platform")
 284         /* Maintainer: MontaVista Software, Inc. */
 285         .phys_io        = IXP4XX_PERIPHERAL_BASE_PHYS,
 286         .io_pg_offst    = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
 287         .map_io         = ixp4xx_map_io,
 288         .init_irq       = ixp4xx_init_irq,
 289         .timer          = &ixp4xx_timer,
 290         .boot_params    = 0x0100,
 291         .init_machine   = ixdp425_init,
 292 MACHINE_END
 293 #endif
 294
 295 #ifdef CONFIG_MACH_KIXRP435
 296 MACHINE_START(KIXRP435, "Intel KIXRP435 Reference Platform")
 297         /* Maintainer: MontaVista Software, Inc. */
 298         .phys_io        = IXP4XX_PERIPHERAL_BASE_PHYS,
 299         .io_pg_offst    = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
 300         .map_io         = ixp4xx_map_io,
 301         .init_irq       = ixp4xx_init_irq,
 302         .timer          = &ixp4xx_timer,
 303         .boot_params    = 0x0100,
 304         .init_machine   = ixdp425_init,
 305 MACHINE_END
 306 #endif