arch/arm/mach-highbank/highbank.c

   1 /*
   2  * Copyright 2010-2011 Calxeda, Inc.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along with
  14  * this program.  If not, see <http://www.gnu.org/licenses/>.
  15  */
  16 #include <linux/clk.h>
  17 #include <linux/clkdev.h>
  18 #include <linux/io.h>
  19 #include <linux/irq.h>
  20 #include <linux/irqdomain.h>
  21 #include <linux/of.h>
  22 #include <linux/of_irq.h>
  23 #include <linux/of_platform.h>
  24 #include <linux/of_address.h>
  25 #include <linux/smp.h>
  26
  27 #include <asm/cacheflush.h>
  28 #include <asm/unified.h>
  29 #include <asm/smp_scu.h>
  30 #include <asm/hardware/arm_timer.h>
  31 #include <asm/hardware/timer-sp.h>
  32 #include <asm/hardware/gic.h>
  33 #include <asm/hardware/cache-l2x0.h>
  34 #include <asm/mach/arch.h>
  35 #include <asm/mach/map.h>
  36 #include <asm/mach/time.h>
  37 #include <mach/irqs.h>
  38
  39 #include "core.h"
  40 #include "sysregs.h"
  41
  42 void __iomem *sregs_base;
  43
  44 #define HB_SCU_VIRT_BASE        0xfee00000
  45 void __iomem *scu_base_addr = ((void __iomem *)(HB_SCU_VIRT_BASE));
  46
  47 static struct map_desc scu_io_desc __initdata = {
  48         .virtual        = HB_SCU_VIRT_BASE,
  49         .pfn            = 0, /* run-time */
  50         .length         = SZ_4K,
  51         .type           = MT_DEVICE,
  52 };
  53
  54 static void __init highbank_scu_map_io(void)
  55 {
  56         unsigned long base;
  57
  58         /* Get SCU base */
  59         asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base));
  60
  61         scu_io_desc.pfn = __phys_to_pfn(base);
  62         iotable_init(&scu_io_desc, 1);
  63 }
  64
  65 static void __init highbank_map_io(void)
  66 {
  67         highbank_scu_map_io();
  68         highbank_lluart_map_io();
  69 }
  70
  71 #define HB_JUMP_TABLE_PHYS(cpu)         (0x40 + (0x10 * (cpu)))
  72 #define HB_JUMP_TABLE_VIRT(cpu)         phys_to_virt(HB_JUMP_TABLE_PHYS(cpu))
  73
  74 void highbank_set_cpu_jump(int cpu, void *jump_addr)
  75 {
  76 #ifdef CONFIG_SMP
  77         cpu = cpu_logical_map(cpu);
  78 #endif
  79         writel(BSYM(virt_to_phys(jump_addr)), HB_JUMP_TABLE_VIRT(cpu));
  80         __cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16);
  81         outer_clean_range(HB_JUMP_TABLE_PHYS(cpu),
  82                           HB_JUMP_TABLE_PHYS(cpu) + 15);
  83 }
  84
  85 const static struct of_device_id irq_match[] = {
  86         { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
  87         {}
  88 };
  89
  90 static void __init highbank_init_irq(void)
  91 {
  92         of_irq_init(irq_match);
  93         l2x0_of_init(0, ~0UL);
  94 }
  95
  96 static void __init highbank_timer_init(void)
  97 {
  98         int irq;
  99         struct device_node *np;
 100         void __iomem *timer_base;
 101
 102         /* Map system registers */
 103         np = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs");
 104         sregs_base = of_iomap(np, 0);
 105         WARN_ON(!sregs_base);
 106
 107         np = of_find_compatible_node(NULL, NULL, "arm,sp804");
 108         timer_base = of_iomap(np, 0);
 109         WARN_ON(!timer_base);
 110         irq = irq_of_parse_and_map(np, 0);
 111
 112         highbank_clocks_init();
 113
 114         sp804_clocksource_init(timer_base + 0x20, "timer1");
 115         sp804_clockevents_init(timer_base, irq, "timer0");
 116 }
 117
 118 static struct sys_timer highbank_timer = {
 119         .init = highbank_timer_init,
 120 };
 121
 122 static void highbank_power_off(void)
 123 {
 124         hignbank_set_pwr_shutdown();
 125         scu_power_mode(scu_base_addr, SCU_PM_POWEROFF);
 126
 127         while (1)
 128                 cpu_do_idle();
 129 }
 130
 131 static void __init highbank_init(void)
 132 {
 133         pm_power_off = highbank_power_off;
 134
 135         of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
 136 }
 137
 138 static const char *highbank_match[] __initconst = {
 139         "calxeda,highbank",
 140         NULL,
 141 };
 142
 143 DT_MACHINE_START(HIGHBANK, "Highbank")
 144         .map_io         = highbank_map_io,
 145         .init_irq       = highbank_init_irq,
 146         .timer          = &highbank_timer,
 147         .init_machine   = highbank_init,
 148         .dt_compat      = highbank_match,
 149 MACHINE_END