Merge branch 'v4l_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab...
[pandora-kernel.git] / arch / arm / mach-exynos / mach-universal_c210.c
1 /* linux/arch/arm/mach-exynos4/mach-universal_c210.c
2  *
3  * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License version 2 as
7  * published by the Free Software Foundation.
8 */
9
10 #include <linux/platform_device.h>
11 #include <linux/serial_core.h>
12 #include <linux/input.h>
13 #include <linux/i2c.h>
14 #include <linux/gpio_keys.h>
15 #include <linux/gpio.h>
16 #include <linux/interrupt.h>
17 #include <linux/fb.h>
18 #include <linux/mfd/max8998.h>
19 #include <linux/regulator/machine.h>
20 #include <linux/regulator/fixed.h>
21 #include <linux/regulator/max8952.h>
22 #include <linux/mmc/host.h>
23 #include <linux/i2c-gpio.h>
24 #include <linux/i2c/mcs.h>
25 #include <linux/i2c/atmel_mxt_ts.h>
26 #include <linux/platform_data/s3c-hsotg.h>
27 #include <drm/exynos_drm.h>
28
29 #include <asm/mach/arch.h>
30 #include <asm/hardware/gic.h>
31 #include <asm/mach-types.h>
32
33 #include <video/samsung_fimd.h>
34 #include <plat/regs-serial.h>
35 #include <plat/clock.h>
36 #include <plat/cpu.h>
37 #include <plat/devs.h>
38 #include <linux/platform_data/i2c-s3c2410.h>
39 #include <plat/gpio-cfg.h>
40 #include <plat/fb.h>
41 #include <plat/mfc.h>
42 #include <plat/sdhci.h>
43 #include <plat/fimc-core.h>
44 #include <plat/s5p-time.h>
45 #include <plat/camport.h>
46 #include <linux/platform_data/mipi-csis.h>
47
48 #include <mach/map.h>
49
50 #include <media/v4l2-mediabus.h>
51 #include <media/s5p_fimc.h>
52 #include <media/m5mols.h>
53 #include <media/s5k6aa.h>
54
55 #include "common.h"
56
57 /* Following are default values for UCON, ULCON and UFCON UART registers */
58 #define UNIVERSAL_UCON_DEFAULT  (S3C2410_UCON_TXILEVEL |        \
59                                  S3C2410_UCON_RXILEVEL |        \
60                                  S3C2410_UCON_TXIRQMODE |       \
61                                  S3C2410_UCON_RXIRQMODE |       \
62                                  S3C2410_UCON_RXFIFO_TOI |      \
63                                  S3C2443_UCON_RXERR_IRQEN)
64
65 #define UNIVERSAL_ULCON_DEFAULT S3C2410_LCON_CS8
66
67 #define UNIVERSAL_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE |       \
68                                  S5PV210_UFCON_TXTRIG256 |      \
69                                  S5PV210_UFCON_RXTRIG256)
70
71 static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = {
72         [0] = {
73                 .hwport         = 0,
74                 .ucon           = UNIVERSAL_UCON_DEFAULT,
75                 .ulcon          = UNIVERSAL_ULCON_DEFAULT,
76                 .ufcon          = UNIVERSAL_UFCON_DEFAULT,
77         },
78         [1] = {
79                 .hwport         = 1,
80                 .ucon           = UNIVERSAL_UCON_DEFAULT,
81                 .ulcon          = UNIVERSAL_ULCON_DEFAULT,
82                 .ufcon          = UNIVERSAL_UFCON_DEFAULT,
83         },
84         [2] = {
85                 .hwport         = 2,
86                 .ucon           = UNIVERSAL_UCON_DEFAULT,
87                 .ulcon          = UNIVERSAL_ULCON_DEFAULT,
88                 .ufcon          = UNIVERSAL_UFCON_DEFAULT,
89         },
90         [3] = {
91                 .hwport         = 3,
92                 .ucon           = UNIVERSAL_UCON_DEFAULT,
93                 .ulcon          = UNIVERSAL_ULCON_DEFAULT,
94                 .ufcon          = UNIVERSAL_UFCON_DEFAULT,
95         },
96 };
97
98 static struct regulator_consumer_supply max8952_consumer =
99         REGULATOR_SUPPLY("vdd_arm", NULL);
100
101 static struct max8952_platform_data universal_max8952_pdata __initdata = {
102         .gpio_vid0      = EXYNOS4_GPX0(3),
103         .gpio_vid1      = EXYNOS4_GPX0(4),
104         .gpio_en        = -1, /* Not controllable, set "Always High" */
105         .default_mode   = 0, /* vid0 = 0, vid1 = 0 */
106         .dvs_mode       = { 48, 32, 28, 18 }, /* 1.25, 1.20, 1.05, 0.95V */
107         .sync_freq      = 0, /* default: fastest */
108         .ramp_speed     = 0, /* default: fastest */
109
110         .reg_data       = {
111                 .constraints    = {
112                         .name           = "VARM_1.2V",
113                         .min_uV         = 770000,
114                         .max_uV         = 1400000,
115                         .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
116                         .always_on      = 1,
117                         .boot_on        = 1,
118                 },
119                 .num_consumer_supplies  = 1,
120                 .consumer_supplies      = &max8952_consumer,
121         },
122 };
123
124 static struct regulator_consumer_supply lp3974_buck1_consumer =
125         REGULATOR_SUPPLY("vdd_int", NULL);
126
127 static struct regulator_consumer_supply lp3974_buck2_consumer =
128         REGULATOR_SUPPLY("vddg3d", NULL);
129
130 static struct regulator_consumer_supply lp3974_buck3_consumer[] = {
131         REGULATOR_SUPPLY("vdet", "s5p-sdo"),
132         REGULATOR_SUPPLY("vdd_reg", "0-003c"),
133 };
134
135 static struct regulator_init_data lp3974_buck1_data = {
136         .constraints    = {
137                 .name           = "VINT_1.1V",
138                 .min_uV         = 750000,
139                 .max_uV         = 1500000,
140                 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
141                         REGULATOR_CHANGE_STATUS,
142                 .boot_on        = 1,
143                 .state_mem      = {
144                         .disabled       = 1,
145                 },
146         },
147         .num_consumer_supplies = 1,
148         .consumer_supplies = &lp3974_buck1_consumer,
149 };
150
151 static struct regulator_init_data lp3974_buck2_data = {
152         .constraints    = {
153                 .name           = "VG3D_1.1V",
154                 .min_uV         = 750000,
155                 .max_uV         = 1500000,
156                 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
157                         REGULATOR_CHANGE_STATUS,
158                 .boot_on        = 1,
159                 .state_mem      = {
160                         .disabled       = 1,
161                 },
162         },
163         .num_consumer_supplies = 1,
164         .consumer_supplies = &lp3974_buck2_consumer,
165 };
166
167 static struct regulator_init_data lp3974_buck3_data = {
168         .constraints    = {
169                 .name           = "VCC_1.8V",
170                 .min_uV         = 1800000,
171                 .max_uV         = 1800000,
172                 .apply_uV       = 1,
173                 .always_on      = 1,
174                 .state_mem      = {
175                         .enabled        = 1,
176                 },
177         },
178         .num_consumer_supplies = ARRAY_SIZE(lp3974_buck3_consumer),
179         .consumer_supplies = lp3974_buck3_consumer,
180 };
181
182 static struct regulator_init_data lp3974_buck4_data = {
183         .constraints    = {
184                 .name           = "VMEM_1.2V",
185                 .min_uV         = 1200000,
186                 .max_uV         = 1200000,
187                 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
188                 .apply_uV       = 1,
189                 .state_mem      = {
190                         .disabled       = 1,
191                 },
192         },
193 };
194
195 static struct regulator_init_data lp3974_ldo2_data = {
196         .constraints    = {
197                 .name           = "VALIVE_1.2V",
198                 .min_uV         = 1200000,
199                 .max_uV         = 1200000,
200                 .apply_uV       = 1,
201                 .always_on      = 1,
202                 .state_mem      = {
203                         .enabled        = 1,
204                 },
205         },
206 };
207
208 static struct regulator_consumer_supply lp3974_ldo3_consumer[] = {
209         REGULATOR_SUPPLY("vusb_a", "s3c-hsotg"),
210         REGULATOR_SUPPLY("vdd", "exynos4-hdmi"),
211         REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"),
212         REGULATOR_SUPPLY("vddcore", "s5p-mipi-csis.0"),
213 };
214
215 static struct regulator_init_data lp3974_ldo3_data = {
216         .constraints    = {
217                 .name           = "VUSB+MIPI_1.1V",
218                 .min_uV         = 1100000,
219                 .max_uV         = 1100000,
220                 .apply_uV       = 1,
221                 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
222                 .state_mem      = {
223                         .disabled       = 1,
224                 },
225         },
226         .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo3_consumer),
227         .consumer_supplies = lp3974_ldo3_consumer,
228 };
229
230 static struct regulator_consumer_supply lp3974_ldo4_consumer[] = {
231         REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"),
232 };
233
234 static struct regulator_init_data lp3974_ldo4_data = {
235         .constraints    = {
236                 .name           = "VADC_3.3V",
237                 .min_uV         = 3300000,
238                 .max_uV         = 3300000,
239                 .apply_uV       = 1,
240                 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
241                 .state_mem      = {
242                         .disabled       = 1,
243                 },
244         },
245         .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo4_consumer),
246         .consumer_supplies = lp3974_ldo4_consumer,
247 };
248
249 static struct regulator_init_data lp3974_ldo5_data = {
250         .constraints    = {
251                 .name           = "VTF_2.8V",
252                 .min_uV         = 2800000,
253                 .max_uV         = 2800000,
254                 .apply_uV       = 1,
255                 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
256                 .state_mem      = {
257                         .disabled       = 1,
258                 },
259         },
260 };
261
262 static struct regulator_init_data lp3974_ldo6_data = {
263         .constraints    = {
264                 .name           = "LDO6",
265                 .min_uV         = 2000000,
266                 .max_uV         = 2000000,
267                 .apply_uV       = 1,
268                 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
269                 .state_mem      = {
270                         .disabled       = 1,
271                 },
272         },
273 };
274
275 static struct regulator_consumer_supply lp3974_ldo7_consumer[] = {
276         REGULATOR_SUPPLY("vddio", "s5p-mipi-csis.0"),
277 };
278
279 static struct regulator_init_data lp3974_ldo7_data = {
280         .constraints    = {
281                 .name           = "VLCD+VMIPI_1.8V",
282                 .min_uV         = 1800000,
283                 .max_uV         = 1800000,
284                 .apply_uV       = 1,
285                 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
286                 .state_mem      = {
287                         .disabled       = 1,
288                 },
289         },
290         .num_consumer_supplies  = ARRAY_SIZE(lp3974_ldo7_consumer),
291         .consumer_supplies      = lp3974_ldo7_consumer,
292 };
293
294 static struct regulator_consumer_supply lp3974_ldo8_consumer[] = {
295         REGULATOR_SUPPLY("vusb_d", "s3c-hsotg"),
296         REGULATOR_SUPPLY("vdd33a_dac", "s5p-sdo"),
297 };
298
299 static struct regulator_init_data lp3974_ldo8_data = {
300         .constraints    = {
301                 .name           = "VUSB+VDAC_3.3V",
302                 .min_uV         = 3300000,
303                 .max_uV         = 3300000,
304                 .apply_uV       = 1,
305                 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
306                 .state_mem      = {
307                         .disabled       = 1,
308                 },
309         },
310         .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo8_consumer),
311         .consumer_supplies = lp3974_ldo8_consumer,
312 };
313
314 static struct regulator_consumer_supply lp3974_ldo9_consumer =
315         REGULATOR_SUPPLY("vddio", "0-003c");
316
317 static struct regulator_init_data lp3974_ldo9_data = {
318         .constraints    = {
319                 .name           = "VCC_2.8V",
320                 .min_uV         = 2800000,
321                 .max_uV         = 2800000,
322                 .apply_uV       = 1,
323                 .always_on      = 1,
324                 .state_mem      = {
325                         .enabled        = 1,
326                 },
327         },
328         .num_consumer_supplies  = 1,
329         .consumer_supplies      = &lp3974_ldo9_consumer,
330 };
331
332 static struct regulator_init_data lp3974_ldo10_data = {
333         .constraints    = {
334                 .name           = "VPLL_1.1V",
335                 .min_uV         = 1100000,
336                 .max_uV         = 1100000,
337                 .boot_on        = 1,
338                 .apply_uV       = 1,
339                 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
340                 .state_mem      = {
341                         .disabled       = 1,
342                 },
343         },
344 };
345
346 static struct regulator_consumer_supply lp3974_ldo11_consumer =
347         REGULATOR_SUPPLY("dig_28", "0-001f");
348
349 static struct regulator_init_data lp3974_ldo11_data = {
350         .constraints    = {
351                 .name           = "CAM_AF_3.3V",
352                 .min_uV         = 3300000,
353                 .max_uV         = 3300000,
354                 .apply_uV       = 1,
355                 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
356                 .state_mem      = {
357                         .disabled       = 1,
358                 },
359         },
360         .num_consumer_supplies  = 1,
361         .consumer_supplies      = &lp3974_ldo11_consumer,
362 };
363
364 static struct regulator_init_data lp3974_ldo12_data = {
365         .constraints    = {
366                 .name           = "PS_2.8V",
367                 .min_uV         = 2800000,
368                 .max_uV         = 2800000,
369                 .apply_uV       = 1,
370                 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
371                 .state_mem      = {
372                         .disabled       = 1,
373                 },
374         },
375 };
376
377 static struct regulator_init_data lp3974_ldo13_data = {
378         .constraints    = {
379                 .name           = "VHIC_1.2V",
380                 .min_uV         = 1200000,
381                 .max_uV         = 1200000,
382                 .apply_uV       = 1,
383                 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
384                 .state_mem      = {
385                         .disabled       = 1,
386                 },
387         },
388 };
389
390 static struct regulator_consumer_supply lp3974_ldo14_consumer =
391         REGULATOR_SUPPLY("dig_18", "0-001f");
392
393 static struct regulator_init_data lp3974_ldo14_data = {
394         .constraints    = {
395                 .name           = "CAM_I_HOST_1.8V",
396                 .min_uV         = 1800000,
397                 .max_uV         = 1800000,
398                 .apply_uV       = 1,
399                 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
400                 .state_mem      = {
401                         .disabled       = 1,
402                 },
403         },
404         .num_consumer_supplies  = 1,
405         .consumer_supplies      = &lp3974_ldo14_consumer,
406 };
407
408
409 static struct regulator_consumer_supply lp3974_ldo15_consumer =
410         REGULATOR_SUPPLY("dig_12", "0-001f");
411
412 static struct regulator_init_data lp3974_ldo15_data = {
413         .constraints    = {
414                 .name           = "CAM_S_DIG+FM33_CORE_1.2V",
415                 .min_uV         = 1200000,
416                 .max_uV         = 1200000,
417                 .apply_uV       = 1,
418                 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
419                 .state_mem      = {
420                         .disabled       = 1,
421                 },
422         },
423         .num_consumer_supplies  = 1,
424         .consumer_supplies      = &lp3974_ldo15_consumer,
425 };
426
427 static struct regulator_consumer_supply lp3974_ldo16_consumer[] = {
428         REGULATOR_SUPPLY("vdda", "0-003c"),
429         REGULATOR_SUPPLY("a_sensor", "0-001f"),
430 };
431
432 static struct regulator_init_data lp3974_ldo16_data = {
433         .constraints    = {
434                 .name           = "CAM_S_ANA_2.8V",
435                 .min_uV         = 2800000,
436                 .max_uV         = 2800000,
437                 .apply_uV       = 1,
438                 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
439                 .state_mem      = {
440                         .disabled       = 1,
441                 },
442         },
443         .num_consumer_supplies  = ARRAY_SIZE(lp3974_ldo16_consumer),
444         .consumer_supplies      = lp3974_ldo16_consumer,
445 };
446
447 static struct regulator_init_data lp3974_ldo17_data = {
448         .constraints    = {
449                 .name           = "VCC_3.0V_LCD",
450                 .min_uV         = 3000000,
451                 .max_uV         = 3000000,
452                 .apply_uV       = 1,
453                 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
454                 .boot_on        = 1,
455                 .state_mem      = {
456                         .disabled       = 1,
457                 },
458         },
459 };
460
461 static struct regulator_init_data lp3974_32khz_ap_data = {
462         .constraints    = {
463                 .name           = "32KHz AP",
464                 .always_on      = 1,
465                 .state_mem      = {
466                         .enabled        = 1,
467                 },
468         },
469 };
470
471 static struct regulator_init_data lp3974_32khz_cp_data = {
472         .constraints    = {
473                 .name           = "32KHz CP",
474                 .state_mem      = {
475                         .disabled       = 1,
476                 },
477         },
478 };
479
480 static struct regulator_init_data lp3974_vichg_data = {
481         .constraints    = {
482                 .name           = "VICHG",
483                 .state_mem      = {
484                         .disabled       = 1,
485                 },
486         },
487 };
488
489 static struct regulator_init_data lp3974_esafeout1_data = {
490         .constraints    = {
491                 .name           = "SAFEOUT1",
492                 .min_uV         = 4800000,
493                 .max_uV         = 4800000,
494                 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
495                 .always_on      = 1,
496                 .state_mem      = {
497                         .enabled        = 1,
498                 },
499         },
500 };
501
502 static struct regulator_init_data lp3974_esafeout2_data = {
503         .constraints    = {
504                 .name           = "SAFEOUT2",
505                 .boot_on        = 1,
506                 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
507                 .state_mem      = {
508                         .enabled        = 1,
509                 },
510         },
511 };
512
513 static struct max8998_regulator_data lp3974_regulators[] = {
514         { MAX8998_LDO2,  &lp3974_ldo2_data },
515         { MAX8998_LDO3,  &lp3974_ldo3_data },
516         { MAX8998_LDO4,  &lp3974_ldo4_data },
517         { MAX8998_LDO5,  &lp3974_ldo5_data },
518         { MAX8998_LDO6,  &lp3974_ldo6_data },
519         { MAX8998_LDO7,  &lp3974_ldo7_data },
520         { MAX8998_LDO8,  &lp3974_ldo8_data },
521         { MAX8998_LDO9,  &lp3974_ldo9_data },
522         { MAX8998_LDO10, &lp3974_ldo10_data },
523         { MAX8998_LDO11, &lp3974_ldo11_data },
524         { MAX8998_LDO12, &lp3974_ldo12_data },
525         { MAX8998_LDO13, &lp3974_ldo13_data },
526         { MAX8998_LDO14, &lp3974_ldo14_data },
527         { MAX8998_LDO15, &lp3974_ldo15_data },
528         { MAX8998_LDO16, &lp3974_ldo16_data },
529         { MAX8998_LDO17, &lp3974_ldo17_data },
530         { MAX8998_BUCK1, &lp3974_buck1_data },
531         { MAX8998_BUCK2, &lp3974_buck2_data },
532         { MAX8998_BUCK3, &lp3974_buck3_data },
533         { MAX8998_BUCK4, &lp3974_buck4_data },
534         { MAX8998_EN32KHZ_AP, &lp3974_32khz_ap_data },
535         { MAX8998_EN32KHZ_CP, &lp3974_32khz_cp_data },
536         { MAX8998_ENVICHG, &lp3974_vichg_data },
537         { MAX8998_ESAFEOUT1, &lp3974_esafeout1_data },
538         { MAX8998_ESAFEOUT2, &lp3974_esafeout2_data },
539 };
540
541 static struct max8998_platform_data universal_lp3974_pdata = {
542         .num_regulators         = ARRAY_SIZE(lp3974_regulators),
543         .regulators             = lp3974_regulators,
544         .buck1_voltage1         = 1100000,      /* INT */
545         .buck1_voltage2         = 1000000,
546         .buck1_voltage3         = 1100000,
547         .buck1_voltage4         = 1000000,
548         .buck1_set1             = EXYNOS4_GPX0(5),
549         .buck1_set2             = EXYNOS4_GPX0(6),
550         .buck2_voltage1         = 1200000,      /* G3D */
551         .buck2_voltage2         = 1100000,
552         .buck1_default_idx      = 0,
553         .buck2_set3             = EXYNOS4_GPE2(0),
554         .buck2_default_idx      = 0,
555         .wakeup                 = true,
556 };
557
558
559 enum fixed_regulator_id {
560         FIXED_REG_ID_MMC0,
561         FIXED_REG_ID_HDMI_5V,
562         FIXED_REG_ID_CAM_S_IF,
563         FIXED_REG_ID_CAM_I_CORE,
564         FIXED_REG_ID_CAM_VT_DIO,
565 };
566
567 static struct regulator_consumer_supply hdmi_fixed_consumer =
568         REGULATOR_SUPPLY("hdmi-en", "exynos4-hdmi");
569
570 static struct regulator_init_data hdmi_fixed_voltage_init_data = {
571         .constraints            = {
572                 .name           = "HDMI_5V",
573                 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
574         },
575         .num_consumer_supplies  = 1,
576         .consumer_supplies      = &hdmi_fixed_consumer,
577 };
578
579 static struct fixed_voltage_config hdmi_fixed_voltage_config = {
580         .supply_name            = "HDMI_EN1",
581         .microvolts             = 5000000,
582         .gpio                   = EXYNOS4_GPE0(1),
583         .enable_high            = true,
584         .init_data              = &hdmi_fixed_voltage_init_data,
585 };
586
587 static struct platform_device hdmi_fixed_voltage = {
588         .name                   = "reg-fixed-voltage",
589         .id                     = FIXED_REG_ID_HDMI_5V,
590         .dev                    = {
591                 .platform_data  = &hdmi_fixed_voltage_config,
592         },
593 };
594
595 /* GPIO I2C 5 (PMIC) */
596 static struct i2c_board_info i2c5_devs[] __initdata = {
597         {
598                 I2C_BOARD_INFO("max8952", 0xC0 >> 1),
599                 .platform_data  = &universal_max8952_pdata,
600         }, {
601                 I2C_BOARD_INFO("lp3974", 0xCC >> 1),
602                 .platform_data  = &universal_lp3974_pdata,
603         },
604 };
605
606 /* I2C3 (TSP) */
607 static struct mxt_platform_data qt602240_platform_data = {
608         .x_line         = 19,
609         .y_line         = 11,
610         .x_size         = 800,
611         .y_size         = 480,
612         .blen           = 0x11,
613         .threshold      = 0x28,
614         .voltage        = 2800000,              /* 2.8V */
615         .orient         = MXT_DIAGONAL,
616         .irqflags       = IRQF_TRIGGER_FALLING,
617 };
618
619 static struct i2c_board_info i2c3_devs[] __initdata = {
620         {
621                 I2C_BOARD_INFO("qt602240_ts", 0x4a),
622                 .platform_data = &qt602240_platform_data,
623         },
624 };
625
626 static void __init universal_tsp_init(void)
627 {
628         int gpio;
629
630         /* TSP_LDO_ON: XMDMADDR_11 */
631         gpio = EXYNOS4_GPE2(3);
632         gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "TSP_LDO_ON");
633         gpio_export(gpio, 0);
634
635         /* TSP_INT: XMDMADDR_7 */
636         gpio = EXYNOS4_GPE1(7);
637         gpio_request(gpio, "TSP_INT");
638
639         s5p_register_gpio_interrupt(gpio);
640         s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
641         s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
642         i2c3_devs[0].irq = gpio_to_irq(gpio);
643 }
644
645
646 /* GPIO I2C 12 (3 Touchkey) */
647 static uint32_t touchkey_keymap[] = {
648         /* MCS_KEY_MAP(value, keycode) */
649         MCS_KEY_MAP(0, KEY_MENU),               /* KEY_SEND */
650         MCS_KEY_MAP(1, KEY_BACK),               /* KEY_END */
651 };
652
653 static struct mcs_platform_data touchkey_data = {
654         .keymap         = touchkey_keymap,
655         .keymap_size    = ARRAY_SIZE(touchkey_keymap),
656         .key_maxval     = 2,
657 };
658
659 /* GPIO I2C 3_TOUCH 2.8V */
660 #define I2C_GPIO_BUS_12         12
661 static struct i2c_gpio_platform_data i2c_gpio12_data = {
662         .sda_pin        = EXYNOS4_GPE4(0),      /* XMDMDATA_8 */
663         .scl_pin        = EXYNOS4_GPE4(1),      /* XMDMDATA_9 */
664 };
665
666 static struct platform_device i2c_gpio12 = {
667         .name           = "i2c-gpio",
668         .id             = I2C_GPIO_BUS_12,
669         .dev            = {
670                 .platform_data  = &i2c_gpio12_data,
671         },
672 };
673
674 static struct i2c_board_info i2c_gpio12_devs[] __initdata = {
675         {
676                 I2C_BOARD_INFO("mcs5080_touchkey", 0x20),
677                 .platform_data = &touchkey_data,
678         },
679 };
680
681 static void __init universal_touchkey_init(void)
682 {
683         int gpio;
684
685         gpio = EXYNOS4_GPE3(7);                 /* XMDMDATA_7 */
686         gpio_request(gpio, "3_TOUCH_INT");
687         s5p_register_gpio_interrupt(gpio);
688         s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
689         i2c_gpio12_devs[0].irq = gpio_to_irq(gpio);
690
691         gpio = EXYNOS4_GPE3(3);                 /* XMDMDATA_3 */
692         gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "3_TOUCH_EN");
693 }
694
695 static struct s3c2410_platform_i2c universal_i2c0_platdata __initdata = {
696         .frequency      = 300 * 1000,
697         .sda_delay      = 200,
698 };
699
700 /* GPIO KEYS */
701 static struct gpio_keys_button universal_gpio_keys_tables[] = {
702         {
703                 .code                   = KEY_VOLUMEUP,
704                 .gpio                   = EXYNOS4_GPX2(0),      /* XEINT16 */
705                 .desc                   = "gpio-keys: KEY_VOLUMEUP",
706                 .type                   = EV_KEY,
707                 .active_low             = 1,
708                 .debounce_interval      = 1,
709         }, {
710                 .code                   = KEY_VOLUMEDOWN,
711                 .gpio                   = EXYNOS4_GPX2(1),      /* XEINT17 */
712                 .desc                   = "gpio-keys: KEY_VOLUMEDOWN",
713                 .type                   = EV_KEY,
714                 .active_low             = 1,
715                 .debounce_interval      = 1,
716         }, {
717                 .code                   = KEY_CONFIG,
718                 .gpio                   = EXYNOS4_GPX2(2),      /* XEINT18 */
719                 .desc                   = "gpio-keys: KEY_CONFIG",
720                 .type                   = EV_KEY,
721                 .active_low             = 1,
722                 .debounce_interval      = 1,
723         }, {
724                 .code                   = KEY_CAMERA,
725                 .gpio                   = EXYNOS4_GPX2(3),      /* XEINT19 */
726                 .desc                   = "gpio-keys: KEY_CAMERA",
727                 .type                   = EV_KEY,
728                 .active_low             = 1,
729                 .debounce_interval      = 1,
730         }, {
731                 .code                   = KEY_OK,
732                 .gpio                   = EXYNOS4_GPX3(5),      /* XEINT29 */
733                 .desc                   = "gpio-keys: KEY_OK",
734                 .type                   = EV_KEY,
735                 .active_low             = 1,
736                 .debounce_interval      = 1,
737         },
738 };
739
740 static struct gpio_keys_platform_data universal_gpio_keys_data = {
741         .buttons        = universal_gpio_keys_tables,
742         .nbuttons       = ARRAY_SIZE(universal_gpio_keys_tables),
743 };
744
745 static struct platform_device universal_gpio_keys = {
746         .name                   = "gpio-keys",
747         .dev                    = {
748                 .platform_data  = &universal_gpio_keys_data,
749         },
750 };
751
752 /* eMMC */
753 static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {
754         .max_width              = 8,
755         .host_caps              = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
756                                 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
757         .host_caps2             = MMC_CAP2_BROKEN_VOLTAGE,
758         .cd_type                = S3C_SDHCI_CD_PERMANENT,
759 };
760
761 static struct regulator_consumer_supply mmc0_supplies[] = {
762         REGULATOR_SUPPLY("vmmc", "exynos4-sdhci.0"),
763 };
764
765 static struct regulator_init_data mmc0_fixed_voltage_init_data = {
766         .constraints            = {
767                 .name           = "VMEM_VDD_2.8V",
768                 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
769         },
770         .num_consumer_supplies  = ARRAY_SIZE(mmc0_supplies),
771         .consumer_supplies      = mmc0_supplies,
772 };
773
774 static struct fixed_voltage_config mmc0_fixed_voltage_config = {
775         .supply_name            = "MASSMEMORY_EN",
776         .microvolts             = 2800000,
777         .gpio                   = EXYNOS4_GPE1(3),
778         .enable_high            = true,
779         .init_data              = &mmc0_fixed_voltage_init_data,
780 };
781
782 static struct platform_device mmc0_fixed_voltage = {
783         .name                   = "reg-fixed-voltage",
784         .id                     = FIXED_REG_ID_MMC0,
785         .dev                    = {
786                 .platform_data  = &mmc0_fixed_voltage_config,
787         },
788 };
789
790 /* SD */
791 static struct s3c_sdhci_platdata universal_hsmmc2_data __initdata = {
792         .max_width              = 4,
793         .host_caps              = MMC_CAP_4_BIT_DATA |
794                                 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
795         .ext_cd_gpio            = EXYNOS4_GPX3(4),      /* XEINT_28 */
796         .ext_cd_gpio_invert     = 1,
797         .cd_type                = S3C_SDHCI_CD_GPIO,
798 };
799
800 /* WiFi */
801 static struct s3c_sdhci_platdata universal_hsmmc3_data __initdata = {
802         .max_width              = 4,
803         .host_caps              = MMC_CAP_4_BIT_DATA |
804                                 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
805         .cd_type                = S3C_SDHCI_CD_EXTERNAL,
806 };
807
808 static void __init universal_sdhci_init(void)
809 {
810         s3c_sdhci0_set_platdata(&universal_hsmmc0_data);
811         s3c_sdhci2_set_platdata(&universal_hsmmc2_data);
812         s3c_sdhci3_set_platdata(&universal_hsmmc3_data);
813 }
814
815 /* I2C1 */
816 static struct i2c_board_info i2c1_devs[] __initdata = {
817         /* Gyro, To be updated */
818 };
819
820 #ifdef CONFIG_DRM_EXYNOS
821 static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
822         .panel = {
823                 .timing = {
824                         .left_margin    = 16,
825                         .right_margin   = 16,
826                         .upper_margin   = 2,
827                         .lower_margin   = 28,
828                         .hsync_len      = 2,
829                         .vsync_len      = 1,
830                         .xres           = 480,
831                         .yres           = 800,
832                         .refresh        = 55,
833                 },
834         },
835         .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
836                           VIDCON0_CLKSEL_LCD,
837         .vidcon1        = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
838                           | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
839         .default_win    = 3,
840         .bpp            = 32,
841 };
842 #else
843 /* Frame Buffer */
844 static struct s3c_fb_pd_win universal_fb_win0 = {
845         .max_bpp        = 32,
846         .default_bpp    = 16,
847         .xres           = 480,
848         .yres           = 800,
849         .virtual_x      = 480,
850         .virtual_y      = 2 * 800,
851 };
852
853 static struct fb_videomode universal_lcd_timing = {
854         .left_margin    = 16,
855         .right_margin   = 16,
856         .upper_margin   = 2,
857         .lower_margin   = 28,
858         .hsync_len      = 2,
859         .vsync_len      = 1,
860         .xres           = 480,
861         .yres           = 800,
862         .refresh        = 55,
863 };
864
865 static struct s3c_fb_platdata universal_lcd_pdata __initdata = {
866         .win[0]         = &universal_fb_win0,
867         .vtiming        = &universal_lcd_timing,
868         .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
869                           VIDCON0_CLKSEL_LCD,
870         .vidcon1        = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
871                           | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
872         .setup_gpio     = exynos4_fimd0_gpio_setup_24bpp,
873 };
874 #endif
875
876 static struct regulator_consumer_supply cam_vt_dio_supply =
877         REGULATOR_SUPPLY("vdd_core", "0-003c");
878
879 static struct regulator_init_data cam_vt_dio_reg_init_data = {
880         .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
881         .num_consumer_supplies = 1,
882         .consumer_supplies = &cam_vt_dio_supply,
883 };
884
885 static struct fixed_voltage_config cam_vt_dio_fixed_voltage_cfg = {
886         .supply_name    = "CAM_VT_D_IO",
887         .microvolts     = 2800000,
888         .gpio           = EXYNOS4_GPE2(1), /* CAM_PWR_EN2 */
889         .enable_high    = 1,
890         .init_data      = &cam_vt_dio_reg_init_data,
891 };
892
893 static struct platform_device cam_vt_dio_fixed_reg_dev = {
894         .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_VT_DIO,
895         .dev = { .platform_data = &cam_vt_dio_fixed_voltage_cfg },
896 };
897
898 static struct regulator_consumer_supply cam_i_core_supply =
899         REGULATOR_SUPPLY("core", "0-001f");
900
901 static struct regulator_init_data cam_i_core_reg_init_data = {
902         .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
903         .num_consumer_supplies = 1,
904         .consumer_supplies = &cam_i_core_supply,
905 };
906
907 static struct fixed_voltage_config cam_i_core_fixed_voltage_cfg = {
908         .supply_name    = "CAM_I_CORE_1.2V",
909         .microvolts     = 1200000,
910         .gpio           = EXYNOS4_GPE2(2),      /* CAM_8M_CORE_EN */
911         .enable_high    = 1,
912         .init_data      = &cam_i_core_reg_init_data,
913 };
914
915 static struct platform_device cam_i_core_fixed_reg_dev = {
916         .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_I_CORE,
917         .dev = { .platform_data = &cam_i_core_fixed_voltage_cfg },
918 };
919
920 static struct regulator_consumer_supply cam_s_if_supply =
921         REGULATOR_SUPPLY("d_sensor", "0-001f");
922
923 static struct regulator_init_data cam_s_if_reg_init_data = {
924         .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
925         .num_consumer_supplies = 1,
926         .consumer_supplies = &cam_s_if_supply,
927 };
928
929 static struct fixed_voltage_config cam_s_if_fixed_voltage_cfg = {
930         .supply_name    = "CAM_S_IF_1.8V",
931         .microvolts     = 1800000,
932         .gpio           = EXYNOS4_GPE3(0),      /* CAM_PWR_EN1 */
933         .enable_high    = 1,
934         .init_data      = &cam_s_if_reg_init_data,
935 };
936
937 static struct platform_device cam_s_if_fixed_reg_dev = {
938         .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_S_IF,
939         .dev = { .platform_data = &cam_s_if_fixed_voltage_cfg },
940 };
941
942 static struct s5p_platform_mipi_csis mipi_csis_platdata = {
943         .clk_rate       = 166000000UL,
944         .lanes          = 2,
945         .hs_settle      = 12,
946 };
947
948 #define GPIO_CAM_LEVEL_EN(n)    EXYNOS4_GPE4(n + 3)
949 #define GPIO_CAM_8M_ISP_INT     EXYNOS4_GPX1(5) /* XEINT_13 */
950 #define GPIO_CAM_MEGA_nRST      EXYNOS4_GPE2(5)
951 #define GPIO_CAM_VGA_NRST       EXYNOS4_GPE4(7)
952 #define GPIO_CAM_VGA_NSTBY      EXYNOS4_GPE4(6)
953
954 static int s5k6aa_set_power(int on)
955 {
956         gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on);
957         return 0;
958 }
959
960 static struct s5k6aa_platform_data s5k6aa_platdata = {
961         .mclk_frequency = 21600000UL,
962         .gpio_reset     = { GPIO_CAM_VGA_NRST, 0 },
963         .gpio_stby      = { GPIO_CAM_VGA_NSTBY, 0 },
964         .bus_type       = V4L2_MBUS_PARALLEL,
965         .horiz_flip     = 1,
966         .set_power      = s5k6aa_set_power,
967 };
968
969 static struct i2c_board_info s5k6aa_board_info = {
970         I2C_BOARD_INFO("S5K6AA", 0x3C),
971         .platform_data = &s5k6aa_platdata,
972 };
973
974 static int m5mols_set_power(struct device *dev, int on)
975 {
976         gpio_set_value(GPIO_CAM_LEVEL_EN(1), !on);
977         gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on);
978         return 0;
979 }
980
981 static struct m5mols_platform_data m5mols_platdata = {
982         .gpio_reset     = GPIO_CAM_MEGA_nRST,
983         .reset_polarity = 0,
984         .set_power      = m5mols_set_power,
985 };
986
987 static struct i2c_board_info m5mols_board_info = {
988         I2C_BOARD_INFO("M5MOLS", 0x1F),
989         .platform_data = &m5mols_platdata,
990 };
991
992 static struct s5p_fimc_isp_info universal_camera_sensors[] = {
993         {
994                 .mux_id         = 0,
995                 .flags          = V4L2_MBUS_PCLK_SAMPLE_FALLING |
996                                   V4L2_MBUS_VSYNC_ACTIVE_LOW,
997                 .bus_type       = FIMC_ITU_601,
998                 .board_info     = &s5k6aa_board_info,
999                 .i2c_bus_num    = 0,
1000                 .clk_frequency  = 24000000UL,
1001         }, {
1002                 .mux_id         = 0,
1003                 .flags          = V4L2_MBUS_PCLK_SAMPLE_FALLING |
1004                                   V4L2_MBUS_VSYNC_ACTIVE_LOW,
1005                 .bus_type       = FIMC_MIPI_CSI2,
1006                 .board_info     = &m5mols_board_info,
1007                 .i2c_bus_num    = 0,
1008                 .clk_frequency  = 24000000UL,
1009         },
1010 };
1011
1012 static struct s5p_platform_fimc fimc_md_platdata = {
1013         .isp_info       = universal_camera_sensors,
1014         .num_clients    = ARRAY_SIZE(universal_camera_sensors),
1015 };
1016
1017 static struct gpio universal_camera_gpios[] = {
1018         { GPIO_CAM_LEVEL_EN(1), GPIOF_OUT_INIT_HIGH, "CAM_LVL_EN1" },
1019         { GPIO_CAM_LEVEL_EN(2), GPIOF_OUT_INIT_LOW,  "CAM_LVL_EN2" },
1020         { GPIO_CAM_8M_ISP_INT,  GPIOF_IN,            "8M_ISP_INT"  },
1021         { GPIO_CAM_MEGA_nRST,   GPIOF_OUT_INIT_LOW,  "CAM_8M_NRST" },
1022         { GPIO_CAM_VGA_NRST,    GPIOF_OUT_INIT_LOW,  "CAM_VGA_NRST"  },
1023         { GPIO_CAM_VGA_NSTBY,   GPIOF_OUT_INIT_LOW,  "CAM_VGA_NSTBY" },
1024 };
1025
1026 /* USB OTG */
1027 static struct s3c_hsotg_plat universal_hsotg_pdata;
1028
1029 static void __init universal_camera_init(void)
1030 {
1031         s3c_set_platdata(&mipi_csis_platdata, sizeof(mipi_csis_platdata),
1032                          &s5p_device_mipi_csis0);
1033         s3c_set_platdata(&fimc_md_platdata,  sizeof(fimc_md_platdata),
1034                          &s5p_device_fimc_md);
1035
1036         if (gpio_request_array(universal_camera_gpios,
1037                                ARRAY_SIZE(universal_camera_gpios))) {
1038                 pr_err("%s: GPIO request failed\n", __func__);
1039                 return;
1040         }
1041
1042         if (!s3c_gpio_cfgpin(GPIO_CAM_8M_ISP_INT, S3C_GPIO_SFN(0xf)))
1043                 m5mols_board_info.irq = gpio_to_irq(GPIO_CAM_8M_ISP_INT);
1044         else
1045                 pr_err("Failed to configure 8M_ISP_INT GPIO\n");
1046
1047         /* Free GPIOs controlled directly by the sensor drivers. */
1048         gpio_free(GPIO_CAM_MEGA_nRST);
1049         gpio_free(GPIO_CAM_8M_ISP_INT);
1050         gpio_free(GPIO_CAM_VGA_NRST);
1051         gpio_free(GPIO_CAM_VGA_NSTBY);
1052
1053         if (exynos4_fimc_setup_gpio(S5P_CAMPORT_A))
1054                 pr_err("Camera port A setup failed\n");
1055 }
1056
1057 static struct platform_device *universal_devices[] __initdata = {
1058         /* Samsung Platform Devices */
1059         &s5p_device_mipi_csis0,
1060         &s5p_device_fimc0,
1061         &s5p_device_fimc1,
1062         &s5p_device_fimc2,
1063         &s5p_device_fimc3,
1064         &s5p_device_g2d,
1065         &mmc0_fixed_voltage,
1066         &s3c_device_hsmmc0,
1067         &s3c_device_hsmmc2,
1068         &s3c_device_hsmmc3,
1069         &s3c_device_i2c0,
1070         &s3c_device_i2c3,
1071         &s3c_device_i2c5,
1072         &s5p_device_i2c_hdmiphy,
1073         &hdmi_fixed_voltage,
1074         &s5p_device_hdmi,
1075         &s5p_device_sdo,
1076         &s5p_device_mixer,
1077
1078         /* Universal Devices */
1079         &i2c_gpio12,
1080         &universal_gpio_keys,
1081         &s5p_device_onenand,
1082         &s5p_device_fimd0,
1083         &s5p_device_jpeg,
1084 #ifdef CONFIG_DRM_EXYNOS
1085         &exynos_device_drm,
1086 #endif
1087         &s3c_device_usb_hsotg,
1088         &s5p_device_mfc,
1089         &s5p_device_mfc_l,
1090         &s5p_device_mfc_r,
1091         &cam_vt_dio_fixed_reg_dev,
1092         &cam_i_core_fixed_reg_dev,
1093         &cam_s_if_fixed_reg_dev,
1094         &s5p_device_fimc_md,
1095 };
1096
1097 static void __init universal_map_io(void)
1098 {
1099         exynos_init_io(NULL, 0);
1100         s3c24xx_init_clocks(clk_xusbxti.rate);
1101         s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
1102         s5p_set_timer_source(S5P_PWM2, S5P_PWM4);
1103 }
1104
1105 static void s5p_tv_setup(void)
1106 {
1107         /* direct HPD to HDMI chip */
1108         gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug");
1109         s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
1110         s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
1111 }
1112
1113 static void __init universal_reserve(void)
1114 {
1115         s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
1116 }
1117
1118 static void __init universal_machine_init(void)
1119 {
1120         universal_sdhci_init();
1121         s5p_tv_setup();
1122
1123         s3c_i2c0_set_platdata(&universal_i2c0_platdata);
1124         i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs));
1125
1126         universal_tsp_init();
1127         s3c_i2c3_set_platdata(NULL);
1128         i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs));
1129
1130         s3c_i2c5_set_platdata(NULL);
1131         s5p_i2c_hdmiphy_set_platdata(NULL);
1132         i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs));
1133
1134 #ifdef CONFIG_DRM_EXYNOS
1135         s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
1136         exynos4_fimd0_gpio_setup_24bpp();
1137 #else
1138         s5p_fimd0_set_platdata(&universal_lcd_pdata);
1139 #endif
1140
1141         universal_touchkey_init();
1142         i2c_register_board_info(I2C_GPIO_BUS_12, i2c_gpio12_devs,
1143                         ARRAY_SIZE(i2c_gpio12_devs));
1144
1145         s3c_hsotg_set_platdata(&universal_hsotg_pdata);
1146         universal_camera_init();
1147
1148         /* Last */
1149         platform_add_devices(universal_devices, ARRAY_SIZE(universal_devices));
1150 }
1151
1152 MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
1153         /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */
1154         .atag_offset    = 0x100,
1155         .smp            = smp_ops(exynos_smp_ops),
1156         .init_irq       = exynos4_init_irq,
1157         .map_io         = universal_map_io,
1158         .handle_irq     = gic_handle_irq,
1159         .init_machine   = universal_machine_init,
1160         .init_late      = exynos_init_late,
1161         .timer          = &s5p_timer,
1162         .reserve        = &universal_reserve,
1163         .restart        = exynos4_restart,
1164 MACHINE_END