Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[pandora-kernel.git] / arch / arm / mach-exynos / mach-smdk4x12.c
1 /*
2  * linux/arch/arm/mach-exynos4/mach-smdk4x12.c
3  *
4  * Copyright (c) 2011 Samsung Electronics Co., Ltd.
5  *              http://www.samsung.com
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10 */
11
12 #include <linux/gpio.h>
13 #include <linux/i2c.h>
14 #include <linux/input.h>
15 #include <linux/io.h>
16 #include <linux/lcd.h>
17 #include <linux/mfd/max8997.h>
18 #include <linux/mmc/host.h>
19 #include <linux/platform_device.h>
20 #include <linux/pwm_backlight.h>
21 #include <linux/regulator/machine.h>
22 #include <linux/serial_core.h>
23 #include <linux/platform_data/s3c-hsotg.h>
24
25 #include <asm/mach/arch.h>
26 #include <asm/hardware/gic.h>
27 #include <asm/mach-types.h>
28
29 #include <plat/backlight.h>
30 #include <plat/clock.h>
31 #include <plat/cpu.h>
32 #include <plat/devs.h>
33 #include <plat/fb.h>
34 #include <plat/gpio-cfg.h>
35 #include <plat/iic.h>
36 #include <plat/keypad.h>
37 #include <plat/mfc.h>
38 #include <plat/regs-fb.h>
39 #include <plat/regs-serial.h>
40 #include <plat/sdhci.h>
41
42 #include <mach/map.h>
43
44 #include <drm/exynos_drm.h>
45 #include "common.h"
46
47 /* Following are default values for UCON, ULCON and UFCON UART registers */
48 #define SMDK4X12_UCON_DEFAULT   (S3C2410_UCON_TXILEVEL |        \
49                                  S3C2410_UCON_RXILEVEL |        \
50                                  S3C2410_UCON_TXIRQMODE |       \
51                                  S3C2410_UCON_RXIRQMODE |       \
52                                  S3C2410_UCON_RXFIFO_TOI |      \
53                                  S3C2443_UCON_RXERR_IRQEN)
54
55 #define SMDK4X12_ULCON_DEFAULT  S3C2410_LCON_CS8
56
57 #define SMDK4X12_UFCON_DEFAULT  (S3C2410_UFCON_FIFOMODE |       \
58                                  S5PV210_UFCON_TXTRIG4 |        \
59                                  S5PV210_UFCON_RXTRIG4)
60
61 static struct s3c2410_uartcfg smdk4x12_uartcfgs[] __initdata = {
62         [0] = {
63                 .hwport         = 0,
64                 .flags          = 0,
65                 .ucon           = SMDK4X12_UCON_DEFAULT,
66                 .ulcon          = SMDK4X12_ULCON_DEFAULT,
67                 .ufcon          = SMDK4X12_UFCON_DEFAULT,
68         },
69         [1] = {
70                 .hwport         = 1,
71                 .flags          = 0,
72                 .ucon           = SMDK4X12_UCON_DEFAULT,
73                 .ulcon          = SMDK4X12_ULCON_DEFAULT,
74                 .ufcon          = SMDK4X12_UFCON_DEFAULT,
75         },
76         [2] = {
77                 .hwport         = 2,
78                 .flags          = 0,
79                 .ucon           = SMDK4X12_UCON_DEFAULT,
80                 .ulcon          = SMDK4X12_ULCON_DEFAULT,
81                 .ufcon          = SMDK4X12_UFCON_DEFAULT,
82         },
83         [3] = {
84                 .hwport         = 3,
85                 .flags          = 0,
86                 .ucon           = SMDK4X12_UCON_DEFAULT,
87                 .ulcon          = SMDK4X12_ULCON_DEFAULT,
88                 .ufcon          = SMDK4X12_UFCON_DEFAULT,
89         },
90 };
91
92 static struct s3c_sdhci_platdata smdk4x12_hsmmc2_pdata __initdata = {
93         .cd_type                = S3C_SDHCI_CD_INTERNAL,
94 #ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
95         .max_width              = 8,
96         .host_caps              = MMC_CAP_8_BIT_DATA,
97 #endif
98 };
99
100 static struct s3c_sdhci_platdata smdk4x12_hsmmc3_pdata __initdata = {
101         .cd_type                = S3C_SDHCI_CD_INTERNAL,
102 };
103
104 static struct regulator_consumer_supply max8997_buck1 =
105         REGULATOR_SUPPLY("vdd_arm", NULL);
106
107 static struct regulator_consumer_supply max8997_buck2 =
108         REGULATOR_SUPPLY("vdd_int", NULL);
109
110 static struct regulator_consumer_supply max8997_buck3 =
111         REGULATOR_SUPPLY("vdd_g3d", NULL);
112
113 static struct regulator_init_data max8997_buck1_data = {
114         .constraints    = {
115                 .name           = "VDD_ARM_SMDK4X12",
116                 .min_uV         = 925000,
117                 .max_uV         = 1350000,
118                 .always_on      = 1,
119                 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
120                 .state_mem      = {
121                         .disabled       = 1,
122                 },
123         },
124         .num_consumer_supplies  = 1,
125         .consumer_supplies      = &max8997_buck1,
126 };
127
128 static struct regulator_init_data max8997_buck2_data = {
129         .constraints    = {
130                 .name           = "VDD_INT_SMDK4X12",
131                 .min_uV         = 950000,
132                 .max_uV         = 1150000,
133                 .always_on      = 1,
134                 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
135                 .state_mem      = {
136                         .disabled       = 1,
137                 },
138         },
139         .num_consumer_supplies  = 1,
140         .consumer_supplies      = &max8997_buck2,
141 };
142
143 static struct regulator_init_data max8997_buck3_data = {
144         .constraints    = {
145                 .name           = "VDD_G3D_SMDK4X12",
146                 .min_uV         = 950000,
147                 .max_uV         = 1150000,
148                 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
149                                   REGULATOR_CHANGE_STATUS,
150                 .state_mem      = {
151                         .disabled       = 1,
152                 },
153         },
154         .num_consumer_supplies  = 1,
155         .consumer_supplies      = &max8997_buck3,
156 };
157
158 static struct max8997_regulator_data smdk4x12_max8997_regulators[] = {
159         { MAX8997_BUCK1, &max8997_buck1_data },
160         { MAX8997_BUCK2, &max8997_buck2_data },
161         { MAX8997_BUCK3, &max8997_buck3_data },
162 };
163
164 static struct max8997_platform_data smdk4x12_max8997_pdata = {
165         .num_regulators = ARRAY_SIZE(smdk4x12_max8997_regulators),
166         .regulators     = smdk4x12_max8997_regulators,
167
168         .buck1_voltage[0] = 1100000,    /* 1.1V */
169         .buck1_voltage[1] = 1100000,    /* 1.1V */
170         .buck1_voltage[2] = 1100000,    /* 1.1V */
171         .buck1_voltage[3] = 1100000,    /* 1.1V */
172         .buck1_voltage[4] = 1100000,    /* 1.1V */
173         .buck1_voltage[5] = 1100000,    /* 1.1V */
174         .buck1_voltage[6] = 1000000,    /* 1.0V */
175         .buck1_voltage[7] = 950000,     /* 0.95V */
176
177         .buck2_voltage[0] = 1100000,    /* 1.1V */
178         .buck2_voltage[1] = 1000000,    /* 1.0V */
179         .buck2_voltage[2] = 950000,     /* 0.95V */
180         .buck2_voltage[3] = 900000,     /* 0.9V */
181         .buck2_voltage[4] = 1100000,    /* 1.1V */
182         .buck2_voltage[5] = 1000000,    /* 1.0V */
183         .buck2_voltage[6] = 950000,     /* 0.95V */
184         .buck2_voltage[7] = 900000,     /* 0.9V */
185
186         .buck5_voltage[0] = 1100000,    /* 1.1V */
187         .buck5_voltage[1] = 1100000,    /* 1.1V */
188         .buck5_voltage[2] = 1100000,    /* 1.1V */
189         .buck5_voltage[3] = 1100000,    /* 1.1V */
190         .buck5_voltage[4] = 1100000,    /* 1.1V */
191         .buck5_voltage[5] = 1100000,    /* 1.1V */
192         .buck5_voltage[6] = 1100000,    /* 1.1V */
193         .buck5_voltage[7] = 1100000,    /* 1.1V */
194 };
195
196 static struct i2c_board_info smdk4x12_i2c_devs0[] __initdata = {
197         {
198                 I2C_BOARD_INFO("max8997", 0x66),
199                 .platform_data  = &smdk4x12_max8997_pdata,
200         }
201 };
202
203 static struct i2c_board_info smdk4x12_i2c_devs1[] __initdata = {
204         { I2C_BOARD_INFO("wm8994", 0x1a), }
205 };
206
207 static struct i2c_board_info smdk4x12_i2c_devs3[] __initdata = {
208         /* nothing here yet */
209 };
210
211 static struct i2c_board_info smdk4x12_i2c_devs7[] __initdata = {
212         /* nothing here yet */
213 };
214
215 static struct samsung_bl_gpio_info smdk4x12_bl_gpio_info = {
216         .no = EXYNOS4_GPD0(1),
217         .func = S3C_GPIO_SFN(2),
218 };
219
220 static struct platform_pwm_backlight_data smdk4x12_bl_data = {
221         .pwm_id = 1,
222         .pwm_period_ns  = 1000,
223 };
224
225 static uint32_t smdk4x12_keymap[] __initdata = {
226         /* KEY(row, col, keycode) */
227         KEY(1, 3, KEY_1), KEY(1, 4, KEY_2), KEY(1, 5, KEY_3),
228         KEY(1, 6, KEY_4), KEY(1, 7, KEY_5),
229         KEY(2, 5, KEY_D), KEY(2, 6, KEY_A), KEY(2, 7, KEY_B),
230         KEY(0, 7, KEY_E), KEY(0, 5, KEY_C)
231 };
232
233 static struct matrix_keymap_data smdk4x12_keymap_data __initdata = {
234         .keymap         = smdk4x12_keymap,
235         .keymap_size    = ARRAY_SIZE(smdk4x12_keymap),
236 };
237
238 static struct samsung_keypad_platdata smdk4x12_keypad_data __initdata = {
239         .keymap_data    = &smdk4x12_keymap_data,
240         .rows           = 3,
241         .cols           = 8,
242 };
243
244 #ifdef CONFIG_DRM_EXYNOS
245 static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
246         .panel  = {
247                 .timing = {
248                         .left_margin    = 8,
249                         .right_margin   = 8,
250                         .upper_margin   = 6,
251                         .lower_margin   = 6,
252                         .hsync_len      = 6,
253                         .vsync_len      = 4,
254                         .xres           = 480,
255                         .yres           = 800,
256                 },
257         },
258         .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
259         .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
260         .default_win    = 0,
261         .bpp            = 32,
262 };
263 #else
264 static struct s3c_fb_pd_win smdk4x12_fb_win0 = {
265         .xres           = 480,
266         .yres           = 800,
267         .virtual_x      = 480,
268         .virtual_y      = 800 * 2,
269         .max_bpp        = 32,
270         .default_bpp    = 24,
271 };
272
273 static struct fb_videomode smdk4x12_lcd_timing = {
274         .left_margin    = 8,
275         .right_margin   = 8,
276         .upper_margin   = 6,
277         .lower_margin   = 6,
278         .hsync_len      = 6,
279         .vsync_len      = 4,
280         .xres           = 480,
281         .yres           = 800,
282 };
283
284 static struct s3c_fb_platdata smdk4x12_lcd_pdata __initdata = {
285         .win[0]         = &smdk4x12_fb_win0,
286         .vtiming        = &smdk4x12_lcd_timing,
287         .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
288         .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
289         .setup_gpio     = exynos4_fimd0_gpio_setup_24bpp,
290 };
291 #endif
292
293 /* USB OTG */
294 static struct s3c_hsotg_plat smdk4x12_hsotg_pdata;
295
296 static struct platform_device *smdk4x12_devices[] __initdata = {
297         &s3c_device_hsmmc2,
298         &s3c_device_hsmmc3,
299         &s3c_device_i2c0,
300         &s3c_device_i2c1,
301         &s3c_device_i2c3,
302         &s3c_device_i2c7,
303         &s3c_device_rtc,
304         &s3c_device_usb_hsotg,
305         &s3c_device_wdt,
306         &s5p_device_fimc0,
307         &s5p_device_fimc1,
308         &s5p_device_fimc2,
309         &s5p_device_fimc3,
310         &s5p_device_fimc_md,
311         &s5p_device_fimd0,
312         &s5p_device_mfc,
313         &s5p_device_mfc_l,
314         &s5p_device_mfc_r,
315 #ifdef CONFIG_DRM_EXYNOS
316         &exynos_device_drm,
317 #endif
318         &samsung_device_keypad,
319 };
320
321 static void __init smdk4x12_map_io(void)
322 {
323         exynos_init_io(NULL, 0);
324         s3c24xx_init_clocks(clk_xusbxti.rate);
325         s3c24xx_init_uarts(smdk4x12_uartcfgs, ARRAY_SIZE(smdk4x12_uartcfgs));
326 }
327
328 static void __init smdk4x12_reserve(void)
329 {
330         s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
331 }
332
333 static void __init smdk4x12_machine_init(void)
334 {
335         s3c_i2c0_set_platdata(NULL);
336         i2c_register_board_info(0, smdk4x12_i2c_devs0,
337                                 ARRAY_SIZE(smdk4x12_i2c_devs0));
338
339         s3c_i2c1_set_platdata(NULL);
340         i2c_register_board_info(1, smdk4x12_i2c_devs1,
341                                 ARRAY_SIZE(smdk4x12_i2c_devs1));
342
343         s3c_i2c3_set_platdata(NULL);
344         i2c_register_board_info(3, smdk4x12_i2c_devs3,
345                                 ARRAY_SIZE(smdk4x12_i2c_devs3));
346
347         s3c_i2c7_set_platdata(NULL);
348         i2c_register_board_info(7, smdk4x12_i2c_devs7,
349                                 ARRAY_SIZE(smdk4x12_i2c_devs7));
350
351         samsung_bl_set(&smdk4x12_bl_gpio_info, &smdk4x12_bl_data);
352
353         samsung_keypad_set_platdata(&smdk4x12_keypad_data);
354
355         s3c_sdhci2_set_platdata(&smdk4x12_hsmmc2_pdata);
356         s3c_sdhci3_set_platdata(&smdk4x12_hsmmc3_pdata);
357
358         s3c_hsotg_set_platdata(&smdk4x12_hsotg_pdata);
359
360 #ifdef CONFIG_DRM_EXYNOS
361         s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
362         exynos4_fimd0_gpio_setup_24bpp();
363 #else
364         s5p_fimd0_set_platdata(&smdk4x12_lcd_pdata);
365 #endif
366
367         platform_add_devices(smdk4x12_devices, ARRAY_SIZE(smdk4x12_devices));
368 }
369
370 MACHINE_START(SMDK4212, "SMDK4212")
371         /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
372         .atag_offset    = 0x100,
373         .init_irq       = exynos4_init_irq,
374         .map_io         = smdk4x12_map_io,
375         .handle_irq     = gic_handle_irq,
376         .init_machine   = smdk4x12_machine_init,
377         .timer          = &exynos4_timer,
378         .restart        = exynos4_restart,
379         .reserve        = &smdk4x12_reserve,
380 MACHINE_END
381
382 MACHINE_START(SMDK4412, "SMDK4412")
383         /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
384         /* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */
385         .atag_offset    = 0x100,
386         .init_irq       = exynos4_init_irq,
387         .map_io         = smdk4x12_map_io,
388         .handle_irq     = gic_handle_irq,
389         .init_machine   = smdk4x12_machine_init,
390         .init_late      = exynos_init_late,
391         .timer          = &exynos4_timer,
392         .restart        = exynos4_restart,
393         .reserve        = &smdk4x12_reserve,
394 MACHINE_END