2 * arch/arm/mach-ep93xx/core.c
3 * Core routines for Cirrus EP93xx chips.
5 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
6 * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org>
8 * Thanks go to Michael Burian and Ray Lehtiniemi for their key
9 * role in the ep93xx linux community.
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or (at
14 * your option) any later version.
17 #define pr_fmt(fmt) "ep93xx " KBUILD_MODNAME ": " fmt
19 #include <linux/kernel.h>
20 #include <linux/init.h>
21 #include <linux/platform_device.h>
22 #include <linux/interrupt.h>
23 #include <linux/dma-mapping.h>
24 #include <linux/timex.h>
25 #include <linux/irq.h>
27 #include <linux/gpio.h>
28 #include <linux/leds.h>
29 #include <linux/termios.h>
30 #include <linux/amba/bus.h>
31 #include <linux/amba/serial.h>
32 #include <linux/i2c.h>
33 #include <linux/i2c-gpio.h>
35 #include <mach/hardware.h>
37 #include <mach/ep93xx_keypad.h>
39 #include <asm/mach/map.h>
40 #include <asm/mach/time.h>
42 #include <asm/hardware/vic.h>
45 /*************************************************************************
46 * Static I/O mappings that are needed for all EP93xx platforms
47 *************************************************************************/
48 static struct map_desc ep93xx_io_desc[] __initdata = {
50 .virtual = EP93XX_AHB_VIRT_BASE,
51 .pfn = __phys_to_pfn(EP93XX_AHB_PHYS_BASE),
52 .length = EP93XX_AHB_SIZE,
55 .virtual = EP93XX_APB_VIRT_BASE,
56 .pfn = __phys_to_pfn(EP93XX_APB_PHYS_BASE),
57 .length = EP93XX_APB_SIZE,
62 void __init ep93xx_map_io(void)
64 iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc));
68 /*************************************************************************
69 * Timer handling for EP93xx
70 *************************************************************************
71 * The ep93xx has four internal timers. Timers 1, 2 (both 16 bit) and
72 * 3 (32 bit) count down at 508 kHz, are self-reloading, and can generate
73 * an interrupt on underflow. Timer 4 (40 bit) counts down at 983.04 kHz,
74 * is free-running, and can't generate interrupts.
76 * The 508 kHz timers are ideal for use for the timer interrupt, as the
77 * most common values of HZ divide 508 kHz nicely. We pick one of the 16
78 * bit timers (timer 1) since we don't need more than 16 bits of reload
79 * value as long as HZ >= 8.
81 * The higher clock rate of timer 4 makes it a better choice than the
82 * other timers for use in gettimeoffset(), while the fact that it can't
83 * generate interrupts means we don't have to worry about not being able
84 * to use this timer for something else. We also use timer 4 for keeping
85 * track of lost jiffies.
87 #define EP93XX_TIMER_REG(x) (EP93XX_TIMER_BASE + (x))
88 #define EP93XX_TIMER1_LOAD EP93XX_TIMER_REG(0x00)
89 #define EP93XX_TIMER1_VALUE EP93XX_TIMER_REG(0x04)
90 #define EP93XX_TIMER1_CONTROL EP93XX_TIMER_REG(0x08)
91 #define EP93XX_TIMER123_CONTROL_ENABLE (1 << 7)
92 #define EP93XX_TIMER123_CONTROL_MODE (1 << 6)
93 #define EP93XX_TIMER123_CONTROL_CLKSEL (1 << 3)
94 #define EP93XX_TIMER1_CLEAR EP93XX_TIMER_REG(0x0c)
95 #define EP93XX_TIMER2_LOAD EP93XX_TIMER_REG(0x20)
96 #define EP93XX_TIMER2_VALUE EP93XX_TIMER_REG(0x24)
97 #define EP93XX_TIMER2_CONTROL EP93XX_TIMER_REG(0x28)
98 #define EP93XX_TIMER2_CLEAR EP93XX_TIMER_REG(0x2c)
99 #define EP93XX_TIMER4_VALUE_LOW EP93XX_TIMER_REG(0x60)
100 #define EP93XX_TIMER4_VALUE_HIGH EP93XX_TIMER_REG(0x64)
101 #define EP93XX_TIMER4_VALUE_HIGH_ENABLE (1 << 8)
102 #define EP93XX_TIMER3_LOAD EP93XX_TIMER_REG(0x80)
103 #define EP93XX_TIMER3_VALUE EP93XX_TIMER_REG(0x84)
104 #define EP93XX_TIMER3_CONTROL EP93XX_TIMER_REG(0x88)
105 #define EP93XX_TIMER3_CLEAR EP93XX_TIMER_REG(0x8c)
107 #define EP93XX_TIMER123_CLOCK 508469
108 #define EP93XX_TIMER4_CLOCK 983040
110 #define TIMER1_RELOAD ((EP93XX_TIMER123_CLOCK / HZ) - 1)
111 #define TIMER4_TICKS_PER_JIFFY DIV_ROUND_CLOSEST(CLOCK_TICK_RATE, HZ)
113 static unsigned int last_jiffy_time;
115 static irqreturn_t ep93xx_timer_interrupt(int irq, void *dev_id)
117 /* Writing any value clears the timer interrupt */
118 __raw_writel(1, EP93XX_TIMER1_CLEAR);
120 /* Recover lost jiffies */
122 (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time)
123 >= TIMER4_TICKS_PER_JIFFY) {
124 last_jiffy_time += TIMER4_TICKS_PER_JIFFY;
131 static struct irqaction ep93xx_timer_irq = {
132 .name = "ep93xx timer",
133 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
134 .handler = ep93xx_timer_interrupt,
137 static void __init ep93xx_timer_init(void)
139 u32 tmode = EP93XX_TIMER123_CONTROL_MODE |
140 EP93XX_TIMER123_CONTROL_CLKSEL;
142 /* Enable periodic HZ timer. */
143 __raw_writel(tmode, EP93XX_TIMER1_CONTROL);
144 __raw_writel(TIMER1_RELOAD, EP93XX_TIMER1_LOAD);
145 __raw_writel(tmode | EP93XX_TIMER123_CONTROL_ENABLE,
146 EP93XX_TIMER1_CONTROL);
148 /* Enable lost jiffy timer. */
149 __raw_writel(EP93XX_TIMER4_VALUE_HIGH_ENABLE,
150 EP93XX_TIMER4_VALUE_HIGH);
152 setup_irq(IRQ_EP93XX_TIMER1, &ep93xx_timer_irq);
155 static unsigned long ep93xx_gettimeoffset(void)
159 offset = __raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time;
161 /* Calculate (1000000 / 983040) * offset. */
162 return offset + (53 * offset / 3072);
165 struct sys_timer ep93xx_timer = {
166 .init = ep93xx_timer_init,
167 .offset = ep93xx_gettimeoffset,
171 /*************************************************************************
172 * EP93xx IRQ handling
173 *************************************************************************/
174 extern void ep93xx_gpio_init_irq(void);
176 void __init ep93xx_init_irq(void)
178 vic_init(EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK, 0);
179 vic_init(EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK, 0);
181 ep93xx_gpio_init_irq();
185 /*************************************************************************
186 * EP93xx System Controller Software Locked register handling
187 *************************************************************************/
190 * syscon_swlock prevents anything else from writing to the syscon
191 * block while a software locked register is being written.
193 static DEFINE_SPINLOCK(syscon_swlock);
195 void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg)
199 spin_lock_irqsave(&syscon_swlock, flags);
201 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
202 __raw_writel(val, reg);
204 spin_unlock_irqrestore(&syscon_swlock, flags);
206 EXPORT_SYMBOL(ep93xx_syscon_swlocked_write);
208 void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
213 spin_lock_irqsave(&syscon_swlock, flags);
215 val = __raw_readl(EP93XX_SYSCON_DEVCFG);
218 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
219 __raw_writel(val, EP93XX_SYSCON_DEVCFG);
221 spin_unlock_irqrestore(&syscon_swlock, flags);
223 EXPORT_SYMBOL(ep93xx_devcfg_set_clear);
226 /*************************************************************************
227 * EP93xx peripheral handling
228 *************************************************************************/
229 #define EP93XX_UART_MCR_OFFSET (0x0100)
231 static void ep93xx_uart_set_mctrl(struct amba_device *dev,
232 void __iomem *base, unsigned int mctrl)
237 if (!(mctrl & TIOCM_RTS))
239 if (!(mctrl & TIOCM_DTR))
242 __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET);
245 static struct amba_pl010_data ep93xx_uart_data = {
246 .set_mctrl = ep93xx_uart_set_mctrl,
249 static struct amba_device uart1_device = {
251 .init_name = "apb:uart1",
252 .platform_data = &ep93xx_uart_data,
255 .start = EP93XX_UART1_PHYS_BASE,
256 .end = EP93XX_UART1_PHYS_BASE + 0x0fff,
257 .flags = IORESOURCE_MEM,
259 .irq = { IRQ_EP93XX_UART1, NO_IRQ },
260 .periphid = 0x00041010,
263 static struct amba_device uart2_device = {
265 .init_name = "apb:uart2",
266 .platform_data = &ep93xx_uart_data,
269 .start = EP93XX_UART2_PHYS_BASE,
270 .end = EP93XX_UART2_PHYS_BASE + 0x0fff,
271 .flags = IORESOURCE_MEM,
273 .irq = { IRQ_EP93XX_UART2, NO_IRQ },
274 .periphid = 0x00041010,
277 static struct amba_device uart3_device = {
279 .init_name = "apb:uart3",
280 .platform_data = &ep93xx_uart_data,
283 .start = EP93XX_UART3_PHYS_BASE,
284 .end = EP93XX_UART3_PHYS_BASE + 0x0fff,
285 .flags = IORESOURCE_MEM,
287 .irq = { IRQ_EP93XX_UART3, NO_IRQ },
288 .periphid = 0x00041010,
292 static struct resource ep93xx_rtc_resource[] = {
294 .start = EP93XX_RTC_PHYS_BASE,
295 .end = EP93XX_RTC_PHYS_BASE + 0x10c - 1,
296 .flags = IORESOURCE_MEM,
300 static struct platform_device ep93xx_rtc_device = {
301 .name = "ep93xx-rtc",
303 .num_resources = ARRAY_SIZE(ep93xx_rtc_resource),
304 .resource = ep93xx_rtc_resource,
308 static struct resource ep93xx_ohci_resources[] = {
310 .start = EP93XX_USB_PHYS_BASE,
311 .end = EP93XX_USB_PHYS_BASE + 0x0fff,
312 .flags = IORESOURCE_MEM,
315 .start = IRQ_EP93XX_USB,
316 .end = IRQ_EP93XX_USB,
317 .flags = IORESOURCE_IRQ,
322 static struct platform_device ep93xx_ohci_device = {
323 .name = "ep93xx-ohci",
326 .dma_mask = &ep93xx_ohci_device.dev.coherent_dma_mask,
327 .coherent_dma_mask = DMA_BIT_MASK(32),
329 .num_resources = ARRAY_SIZE(ep93xx_ohci_resources),
330 .resource = ep93xx_ohci_resources,
334 /*************************************************************************
335 * EP93xx ethernet peripheral handling
336 *************************************************************************/
337 static struct ep93xx_eth_data ep93xx_eth_data;
339 static struct resource ep93xx_eth_resource[] = {
341 .start = EP93XX_ETHERNET_PHYS_BASE,
342 .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
343 .flags = IORESOURCE_MEM,
345 .start = IRQ_EP93XX_ETHERNET,
346 .end = IRQ_EP93XX_ETHERNET,
347 .flags = IORESOURCE_IRQ,
351 static struct platform_device ep93xx_eth_device = {
352 .name = "ep93xx-eth",
355 .platform_data = &ep93xx_eth_data,
357 .num_resources = ARRAY_SIZE(ep93xx_eth_resource),
358 .resource = ep93xx_eth_resource,
362 * ep93xx_register_eth - Register the built-in ethernet platform device.
363 * @data: platform specific ethernet configuration (__initdata)
364 * @copy_addr: flag indicating that the MAC address should be copied
365 * from the IndAd registers (as programmed by the bootloader)
367 void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
370 memcpy_fromio(data->dev_addr, EP93XX_ETHERNET_BASE + 0x50, 6);
372 ep93xx_eth_data = *data;
373 platform_device_register(&ep93xx_eth_device);
377 /*************************************************************************
378 * EP93xx i2c peripheral handling
379 *************************************************************************/
380 static struct i2c_gpio_platform_data ep93xx_i2c_data;
382 static struct platform_device ep93xx_i2c_device = {
386 .platform_data = &ep93xx_i2c_data,
391 * ep93xx_register_i2c - Register the i2c platform device.
392 * @data: platform specific i2c-gpio configuration (__initdata)
393 * @devices: platform specific i2c bus device information (__initdata)
394 * @num: the number of devices on the i2c bus
396 void __init ep93xx_register_i2c(struct i2c_gpio_platform_data *data,
397 struct i2c_board_info *devices, int num)
400 * Set the EEPROM interface pin drive type control.
401 * Defines the driver type for the EECLK and EEDAT pins as either
402 * open drain, which will require an external pull-up, or a normal
405 if (data->sda_is_open_drain && data->sda_pin != EP93XX_GPIO_LINE_EEDAT)
406 pr_warning("sda != EEDAT, open drain has no effect\n");
407 if (data->scl_is_open_drain && data->scl_pin != EP93XX_GPIO_LINE_EECLK)
408 pr_warning("scl != EECLK, open drain has no effect\n");
410 __raw_writel((data->sda_is_open_drain << 1) |
411 (data->scl_is_open_drain << 0),
412 EP93XX_GPIO_EEDRIVE);
414 ep93xx_i2c_data = *data;
415 i2c_register_board_info(0, devices, num);
416 platform_device_register(&ep93xx_i2c_device);
420 /*************************************************************************
422 *************************************************************************/
423 static struct gpio_led ep93xx_led_pins[] = {
425 .name = "platform:grled",
426 .gpio = EP93XX_GPIO_LINE_GRLED,
428 .name = "platform:rdled",
429 .gpio = EP93XX_GPIO_LINE_RDLED,
433 static struct gpio_led_platform_data ep93xx_led_data = {
434 .num_leds = ARRAY_SIZE(ep93xx_led_pins),
435 .leds = ep93xx_led_pins,
438 static struct platform_device ep93xx_leds = {
442 .platform_data = &ep93xx_led_data,
447 /*************************************************************************
448 * EP93xx pwm peripheral handling
449 *************************************************************************/
450 static struct resource ep93xx_pwm0_resource[] = {
452 .start = EP93XX_PWM_PHYS_BASE,
453 .end = EP93XX_PWM_PHYS_BASE + 0x10 - 1,
454 .flags = IORESOURCE_MEM,
458 static struct platform_device ep93xx_pwm0_device = {
459 .name = "ep93xx-pwm",
461 .num_resources = ARRAY_SIZE(ep93xx_pwm0_resource),
462 .resource = ep93xx_pwm0_resource,
465 static struct resource ep93xx_pwm1_resource[] = {
467 .start = EP93XX_PWM_PHYS_BASE + 0x20,
468 .end = EP93XX_PWM_PHYS_BASE + 0x30 - 1,
469 .flags = IORESOURCE_MEM,
473 static struct platform_device ep93xx_pwm1_device = {
474 .name = "ep93xx-pwm",
476 .num_resources = ARRAY_SIZE(ep93xx_pwm1_resource),
477 .resource = ep93xx_pwm1_resource,
480 void __init ep93xx_register_pwm(int pwm0, int pwm1)
483 platform_device_register(&ep93xx_pwm0_device);
485 /* NOTE: EP9307 does not have PWMOUT1 (pin EGPIO14) */
487 platform_device_register(&ep93xx_pwm1_device);
490 int ep93xx_pwm_acquire_gpio(struct platform_device *pdev)
496 } else if (pdev->id == 1) {
497 err = gpio_request(EP93XX_GPIO_LINE_EGPIO14,
498 dev_name(&pdev->dev));
501 err = gpio_direction_output(EP93XX_GPIO_LINE_EGPIO14, 0);
505 /* PWM 1 output on EGPIO[14] */
506 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_PONG);
514 gpio_free(EP93XX_GPIO_LINE_EGPIO14);
517 EXPORT_SYMBOL(ep93xx_pwm_acquire_gpio);
519 void ep93xx_pwm_release_gpio(struct platform_device *pdev)
522 gpio_direction_input(EP93XX_GPIO_LINE_EGPIO14);
523 gpio_free(EP93XX_GPIO_LINE_EGPIO14);
525 /* EGPIO[14] used for GPIO */
526 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_PONG);
529 EXPORT_SYMBOL(ep93xx_pwm_release_gpio);
532 /*************************************************************************
533 * EP93xx video peripheral handling
534 *************************************************************************/
535 static struct ep93xxfb_mach_info ep93xxfb_data;
537 static struct resource ep93xx_fb_resource[] = {
539 .start = EP93XX_RASTER_PHYS_BASE,
540 .end = EP93XX_RASTER_PHYS_BASE + 0x800 - 1,
541 .flags = IORESOURCE_MEM,
545 static struct platform_device ep93xx_fb_device = {
549 .platform_data = &ep93xxfb_data,
550 .coherent_dma_mask = DMA_BIT_MASK(32),
551 .dma_mask = &ep93xx_fb_device.dev.coherent_dma_mask,
553 .num_resources = ARRAY_SIZE(ep93xx_fb_resource),
554 .resource = ep93xx_fb_resource,
558 * ep93xx_register_fb - Register the framebuffer platform device.
559 * @data: platform specific framebuffer configuration (__initdata)
561 void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data)
563 ep93xxfb_data = *data;
564 platform_device_register(&ep93xx_fb_device);
568 /*************************************************************************
569 * EP93xx matrix keypad peripheral handling
570 *************************************************************************/
571 static struct ep93xx_keypad_platform_data ep93xx_keypad_data;
573 static struct resource ep93xx_keypad_resource[] = {
575 .start = EP93XX_KEY_MATRIX_PHYS_BASE,
576 .end = EP93XX_KEY_MATRIX_PHYS_BASE + 0x0c - 1,
577 .flags = IORESOURCE_MEM,
579 .start = IRQ_EP93XX_KEY,
580 .end = IRQ_EP93XX_KEY,
581 .flags = IORESOURCE_IRQ,
585 static struct platform_device ep93xx_keypad_device = {
586 .name = "ep93xx-keypad",
589 .platform_data = &ep93xx_keypad_data,
591 .num_resources = ARRAY_SIZE(ep93xx_keypad_resource),
592 .resource = ep93xx_keypad_resource,
596 * ep93xx_register_keypad - Register the keypad platform device.
597 * @data: platform specific keypad configuration (__initdata)
599 void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data)
601 ep93xx_keypad_data = *data;
602 platform_device_register(&ep93xx_keypad_device);
605 int ep93xx_keypad_acquire_gpio(struct platform_device *pdev)
610 for (i = 0; i < 8; i++) {
611 err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev));
614 err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev));
619 /* Enable the keypad controller; GPIO ports C and D used for keypad */
620 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS |
621 EP93XX_SYSCON_DEVCFG_GONK);
626 gpio_free(EP93XX_GPIO_LINE_C(i));
628 for ( ; i >= 0; --i) {
629 gpio_free(EP93XX_GPIO_LINE_C(i));
630 gpio_free(EP93XX_GPIO_LINE_D(i));
634 EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio);
636 void ep93xx_keypad_release_gpio(struct platform_device *pdev)
640 for (i = 0; i < 8; i++) {
641 gpio_free(EP93XX_GPIO_LINE_C(i));
642 gpio_free(EP93XX_GPIO_LINE_D(i));
645 /* Disable the keypad controller; GPIO ports C and D used for GPIO */
646 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
647 EP93XX_SYSCON_DEVCFG_GONK);
649 EXPORT_SYMBOL(ep93xx_keypad_release_gpio);
652 extern void ep93xx_gpio_init(void);
654 void __init ep93xx_init_devices(void)
656 /* Disallow access to MaverickCrunch initially */
657 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA);
661 amba_device_register(&uart1_device, &iomem_resource);
662 amba_device_register(&uart2_device, &iomem_resource);
663 amba_device_register(&uart3_device, &iomem_resource);
665 platform_device_register(&ep93xx_rtc_device);
666 platform_device_register(&ep93xx_ohci_device);
667 platform_device_register(&ep93xx_leds);