arch/arm/mach-ep93xx/core.c

   1 /*
   2  * arch/arm/mach-ep93xx/core.c
   3  * Core routines for Cirrus EP93xx chips.
   4  *
   5  * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
   6  * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org>
   7  *
   8  * Thanks go to Michael Burian and Ray Lehtiniemi for their key
   9  * role in the ep93xx linux community.
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License as published by
  13  * the Free Software Foundation; either version 2 of the License, or (at
  14  * your option) any later version.
  15  */
  16
  17 #define pr_fmt(fmt) "ep93xx " KBUILD_MODNAME ": " fmt
  18
  19 #include <linux/kernel.h>
  20 #include <linux/init.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/interrupt.h>
  23 #include <linux/dma-mapping.h>
  24 #include <linux/timex.h>
  25 #include <linux/irq.h>
  26 #include <linux/io.h>
  27 #include <linux/gpio.h>
  28 #include <linux/leds.h>
  29 #include <linux/termios.h>
  30 #include <linux/amba/bus.h>
  31 #include <linux/amba/serial.h>
  32 #include <linux/mtd/physmap.h>
  33 #include <linux/i2c.h>
  34 #include <linux/i2c-gpio.h>
  35 #include <linux/spi/spi.h>
  36 #include <linux/export.h>
  37
  38 #include <mach/hardware.h>
  39 #include <mach/fb.h>
  40 #include <mach/ep93xx_keypad.h>
  41 #include <mach/ep93xx_spi.h>
  42 #include <mach/gpio-ep93xx.h>
  43
  44 #include <asm/mach/map.h>
  45 #include <asm/mach/time.h>
  46
  47 #include <asm/hardware/vic.h>
  48
  49 #include "soc.h"
  50
  51 /*************************************************************************
  52  * Static I/O mappings that are needed for all EP93xx platforms
  53  *************************************************************************/
  54 static struct map_desc ep93xx_io_desc[] __initdata = {
  55         {
  56                 .virtual        = EP93XX_AHB_VIRT_BASE,
  57                 .pfn            = __phys_to_pfn(EP93XX_AHB_PHYS_BASE),
  58                 .length         = EP93XX_AHB_SIZE,
  59                 .type           = MT_DEVICE,
  60         }, {
  61                 .virtual        = EP93XX_APB_VIRT_BASE,
  62                 .pfn            = __phys_to_pfn(EP93XX_APB_PHYS_BASE),
  63                 .length         = EP93XX_APB_SIZE,
  64                 .type           = MT_DEVICE,
  65         },
  66 };
  67
  68 void __init ep93xx_map_io(void)
  69 {
  70         iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc));
  71 }
  72
  73
  74 /*************************************************************************
  75  * Timer handling for EP93xx
  76  *************************************************************************
  77  * The ep93xx has four internal timers.  Timers 1, 2 (both 16 bit) and
  78  * 3 (32 bit) count down at 508 kHz, are self-reloading, and can generate
  79  * an interrupt on underflow.  Timer 4 (40 bit) counts down at 983.04 kHz,
  80  * is free-running, and can't generate interrupts.
  81  *
  82  * The 508 kHz timers are ideal for use for the timer interrupt, as the
  83  * most common values of HZ divide 508 kHz nicely.  We pick one of the 16
  84  * bit timers (timer 1) since we don't need more than 16 bits of reload
  85  * value as long as HZ >= 8.
  86  *
  87  * The higher clock rate of timer 4 makes it a better choice than the
  88  * other timers for use in gettimeoffset(), while the fact that it can't
  89  * generate interrupts means we don't have to worry about not being able
  90  * to use this timer for something else.  We also use timer 4 for keeping
  91  * track of lost jiffies.
  92  */
  93 #define EP93XX_TIMER_REG(x)             (EP93XX_TIMER_BASE + (x))
  94 #define EP93XX_TIMER1_LOAD              EP93XX_TIMER_REG(0x00)
  95 #define EP93XX_TIMER1_VALUE             EP93XX_TIMER_REG(0x04)
  96 #define EP93XX_TIMER1_CONTROL           EP93XX_TIMER_REG(0x08)
  97 #define EP93XX_TIMER123_CONTROL_ENABLE  (1 << 7)
  98 #define EP93XX_TIMER123_CONTROL_MODE    (1 << 6)
  99 #define EP93XX_TIMER123_CONTROL_CLKSEL  (1 << 3)
 100 #define EP93XX_TIMER1_CLEAR             EP93XX_TIMER_REG(0x0c)
 101 #define EP93XX_TIMER2_LOAD              EP93XX_TIMER_REG(0x20)
 102 #define EP93XX_TIMER2_VALUE             EP93XX_TIMER_REG(0x24)
 103 #define EP93XX_TIMER2_CONTROL           EP93XX_TIMER_REG(0x28)
 104 #define EP93XX_TIMER2_CLEAR             EP93XX_TIMER_REG(0x2c)
 105 #define EP93XX_TIMER4_VALUE_LOW         EP93XX_TIMER_REG(0x60)
 106 #define EP93XX_TIMER4_VALUE_HIGH        EP93XX_TIMER_REG(0x64)
 107 #define EP93XX_TIMER4_VALUE_HIGH_ENABLE (1 << 8)
 108 #define EP93XX_TIMER3_LOAD              EP93XX_TIMER_REG(0x80)
 109 #define EP93XX_TIMER3_VALUE             EP93XX_TIMER_REG(0x84)
 110 #define EP93XX_TIMER3_CONTROL           EP93XX_TIMER_REG(0x88)
 111 #define EP93XX_TIMER3_CLEAR             EP93XX_TIMER_REG(0x8c)
 112
 113 #define EP93XX_TIMER123_CLOCK           508469
 114 #define EP93XX_TIMER4_CLOCK             983040
 115
 116 #define TIMER1_RELOAD                   ((EP93XX_TIMER123_CLOCK / HZ) - 1)
 117 #define TIMER4_TICKS_PER_JIFFY          DIV_ROUND_CLOSEST(CLOCK_TICK_RATE, HZ)
 118
 119 static unsigned int last_jiffy_time;
 120
 121 static irqreturn_t ep93xx_timer_interrupt(int irq, void *dev_id)
 122 {
 123         /* Writing any value clears the timer interrupt */
 124         __raw_writel(1, EP93XX_TIMER1_CLEAR);
 125
 126         /* Recover lost jiffies */
 127         while ((signed long)
 128                 (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time)
 129                                                 >= TIMER4_TICKS_PER_JIFFY) {
 130                 last_jiffy_time += TIMER4_TICKS_PER_JIFFY;
 131                 timer_tick();
 132         }
 133
 134         return IRQ_HANDLED;
 135 }
 136
 137 static struct irqaction ep93xx_timer_irq = {
 138         .name           = "ep93xx timer",
 139         .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
 140         .handler        = ep93xx_timer_interrupt,
 141 };
 142
 143 static void __init ep93xx_timer_init(void)
 144 {
 145         u32 tmode = EP93XX_TIMER123_CONTROL_MODE |
 146                     EP93XX_TIMER123_CONTROL_CLKSEL;
 147
 148         /* Enable periodic HZ timer.  */
 149         __raw_writel(tmode, EP93XX_TIMER1_CONTROL);
 150         __raw_writel(TIMER1_RELOAD, EP93XX_TIMER1_LOAD);
 151         __raw_writel(tmode | EP93XX_TIMER123_CONTROL_ENABLE,
 152                         EP93XX_TIMER1_CONTROL);
 153
 154         /* Enable lost jiffy timer.  */
 155         __raw_writel(EP93XX_TIMER4_VALUE_HIGH_ENABLE,
 156                         EP93XX_TIMER4_VALUE_HIGH);
 157
 158         setup_irq(IRQ_EP93XX_TIMER1, &ep93xx_timer_irq);
 159 }
 160
 161 static unsigned long ep93xx_gettimeoffset(void)
 162 {
 163         int offset;
 164
 165         offset = __raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time;
 166
 167         /* Calculate (1000000 / 983040) * offset.  */
 168         return offset + (53 * offset / 3072);
 169 }
 170
 171 struct sys_timer ep93xx_timer = {
 172         .init           = ep93xx_timer_init,
 173         .offset         = ep93xx_gettimeoffset,
 174 };
 175
 176
 177 /*************************************************************************
 178  * EP93xx IRQ handling
 179  *************************************************************************/
 180 void __init ep93xx_init_irq(void)
 181 {
 182         vic_init(EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK, 0);
 183         vic_init(EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK, 0);
 184 }
 185
 186
 187 /*************************************************************************
 188  * EP93xx System Controller Software Locked register handling
 189  *************************************************************************/
 190
 191 /*
 192  * syscon_swlock prevents anything else from writing to the syscon
 193  * block while a software locked register is being written.
 194  */
 195 static DEFINE_SPINLOCK(syscon_swlock);
 196
 197 void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg)
 198 {
 199         unsigned long flags;
 200
 201         spin_lock_irqsave(&syscon_swlock, flags);
 202
 203         __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
 204         __raw_writel(val, reg);
 205
 206         spin_unlock_irqrestore(&syscon_swlock, flags);
 207 }
 208
 209 void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
 210 {
 211         unsigned long flags;
 212         unsigned int val;
 213
 214         spin_lock_irqsave(&syscon_swlock, flags);
 215
 216         val = __raw_readl(EP93XX_SYSCON_DEVCFG);
 217         val &= ~clear_bits;
 218         val |= set_bits;
 219         __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
 220         __raw_writel(val, EP93XX_SYSCON_DEVCFG);
 221
 222         spin_unlock_irqrestore(&syscon_swlock, flags);
 223 }
 224
 225 /**
 226  * ep93xx_chip_revision() - returns the EP93xx chip revision
 227  *
 228  * See <mach/platform.h> for more information.
 229  */
 230 unsigned int ep93xx_chip_revision(void)
 231 {
 232         unsigned int v;
 233
 234         v = __raw_readl(EP93XX_SYSCON_SYSCFG);
 235         v &= EP93XX_SYSCON_SYSCFG_REV_MASK;
 236         v >>= EP93XX_SYSCON_SYSCFG_REV_SHIFT;
 237         return v;
 238 }
 239
 240 /*************************************************************************
 241  * EP93xx GPIO
 242  *************************************************************************/
 243 static struct resource ep93xx_gpio_resource[] = {
 244         DEFINE_RES_MEM(EP93XX_GPIO_PHYS_BASE, 0xcc),
 245 };
 246
 247 static struct platform_device ep93xx_gpio_device = {
 248         .name           = "gpio-ep93xx",
 249         .id             = -1,
 250         .num_resources  = ARRAY_SIZE(ep93xx_gpio_resource),
 251         .resource       = ep93xx_gpio_resource,
 252 };
 253
 254 /*************************************************************************
 255  * EP93xx peripheral handling
 256  *************************************************************************/
 257 #define EP93XX_UART_MCR_OFFSET          (0x0100)
 258
 259 static void ep93xx_uart_set_mctrl(struct amba_device *dev,
 260                                   void __iomem *base, unsigned int mctrl)
 261 {
 262         unsigned int mcr;
 263
 264         mcr = 0;
 265         if (mctrl & TIOCM_RTS)
 266                 mcr |= 2;
 267         if (mctrl & TIOCM_DTR)
 268                 mcr |= 1;
 269
 270         __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET);
 271 }
 272
 273 static struct amba_pl010_data ep93xx_uart_data = {
 274         .set_mctrl      = ep93xx_uart_set_mctrl,
 275 };
 276
 277 static AMBA_APB_DEVICE(uart1, "apb:uart1", 0x00041010, EP93XX_UART1_PHYS_BASE,
 278         { IRQ_EP93XX_UART1 }, &ep93xx_uart_data);
 279
 280 static AMBA_APB_DEVICE(uart2, "apb:uart2", 0x00041010, EP93XX_UART2_PHYS_BASE,
 281         { IRQ_EP93XX_UART2 }, &ep93xx_uart_data);
 282
 283 static AMBA_APB_DEVICE(uart3, "apb:uart3", 0x00041010, EP93XX_UART3_PHYS_BASE,
 284         { IRQ_EP93XX_UART3 }, &ep93xx_uart_data);
 285
 286 static struct resource ep93xx_rtc_resource[] = {
 287         DEFINE_RES_MEM(EP93XX_RTC_PHYS_BASE, 0x10c),
 288 };
 289
 290 static struct platform_device ep93xx_rtc_device = {
 291         .name           = "ep93xx-rtc",
 292         .id             = -1,
 293         .num_resources  = ARRAY_SIZE(ep93xx_rtc_resource),
 294         .resource       = ep93xx_rtc_resource,
 295 };
 296
 297
 298 static struct resource ep93xx_ohci_resources[] = {
 299         DEFINE_RES_MEM(EP93XX_USB_PHYS_BASE, 0x1000),
 300         DEFINE_RES_IRQ(IRQ_EP93XX_USB),
 301 };
 302
 303
 304 static struct platform_device ep93xx_ohci_device = {
 305         .name           = "ep93xx-ohci",
 306         .id             = -1,
 307         .dev            = {
 308                 .dma_mask               = &ep93xx_ohci_device.dev.coherent_dma_mask,
 309                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 310         },
 311         .num_resources  = ARRAY_SIZE(ep93xx_ohci_resources),
 312         .resource       = ep93xx_ohci_resources,
 313 };
 314
 315
 316 /*************************************************************************
 317  * EP93xx physmap'ed flash
 318  *************************************************************************/
 319 static struct physmap_flash_data ep93xx_flash_data;
 320
 321 static struct resource ep93xx_flash_resource = {
 322         .flags          = IORESOURCE_MEM,
 323 };
 324
 325 static struct platform_device ep93xx_flash = {
 326         .name           = "physmap-flash",
 327         .id             = 0,
 328         .dev            = {
 329                 .platform_data  = &ep93xx_flash_data,
 330         },
 331         .num_resources  = 1,
 332         .resource       = &ep93xx_flash_resource,
 333 };
 334
 335 /**
 336  * ep93xx_register_flash() - Register the external flash device.
 337  * @width:      bank width in octets
 338  * @start:      resource start address
 339  * @size:       resource size
 340  */
 341 void __init ep93xx_register_flash(unsigned int width,
 342                                   resource_size_t start, resource_size_t size)
 343 {
 344         ep93xx_flash_data.width         = width;
 345
 346         ep93xx_flash_resource.start     = start;
 347         ep93xx_flash_resource.end       = start + size - 1;
 348
 349         platform_device_register(&ep93xx_flash);
 350 }
 351
 352
 353 /*************************************************************************
 354  * EP93xx ethernet peripheral handling
 355  *************************************************************************/
 356 static struct ep93xx_eth_data ep93xx_eth_data;
 357
 358 static struct resource ep93xx_eth_resource[] = {
 359         DEFINE_RES_MEM(EP93XX_ETHERNET_PHYS_BASE, 0x10000),
 360         DEFINE_RES_IRQ(IRQ_EP93XX_ETHERNET),
 361 };
 362
 363 static u64 ep93xx_eth_dma_mask = DMA_BIT_MASK(32);
 364
 365 static struct platform_device ep93xx_eth_device = {
 366         .name           = "ep93xx-eth",
 367         .id             = -1,
 368         .dev            = {
 369                 .platform_data          = &ep93xx_eth_data,
 370                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 371                 .dma_mask               = &ep93xx_eth_dma_mask,
 372         },
 373         .num_resources  = ARRAY_SIZE(ep93xx_eth_resource),
 374         .resource       = ep93xx_eth_resource,
 375 };
 376
 377 /**
 378  * ep93xx_register_eth - Register the built-in ethernet platform device.
 379  * @data:       platform specific ethernet configuration (__initdata)
 380  * @copy_addr:  flag indicating that the MAC address should be copied
 381  *              from the IndAd registers (as programmed by the bootloader)
 382  */
 383 void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
 384 {
 385         if (copy_addr)
 386                 memcpy_fromio(data->dev_addr, EP93XX_ETHERNET_BASE + 0x50, 6);
 387
 388         ep93xx_eth_data = *data;
 389         platform_device_register(&ep93xx_eth_device);
 390 }
 391
 392
 393 /*************************************************************************
 394  * EP93xx i2c peripheral handling
 395  *************************************************************************/
 396 static struct i2c_gpio_platform_data ep93xx_i2c_data;
 397
 398 static struct platform_device ep93xx_i2c_device = {
 399         .name           = "i2c-gpio",
 400         .id             = 0,
 401         .dev            = {
 402                 .platform_data  = &ep93xx_i2c_data,
 403         },
 404 };
 405
 406 /**
 407  * ep93xx_register_i2c - Register the i2c platform device.
 408  * @data:       platform specific i2c-gpio configuration (__initdata)
 409  * @devices:    platform specific i2c bus device information (__initdata)
 410  * @num:        the number of devices on the i2c bus
 411  */
 412 void __init ep93xx_register_i2c(struct i2c_gpio_platform_data *data,
 413                                 struct i2c_board_info *devices, int num)
 414 {
 415         /*
 416          * Set the EEPROM interface pin drive type control.
 417          * Defines the driver type for the EECLK and EEDAT pins as either
 418          * open drain, which will require an external pull-up, or a normal
 419          * CMOS driver.
 420          */
 421         if (data->sda_is_open_drain && data->sda_pin != EP93XX_GPIO_LINE_EEDAT)
 422                 pr_warning("sda != EEDAT, open drain has no effect\n");
 423         if (data->scl_is_open_drain && data->scl_pin != EP93XX_GPIO_LINE_EECLK)
 424                 pr_warning("scl != EECLK, open drain has no effect\n");
 425
 426         __raw_writel((data->sda_is_open_drain << 1) |
 427                      (data->scl_is_open_drain << 0),
 428                      EP93XX_GPIO_EEDRIVE);
 429
 430         ep93xx_i2c_data = *data;
 431         i2c_register_board_info(0, devices, num);
 432         platform_device_register(&ep93xx_i2c_device);
 433 }
 434
 435 /*************************************************************************
 436  * EP93xx SPI peripheral handling
 437  *************************************************************************/
 438 static struct ep93xx_spi_info ep93xx_spi_master_data;
 439
 440 static struct resource ep93xx_spi_resources[] = {
 441         DEFINE_RES_MEM(EP93XX_SPI_PHYS_BASE, 0x18),
 442         DEFINE_RES_IRQ(IRQ_EP93XX_SSP),
 443 };
 444
 445 static u64 ep93xx_spi_dma_mask = DMA_BIT_MASK(32);
 446
 447 static struct platform_device ep93xx_spi_device = {
 448         .name           = "ep93xx-spi",
 449         .id             = 0,
 450         .dev            = {
 451                 .platform_data          = &ep93xx_spi_master_data,
 452                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 453                 .dma_mask               = &ep93xx_spi_dma_mask,
 454         },
 455         .num_resources  = ARRAY_SIZE(ep93xx_spi_resources),
 456         .resource       = ep93xx_spi_resources,
 457 };
 458
 459 /**
 460  * ep93xx_register_spi() - registers spi platform device
 461  * @info: ep93xx board specific spi master info (__initdata)
 462  * @devices: SPI devices to register (__initdata)
 463  * @num: number of SPI devices to register
 464  *
 465  * This function registers platform device for the EP93xx SPI controller and
 466  * also makes sure that SPI pins are muxed so that I2S is not using those pins.
 467  */
 468 void __init ep93xx_register_spi(struct ep93xx_spi_info *info,
 469                                 struct spi_board_info *devices, int num)
 470 {
 471         /*
 472          * When SPI is used, we need to make sure that I2S is muxed off from
 473          * SPI pins.
 474          */
 475         ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONSSP);
 476
 477         ep93xx_spi_master_data = *info;
 478         spi_register_board_info(devices, num);
 479         platform_device_register(&ep93xx_spi_device);
 480 }
 481
 482 /*************************************************************************
 483  * EP93xx LEDs
 484  *************************************************************************/
 485 static struct gpio_led ep93xx_led_pins[] = {
 486         {
 487                 .name   = "platform:grled",
 488                 .gpio   = EP93XX_GPIO_LINE_GRLED,
 489         }, {
 490                 .name   = "platform:rdled",
 491                 .gpio   = EP93XX_GPIO_LINE_RDLED,
 492         },
 493 };
 494
 495 static struct gpio_led_platform_data ep93xx_led_data = {
 496         .num_leds       = ARRAY_SIZE(ep93xx_led_pins),
 497         .leds           = ep93xx_led_pins,
 498 };
 499
 500 static struct platform_device ep93xx_leds = {
 501         .name           = "leds-gpio",
 502         .id             = -1,
 503         .dev            = {
 504                 .platform_data  = &ep93xx_led_data,
 505         },
 506 };
 507
 508
 509 /*************************************************************************
 510  * EP93xx pwm peripheral handling
 511  *************************************************************************/
 512 static struct resource ep93xx_pwm0_resource[] = {
 513         DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE, 0x10),
 514 };
 515
 516 static struct platform_device ep93xx_pwm0_device = {
 517         .name           = "ep93xx-pwm",
 518         .id             = 0,
 519         .num_resources  = ARRAY_SIZE(ep93xx_pwm0_resource),
 520         .resource       = ep93xx_pwm0_resource,
 521 };
 522
 523 static struct resource ep93xx_pwm1_resource[] = {
 524         DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE + 0x20, 0x10),
 525 };
 526
 527 static struct platform_device ep93xx_pwm1_device = {
 528         .name           = "ep93xx-pwm",
 529         .id             = 1,
 530         .num_resources  = ARRAY_SIZE(ep93xx_pwm1_resource),
 531         .resource       = ep93xx_pwm1_resource,
 532 };
 533
 534 void __init ep93xx_register_pwm(int pwm0, int pwm1)
 535 {
 536         if (pwm0)
 537                 platform_device_register(&ep93xx_pwm0_device);
 538
 539         /* NOTE: EP9307 does not have PWMOUT1 (pin EGPIO14) */
 540         if (pwm1)
 541                 platform_device_register(&ep93xx_pwm1_device);
 542 }
 543
 544 int ep93xx_pwm_acquire_gpio(struct platform_device *pdev)
 545 {
 546         int err;
 547
 548         if (pdev->id == 0) {
 549                 err = 0;
 550         } else if (pdev->id == 1) {
 551                 err = gpio_request(EP93XX_GPIO_LINE_EGPIO14,
 552                                    dev_name(&pdev->dev));
 553                 if (err)
 554                         return err;
 555                 err = gpio_direction_output(EP93XX_GPIO_LINE_EGPIO14, 0);
 556                 if (err)
 557                         goto fail;
 558
 559                 /* PWM 1 output on EGPIO[14] */
 560                 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_PONG);
 561         } else {
 562                 err = -ENODEV;
 563         }
 564
 565         return err;
 566
 567 fail:
 568         gpio_free(EP93XX_GPIO_LINE_EGPIO14);
 569         return err;
 570 }
 571 EXPORT_SYMBOL(ep93xx_pwm_acquire_gpio);
 572
 573 void ep93xx_pwm_release_gpio(struct platform_device *pdev)
 574 {
 575         if (pdev->id == 1) {
 576                 gpio_direction_input(EP93XX_GPIO_LINE_EGPIO14);
 577                 gpio_free(EP93XX_GPIO_LINE_EGPIO14);
 578
 579                 /* EGPIO[14] used for GPIO */
 580                 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_PONG);
 581         }
 582 }
 583 EXPORT_SYMBOL(ep93xx_pwm_release_gpio);
 584
 585
 586 /*************************************************************************
 587  * EP93xx video peripheral handling
 588  *************************************************************************/
 589 static struct ep93xxfb_mach_info ep93xxfb_data;
 590
 591 static struct resource ep93xx_fb_resource[] = {
 592         DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE, 0x800),
 593 };
 594
 595 static struct platform_device ep93xx_fb_device = {
 596         .name                   = "ep93xx-fb",
 597         .id                     = -1,
 598         .dev                    = {
 599                 .platform_data          = &ep93xxfb_data,
 600                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 601                 .dma_mask               = &ep93xx_fb_device.dev.coherent_dma_mask,
 602         },
 603         .num_resources          = ARRAY_SIZE(ep93xx_fb_resource),
 604         .resource               = ep93xx_fb_resource,
 605 };
 606
 607 /* The backlight use a single register in the framebuffer's register space */
 608 #define EP93XX_RASTER_REG_BRIGHTNESS 0x20
 609
 610 static struct resource ep93xx_bl_resources[] = {
 611         DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE +
 612                        EP93XX_RASTER_REG_BRIGHTNESS, 0x04),
 613 };
 614
 615 static struct platform_device ep93xx_bl_device = {
 616         .name           = "ep93xx-bl",
 617         .id             = -1,
 618         .num_resources  = ARRAY_SIZE(ep93xx_bl_resources),
 619         .resource       = ep93xx_bl_resources,
 620 };
 621
 622 /**
 623  * ep93xx_register_fb - Register the framebuffer platform device.
 624  * @data:       platform specific framebuffer configuration (__initdata)
 625  */
 626 void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data)
 627 {
 628         ep93xxfb_data = *data;
 629         platform_device_register(&ep93xx_fb_device);
 630         platform_device_register(&ep93xx_bl_device);
 631 }
 632
 633
 634 /*************************************************************************
 635  * EP93xx matrix keypad peripheral handling
 636  *************************************************************************/
 637 static struct ep93xx_keypad_platform_data ep93xx_keypad_data;
 638
 639 static struct resource ep93xx_keypad_resource[] = {
 640         DEFINE_RES_MEM(EP93XX_KEY_MATRIX_PHYS_BASE, 0x0c),
 641         DEFINE_RES_IRQ(IRQ_EP93XX_KEY),
 642 };
 643
 644 static struct platform_device ep93xx_keypad_device = {
 645         .name           = "ep93xx-keypad",
 646         .id             = -1,
 647         .dev            = {
 648                 .platform_data  = &ep93xx_keypad_data,
 649         },
 650         .num_resources  = ARRAY_SIZE(ep93xx_keypad_resource),
 651         .resource       = ep93xx_keypad_resource,
 652 };
 653
 654 /**
 655  * ep93xx_register_keypad - Register the keypad platform device.
 656  * @data:       platform specific keypad configuration (__initdata)
 657  */
 658 void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data)
 659 {
 660         ep93xx_keypad_data = *data;
 661         platform_device_register(&ep93xx_keypad_device);
 662 }
 663
 664 int ep93xx_keypad_acquire_gpio(struct platform_device *pdev)
 665 {
 666         int err;
 667         int i;
 668
 669         for (i = 0; i < 8; i++) {
 670                 err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev));
 671                 if (err)
 672                         goto fail_gpio_c;
 673                 err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev));
 674                 if (err)
 675                         goto fail_gpio_d;
 676         }
 677
 678         /* Enable the keypad controller; GPIO ports C and D used for keypad */
 679         ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS |
 680                                  EP93XX_SYSCON_DEVCFG_GONK);
 681
 682         return 0;
 683
 684 fail_gpio_d:
 685         gpio_free(EP93XX_GPIO_LINE_C(i));
 686 fail_gpio_c:
 687         for ( ; i >= 0; --i) {
 688                 gpio_free(EP93XX_GPIO_LINE_C(i));
 689                 gpio_free(EP93XX_GPIO_LINE_D(i));
 690         }
 691         return err;
 692 }
 693 EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio);
 694
 695 void ep93xx_keypad_release_gpio(struct platform_device *pdev)
 696 {
 697         int i;
 698
 699         for (i = 0; i < 8; i++) {
 700                 gpio_free(EP93XX_GPIO_LINE_C(i));
 701                 gpio_free(EP93XX_GPIO_LINE_D(i));
 702         }
 703
 704         /* Disable the keypad controller; GPIO ports C and D used for GPIO */
 705         ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
 706                                EP93XX_SYSCON_DEVCFG_GONK);
 707 }
 708 EXPORT_SYMBOL(ep93xx_keypad_release_gpio);
 709
 710 /*************************************************************************
 711  * EP93xx I2S audio peripheral handling
 712  *************************************************************************/
 713 static struct resource ep93xx_i2s_resource[] = {
 714         DEFINE_RES_MEM(EP93XX_I2S_PHYS_BASE, 0x100),
 715 };
 716
 717 static struct platform_device ep93xx_i2s_device = {
 718         .name           = "ep93xx-i2s",
 719         .id             = -1,
 720         .num_resources  = ARRAY_SIZE(ep93xx_i2s_resource),
 721         .resource       = ep93xx_i2s_resource,
 722 };
 723
 724 static struct platform_device ep93xx_pcm_device = {
 725         .name           = "ep93xx-pcm-audio",
 726         .id             = -1,
 727 };
 728
 729 void __init ep93xx_register_i2s(void)
 730 {
 731         platform_device_register(&ep93xx_i2s_device);
 732         platform_device_register(&ep93xx_pcm_device);
 733 }
 734
 735 #define EP93XX_SYSCON_DEVCFG_I2S_MASK   (EP93XX_SYSCON_DEVCFG_I2SONSSP | \
 736                                          EP93XX_SYSCON_DEVCFG_I2SONAC97)
 737
 738 #define EP93XX_I2SCLKDIV_MASK           (EP93XX_SYSCON_I2SCLKDIV_ORIDE | \
 739                                          EP93XX_SYSCON_I2SCLKDIV_SPOL)
 740
 741 int ep93xx_i2s_acquire(void)
 742 {
 743         unsigned val;
 744
 745         ep93xx_devcfg_set_clear(EP93XX_SYSCON_DEVCFG_I2SONAC97,
 746                         EP93XX_SYSCON_DEVCFG_I2S_MASK);
 747
 748         /*
 749          * This is potentially racy with the clock api for i2s_mclk, sclk and
 750          * lrclk. Since the i2s driver is the only user of those clocks we
 751          * rely on it to prevent parallel use of this function and the
 752          * clock api for the i2s clocks.
 753          */
 754         val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV);
 755         val &= ~EP93XX_I2SCLKDIV_MASK;
 756         val |= EP93XX_SYSCON_I2SCLKDIV_ORIDE | EP93XX_SYSCON_I2SCLKDIV_SPOL;
 757         ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV);
 758
 759         return 0;
 760 }
 761 EXPORT_SYMBOL(ep93xx_i2s_acquire);
 762
 763 void ep93xx_i2s_release(void)
 764 {
 765         ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
 766 }
 767 EXPORT_SYMBOL(ep93xx_i2s_release);
 768
 769 /*************************************************************************
 770  * EP93xx AC97 audio peripheral handling
 771  *************************************************************************/
 772 static struct resource ep93xx_ac97_resources[] = {
 773         DEFINE_RES_MEM(EP93XX_AAC_PHYS_BASE, 0xac),
 774         DEFINE_RES_IRQ(IRQ_EP93XX_AACINTR),
 775 };
 776
 777 static struct platform_device ep93xx_ac97_device = {
 778         .name           = "ep93xx-ac97",
 779         .id             = -1,
 780         .num_resources  = ARRAY_SIZE(ep93xx_ac97_resources),
 781         .resource       = ep93xx_ac97_resources,
 782 };
 783
 784 void __init ep93xx_register_ac97(void)
 785 {
 786         /*
 787          * Make sure that the AC97 pins are not used by I2S.
 788          */
 789         ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97);
 790
 791         platform_device_register(&ep93xx_ac97_device);
 792         platform_device_register(&ep93xx_pcm_device);
 793 }
 794
 795 /*************************************************************************
 796  * EP93xx Watchdog
 797  *************************************************************************/
 798 static struct resource ep93xx_wdt_resources[] = {
 799         DEFINE_RES_MEM(EP93XX_WATCHDOG_PHYS_BASE, 0x08),
 800 };
 801
 802 static struct platform_device ep93xx_wdt_device = {
 803         .name           = "ep93xx-wdt",
 804         .id             = -1,
 805         .num_resources  = ARRAY_SIZE(ep93xx_wdt_resources),
 806         .resource       = ep93xx_wdt_resources,
 807 };
 808
 809 void __init ep93xx_init_devices(void)
 810 {
 811         /* Disallow access to MaverickCrunch initially */
 812         ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA);
 813
 814         /* Default all ports to GPIO */
 815         ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
 816                                EP93XX_SYSCON_DEVCFG_GONK |
 817                                EP93XX_SYSCON_DEVCFG_EONIDE |
 818                                EP93XX_SYSCON_DEVCFG_GONIDE |
 819                                EP93XX_SYSCON_DEVCFG_HONIDE);
 820
 821         /* Get the GPIO working early, other devices need it */
 822         platform_device_register(&ep93xx_gpio_device);
 823
 824         amba_device_register(&uart1_device, &iomem_resource);
 825         amba_device_register(&uart2_device, &iomem_resource);
 826         amba_device_register(&uart3_device, &iomem_resource);
 827
 828         platform_device_register(&ep93xx_rtc_device);
 829         platform_device_register(&ep93xx_ohci_device);
 830         platform_device_register(&ep93xx_leds);
 831         platform_device_register(&ep93xx_wdt_device);
 832 }
 833
 834 void ep93xx_restart(char mode, const char *cmd)
 835 {
 836         /*
 837          * Set then clear the SWRST bit to initiate a software reset
 838          */
 839         ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_SWRST);
 840         ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_SWRST);
 841
 842         while (1)
 843                 ;
 844 }