2 * DA8XX/OMAP L1XX platform device data
4 * Copyright (c) 2007-2009, MontaVista Software, Inc. <source@mvista.com>
5 * Derived from code that was:
6 * Copyright (C) 2006 Komal Shah <komal_shah802003@yahoo.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 #include <linux/init.h>
14 #include <linux/platform_device.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/serial_8250.h>
18 #include <mach/cputype.h>
19 #include <mach/common.h>
20 #include <mach/time.h>
21 #include <mach/da8xx.h>
22 #include <mach/cpuidle.h>
26 #define DA8XX_TPCC_BASE 0x01c00000
27 #define DA850_MMCSD1_BASE 0x01e1b000
28 #define DA850_TPCC1_BASE 0x01e30000
29 #define DA8XX_TPTC0_BASE 0x01c08000
30 #define DA8XX_TPTC1_BASE 0x01c08400
31 #define DA850_TPTC2_BASE 0x01e38000
32 #define DA8XX_WDOG_BASE 0x01c21000 /* DA8XX_TIMER64P1_BASE */
33 #define DA8XX_I2C0_BASE 0x01c22000
34 #define DA8XX_RTC_BASE 0x01C23000
35 #define DA8XX_EMAC_CPPI_PORT_BASE 0x01e20000
36 #define DA8XX_EMAC_CPGMACSS_BASE 0x01e22000
37 #define DA8XX_EMAC_CPGMAC_BASE 0x01e23000
38 #define DA8XX_EMAC_MDIO_BASE 0x01e24000
39 #define DA8XX_GPIO_BASE 0x01e26000
40 #define DA8XX_I2C1_BASE 0x01e28000
41 #define DA8XX_SPI0_BASE 0x01c41000
42 #define DA8XX_SPI1_BASE 0x01f0e000
44 #define DA8XX_EMAC_CTRL_REG_OFFSET 0x3000
45 #define DA8XX_EMAC_MOD_REG_OFFSET 0x2000
46 #define DA8XX_EMAC_RAM_OFFSET 0x0000
47 #define DA8XX_EMAC_CTRL_RAM_SIZE SZ_8K
49 #define DA8XX_DMA_SPI0_RX EDMA_CTLR_CHAN(0, 14)
50 #define DA8XX_DMA_SPI0_TX EDMA_CTLR_CHAN(0, 15)
51 #define DA8XX_DMA_MMCSD0_RX EDMA_CTLR_CHAN(0, 16)
52 #define DA8XX_DMA_MMCSD0_TX EDMA_CTLR_CHAN(0, 17)
53 #define DA8XX_DMA_SPI1_RX EDMA_CTLR_CHAN(0, 18)
54 #define DA8XX_DMA_SPI1_TX EDMA_CTLR_CHAN(0, 19)
55 #define DA850_DMA_MMCSD1_RX EDMA_CTLR_CHAN(1, 28)
56 #define DA850_DMA_MMCSD1_TX EDMA_CTLR_CHAN(1, 29)
58 void __iomem *da8xx_syscfg0_base;
59 void __iomem *da8xx_syscfg1_base;
61 static struct plat_serial8250_port da8xx_serial_pdata[] = {
63 .mapbase = DA8XX_UART0_BASE,
64 .irq = IRQ_DA8XX_UARTINT0,
65 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
71 .mapbase = DA8XX_UART1_BASE,
72 .irq = IRQ_DA8XX_UARTINT1,
73 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
79 .mapbase = DA8XX_UART2_BASE,
80 .irq = IRQ_DA8XX_UARTINT2,
81 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
91 struct platform_device da8xx_serial_device = {
93 .id = PLAT8250_DEV_PLATFORM,
95 .platform_data = da8xx_serial_pdata,
99 static const s8 da8xx_queue_tc_mapping[][2] = {
100 /* {event queue no, TC no} */
106 static const s8 da8xx_queue_priority_mapping[][2] = {
107 /* {event queue no, Priority} */
113 static const s8 da850_queue_tc_mapping[][2] = {
114 /* {event queue no, TC no} */
119 static const s8 da850_queue_priority_mapping[][2] = {
120 /* {event queue no, Priority} */
125 static struct edma_soc_info da830_edma_cc0_info = {
131 .queue_tc_mapping = da8xx_queue_tc_mapping,
132 .queue_priority_mapping = da8xx_queue_priority_mapping,
135 static struct edma_soc_info *da830_edma_info[EDMA_MAX_CC] = {
136 &da830_edma_cc0_info,
139 static struct edma_soc_info da850_edma_cc_info[] = {
146 .queue_tc_mapping = da8xx_queue_tc_mapping,
147 .queue_priority_mapping = da8xx_queue_priority_mapping,
155 .queue_tc_mapping = da850_queue_tc_mapping,
156 .queue_priority_mapping = da850_queue_priority_mapping,
160 static struct edma_soc_info *da850_edma_info[EDMA_MAX_CC] = {
161 &da850_edma_cc_info[0],
162 &da850_edma_cc_info[1],
165 static struct resource da830_edma_resources[] = {
168 .start = DA8XX_TPCC_BASE,
169 .end = DA8XX_TPCC_BASE + SZ_32K - 1,
170 .flags = IORESOURCE_MEM,
174 .start = DA8XX_TPTC0_BASE,
175 .end = DA8XX_TPTC0_BASE + SZ_1K - 1,
176 .flags = IORESOURCE_MEM,
180 .start = DA8XX_TPTC1_BASE,
181 .end = DA8XX_TPTC1_BASE + SZ_1K - 1,
182 .flags = IORESOURCE_MEM,
186 .start = IRQ_DA8XX_CCINT0,
187 .flags = IORESOURCE_IRQ,
191 .start = IRQ_DA8XX_CCERRINT,
192 .flags = IORESOURCE_IRQ,
196 static struct resource da850_edma_resources[] = {
199 .start = DA8XX_TPCC_BASE,
200 .end = DA8XX_TPCC_BASE + SZ_32K - 1,
201 .flags = IORESOURCE_MEM,
205 .start = DA8XX_TPTC0_BASE,
206 .end = DA8XX_TPTC0_BASE + SZ_1K - 1,
207 .flags = IORESOURCE_MEM,
211 .start = DA8XX_TPTC1_BASE,
212 .end = DA8XX_TPTC1_BASE + SZ_1K - 1,
213 .flags = IORESOURCE_MEM,
217 .start = DA850_TPCC1_BASE,
218 .end = DA850_TPCC1_BASE + SZ_32K - 1,
219 .flags = IORESOURCE_MEM,
223 .start = DA850_TPTC2_BASE,
224 .end = DA850_TPTC2_BASE + SZ_1K - 1,
225 .flags = IORESOURCE_MEM,
229 .start = IRQ_DA8XX_CCINT0,
230 .flags = IORESOURCE_IRQ,
234 .start = IRQ_DA8XX_CCERRINT,
235 .flags = IORESOURCE_IRQ,
239 .start = IRQ_DA850_CCINT1,
240 .flags = IORESOURCE_IRQ,
244 .start = IRQ_DA850_CCERRINT1,
245 .flags = IORESOURCE_IRQ,
249 static struct platform_device da830_edma_device = {
253 .platform_data = da830_edma_info,
255 .num_resources = ARRAY_SIZE(da830_edma_resources),
256 .resource = da830_edma_resources,
259 static struct platform_device da850_edma_device = {
263 .platform_data = da850_edma_info,
265 .num_resources = ARRAY_SIZE(da850_edma_resources),
266 .resource = da850_edma_resources,
269 int __init da830_register_edma(struct edma_rsv_info *rsv)
271 da830_edma_cc0_info.rsv = rsv;
273 return platform_device_register(&da830_edma_device);
276 int __init da850_register_edma(struct edma_rsv_info *rsv[2])
279 da850_edma_cc_info[0].rsv = rsv[0];
280 da850_edma_cc_info[1].rsv = rsv[1];
283 return platform_device_register(&da850_edma_device);
286 static struct resource da8xx_i2c_resources0[] = {
288 .start = DA8XX_I2C0_BASE,
289 .end = DA8XX_I2C0_BASE + SZ_4K - 1,
290 .flags = IORESOURCE_MEM,
293 .start = IRQ_DA8XX_I2CINT0,
294 .end = IRQ_DA8XX_I2CINT0,
295 .flags = IORESOURCE_IRQ,
299 static struct platform_device da8xx_i2c_device0 = {
300 .name = "i2c_davinci",
302 .num_resources = ARRAY_SIZE(da8xx_i2c_resources0),
303 .resource = da8xx_i2c_resources0,
306 static struct resource da8xx_i2c_resources1[] = {
308 .start = DA8XX_I2C1_BASE,
309 .end = DA8XX_I2C1_BASE + SZ_4K - 1,
310 .flags = IORESOURCE_MEM,
313 .start = IRQ_DA8XX_I2CINT1,
314 .end = IRQ_DA8XX_I2CINT1,
315 .flags = IORESOURCE_IRQ,
319 static struct platform_device da8xx_i2c_device1 = {
320 .name = "i2c_davinci",
322 .num_resources = ARRAY_SIZE(da8xx_i2c_resources1),
323 .resource = da8xx_i2c_resources1,
326 int __init da8xx_register_i2c(int instance,
327 struct davinci_i2c_platform_data *pdata)
329 struct platform_device *pdev;
332 pdev = &da8xx_i2c_device0;
333 else if (instance == 1)
334 pdev = &da8xx_i2c_device1;
338 pdev->dev.platform_data = pdata;
339 return platform_device_register(pdev);
342 static struct resource da8xx_watchdog_resources[] = {
344 .start = DA8XX_WDOG_BASE,
345 .end = DA8XX_WDOG_BASE + SZ_4K - 1,
346 .flags = IORESOURCE_MEM,
350 struct platform_device da8xx_wdt_device = {
353 .num_resources = ARRAY_SIZE(da8xx_watchdog_resources),
354 .resource = da8xx_watchdog_resources,
357 int __init da8xx_register_watchdog(void)
359 return platform_device_register(&da8xx_wdt_device);
362 static struct resource da8xx_emac_resources[] = {
364 .start = DA8XX_EMAC_CPPI_PORT_BASE,
365 .end = DA8XX_EMAC_CPPI_PORT_BASE + SZ_16K - 1,
366 .flags = IORESOURCE_MEM,
369 .start = IRQ_DA8XX_C0_RX_THRESH_PULSE,
370 .end = IRQ_DA8XX_C0_RX_THRESH_PULSE,
371 .flags = IORESOURCE_IRQ,
374 .start = IRQ_DA8XX_C0_RX_PULSE,
375 .end = IRQ_DA8XX_C0_RX_PULSE,
376 .flags = IORESOURCE_IRQ,
379 .start = IRQ_DA8XX_C0_TX_PULSE,
380 .end = IRQ_DA8XX_C0_TX_PULSE,
381 .flags = IORESOURCE_IRQ,
384 .start = IRQ_DA8XX_C0_MISC_PULSE,
385 .end = IRQ_DA8XX_C0_MISC_PULSE,
386 .flags = IORESOURCE_IRQ,
390 struct emac_platform_data da8xx_emac_pdata = {
391 .ctrl_reg_offset = DA8XX_EMAC_CTRL_REG_OFFSET,
392 .ctrl_mod_reg_offset = DA8XX_EMAC_MOD_REG_OFFSET,
393 .ctrl_ram_offset = DA8XX_EMAC_RAM_OFFSET,
394 .ctrl_ram_size = DA8XX_EMAC_CTRL_RAM_SIZE,
395 .version = EMAC_VERSION_2,
398 static struct platform_device da8xx_emac_device = {
399 .name = "davinci_emac",
402 .platform_data = &da8xx_emac_pdata,
404 .num_resources = ARRAY_SIZE(da8xx_emac_resources),
405 .resource = da8xx_emac_resources,
408 static struct resource da8xx_mdio_resources[] = {
410 .start = DA8XX_EMAC_MDIO_BASE,
411 .end = DA8XX_EMAC_MDIO_BASE + SZ_4K - 1,
412 .flags = IORESOURCE_MEM,
416 static struct platform_device da8xx_mdio_device = {
417 .name = "davinci_mdio",
419 .num_resources = ARRAY_SIZE(da8xx_mdio_resources),
420 .resource = da8xx_mdio_resources,
423 int __init da8xx_register_emac(void)
427 ret = platform_device_register(&da8xx_mdio_device);
430 ret = platform_device_register(&da8xx_emac_device);
433 ret = clk_add_alias(NULL, dev_name(&da8xx_mdio_device.dev),
434 NULL, &da8xx_emac_device.dev);
438 static struct resource da830_mcasp1_resources[] = {
441 .start = DAVINCI_DA830_MCASP1_REG_BASE,
442 .end = DAVINCI_DA830_MCASP1_REG_BASE + (SZ_1K * 12) - 1,
443 .flags = IORESOURCE_MEM,
447 .start = DAVINCI_DA830_DMA_MCASP1_AXEVT,
448 .end = DAVINCI_DA830_DMA_MCASP1_AXEVT,
449 .flags = IORESOURCE_DMA,
453 .start = DAVINCI_DA830_DMA_MCASP1_AREVT,
454 .end = DAVINCI_DA830_DMA_MCASP1_AREVT,
455 .flags = IORESOURCE_DMA,
459 static struct platform_device da830_mcasp1_device = {
460 .name = "davinci-mcasp",
462 .num_resources = ARRAY_SIZE(da830_mcasp1_resources),
463 .resource = da830_mcasp1_resources,
466 static struct resource da850_mcasp_resources[] = {
469 .start = DAVINCI_DA8XX_MCASP0_REG_BASE,
470 .end = DAVINCI_DA8XX_MCASP0_REG_BASE + (SZ_1K * 12) - 1,
471 .flags = IORESOURCE_MEM,
475 .start = DAVINCI_DA8XX_DMA_MCASP0_AXEVT,
476 .end = DAVINCI_DA8XX_DMA_MCASP0_AXEVT,
477 .flags = IORESOURCE_DMA,
481 .start = DAVINCI_DA8XX_DMA_MCASP0_AREVT,
482 .end = DAVINCI_DA8XX_DMA_MCASP0_AREVT,
483 .flags = IORESOURCE_DMA,
487 static struct platform_device da850_mcasp_device = {
488 .name = "davinci-mcasp",
490 .num_resources = ARRAY_SIZE(da850_mcasp_resources),
491 .resource = da850_mcasp_resources,
494 struct platform_device davinci_pcm_device = {
495 .name = "davinci-pcm-audio",
499 void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata)
501 platform_device_register(&davinci_pcm_device);
503 /* DA830/OMAP-L137 has 3 instances of McASP */
504 if (cpu_is_davinci_da830() && id == 1) {
505 da830_mcasp1_device.dev.platform_data = pdata;
506 platform_device_register(&da830_mcasp1_device);
507 } else if (cpu_is_davinci_da850()) {
508 da850_mcasp_device.dev.platform_data = pdata;
509 platform_device_register(&da850_mcasp_device);
513 static const struct display_panel disp_panel = {
520 static struct lcd_ctrl_config lcd_cfg = {
530 .invert_line_clock = 1,
531 .invert_frm_clock = 1,
537 struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata = {
538 .manu_name = "sharp",
539 .controller_data = &lcd_cfg,
540 .type = "Sharp_LCD035Q3DG01",
543 struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata = {
544 .manu_name = "sharp",
545 .controller_data = &lcd_cfg,
546 .type = "Sharp_LK043T1DG01",
549 static struct resource da8xx_lcdc_resources[] = {
550 [0] = { /* registers */
551 .start = DA8XX_LCD_CNTRL_BASE,
552 .end = DA8XX_LCD_CNTRL_BASE + SZ_4K - 1,
553 .flags = IORESOURCE_MEM,
555 [1] = { /* interrupt */
556 .start = IRQ_DA8XX_LCDINT,
557 .end = IRQ_DA8XX_LCDINT,
558 .flags = IORESOURCE_IRQ,
562 static struct platform_device da8xx_lcdc_device = {
563 .name = "da8xx_lcdc",
565 .num_resources = ARRAY_SIZE(da8xx_lcdc_resources),
566 .resource = da8xx_lcdc_resources,
569 int __init da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata)
571 da8xx_lcdc_device.dev.platform_data = pdata;
572 return platform_device_register(&da8xx_lcdc_device);
575 static struct resource da8xx_mmcsd0_resources[] = {
577 .start = DA8XX_MMCSD0_BASE,
578 .end = DA8XX_MMCSD0_BASE + SZ_4K - 1,
579 .flags = IORESOURCE_MEM,
582 .start = IRQ_DA8XX_MMCSDINT0,
583 .end = IRQ_DA8XX_MMCSDINT0,
584 .flags = IORESOURCE_IRQ,
587 .start = DA8XX_DMA_MMCSD0_RX,
588 .end = DA8XX_DMA_MMCSD0_RX,
589 .flags = IORESOURCE_DMA,
592 .start = DA8XX_DMA_MMCSD0_TX,
593 .end = DA8XX_DMA_MMCSD0_TX,
594 .flags = IORESOURCE_DMA,
598 static struct platform_device da8xx_mmcsd0_device = {
599 .name = "davinci_mmc",
601 .num_resources = ARRAY_SIZE(da8xx_mmcsd0_resources),
602 .resource = da8xx_mmcsd0_resources,
605 int __init da8xx_register_mmcsd0(struct davinci_mmc_config *config)
607 da8xx_mmcsd0_device.dev.platform_data = config;
608 return platform_device_register(&da8xx_mmcsd0_device);
611 #ifdef CONFIG_ARCH_DAVINCI_DA850
612 static struct resource da850_mmcsd1_resources[] = {
614 .start = DA850_MMCSD1_BASE,
615 .end = DA850_MMCSD1_BASE + SZ_4K - 1,
616 .flags = IORESOURCE_MEM,
619 .start = IRQ_DA850_MMCSDINT0_1,
620 .end = IRQ_DA850_MMCSDINT0_1,
621 .flags = IORESOURCE_IRQ,
624 .start = DA850_DMA_MMCSD1_RX,
625 .end = DA850_DMA_MMCSD1_RX,
626 .flags = IORESOURCE_DMA,
629 .start = DA850_DMA_MMCSD1_TX,
630 .end = DA850_DMA_MMCSD1_TX,
631 .flags = IORESOURCE_DMA,
635 static struct platform_device da850_mmcsd1_device = {
636 .name = "davinci_mmc",
638 .num_resources = ARRAY_SIZE(da850_mmcsd1_resources),
639 .resource = da850_mmcsd1_resources,
642 int __init da850_register_mmcsd1(struct davinci_mmc_config *config)
644 da850_mmcsd1_device.dev.platform_data = config;
645 return platform_device_register(&da850_mmcsd1_device);
649 static struct resource da8xx_rtc_resources[] = {
651 .start = DA8XX_RTC_BASE,
652 .end = DA8XX_RTC_BASE + SZ_4K - 1,
653 .flags = IORESOURCE_MEM,
656 .start = IRQ_DA8XX_RTC,
657 .end = IRQ_DA8XX_RTC,
658 .flags = IORESOURCE_IRQ,
661 .start = IRQ_DA8XX_RTC,
662 .end = IRQ_DA8XX_RTC,
663 .flags = IORESOURCE_IRQ,
667 static struct platform_device da8xx_rtc_device = {
670 .num_resources = ARRAY_SIZE(da8xx_rtc_resources),
671 .resource = da8xx_rtc_resources,
674 int da8xx_register_rtc(void)
679 base = ioremap(DA8XX_RTC_BASE, SZ_4K);
683 /* Unlock the rtc's registers */
684 __raw_writel(0x83e70b13, base + 0x6c);
685 __raw_writel(0x95a4f1e0, base + 0x70);
689 ret = platform_device_register(&da8xx_rtc_device);
691 /* Atleast on DA850, RTC is a wakeup source */
692 device_init_wakeup(&da8xx_rtc_device.dev, true);
697 static void __iomem *da8xx_ddr2_ctlr_base;
698 void __iomem * __init da8xx_get_mem_ctlr(void)
700 if (da8xx_ddr2_ctlr_base)
701 return da8xx_ddr2_ctlr_base;
703 da8xx_ddr2_ctlr_base = ioremap(DA8XX_DDR2_CTL_BASE, SZ_32K);
704 if (!da8xx_ddr2_ctlr_base)
705 pr_warning("%s: Unable to map DDR2 controller", __func__);
707 return da8xx_ddr2_ctlr_base;
710 static struct resource da8xx_cpuidle_resources[] = {
712 .start = DA8XX_DDR2_CTL_BASE,
713 .end = DA8XX_DDR2_CTL_BASE + SZ_32K - 1,
714 .flags = IORESOURCE_MEM,
718 /* DA8XX devices support DDR2 power down */
719 static struct davinci_cpuidle_config da8xx_cpuidle_pdata = {
724 static struct platform_device da8xx_cpuidle_device = {
725 .name = "cpuidle-davinci",
726 .num_resources = ARRAY_SIZE(da8xx_cpuidle_resources),
727 .resource = da8xx_cpuidle_resources,
729 .platform_data = &da8xx_cpuidle_pdata,
733 int __init da8xx_register_cpuidle(void)
735 da8xx_cpuidle_pdata.ddr2_ctlr_base = da8xx_get_mem_ctlr();
737 return platform_device_register(&da8xx_cpuidle_device);
740 static struct resource da8xx_spi0_resources[] = {
742 .start = DA8XX_SPI0_BASE,
743 .end = DA8XX_SPI0_BASE + SZ_4K - 1,
744 .flags = IORESOURCE_MEM,
747 .start = IRQ_DA8XX_SPINT0,
748 .end = IRQ_DA8XX_SPINT0,
749 .flags = IORESOURCE_IRQ,
752 .start = DA8XX_DMA_SPI0_RX,
753 .end = DA8XX_DMA_SPI0_RX,
754 .flags = IORESOURCE_DMA,
757 .start = DA8XX_DMA_SPI0_TX,
758 .end = DA8XX_DMA_SPI0_TX,
759 .flags = IORESOURCE_DMA,
763 static struct resource da8xx_spi1_resources[] = {
765 .start = DA8XX_SPI1_BASE,
766 .end = DA8XX_SPI1_BASE + SZ_4K - 1,
767 .flags = IORESOURCE_MEM,
770 .start = IRQ_DA8XX_SPINT1,
771 .end = IRQ_DA8XX_SPINT1,
772 .flags = IORESOURCE_IRQ,
775 .start = DA8XX_DMA_SPI1_RX,
776 .end = DA8XX_DMA_SPI1_RX,
777 .flags = IORESOURCE_DMA,
780 .start = DA8XX_DMA_SPI1_TX,
781 .end = DA8XX_DMA_SPI1_TX,
782 .flags = IORESOURCE_DMA,
786 struct davinci_spi_platform_data da8xx_spi_pdata[] = {
788 .version = SPI_VERSION_2,
790 .dma_event_q = EVENTQ_0,
793 .version = SPI_VERSION_2,
795 .dma_event_q = EVENTQ_0,
799 static struct platform_device da8xx_spi_device[] = {
801 .name = "spi_davinci",
803 .num_resources = ARRAY_SIZE(da8xx_spi0_resources),
804 .resource = da8xx_spi0_resources,
806 .platform_data = &da8xx_spi_pdata[0],
810 .name = "spi_davinci",
812 .num_resources = ARRAY_SIZE(da8xx_spi1_resources),
813 .resource = da8xx_spi1_resources,
815 .platform_data = &da8xx_spi_pdata[1],
820 int __init da8xx_register_spi(int instance, struct spi_board_info *info,
825 if (instance < 0 || instance > 1)
828 ret = spi_register_board_info(info, len);
830 pr_warning("%s: failed to register board info for spi %d :"
831 " %d\n", __func__, instance, ret);
833 da8xx_spi_pdata[instance].num_chipselect = len;
835 return platform_device_register(&da8xx_spi_device[instance]);