2 * Copyright 2008 Cavium Networks
4 * This file is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License, Version 2, as
6 * published by the Free Software Foundation.
9 #include <linux/delay.h>
10 #include <mach/system.h>
11 #include <mach/cns3xxx.h>
13 void cns3xxx_pwr_clk_en(unsigned int block)
15 PM_CLK_GATE_REG |= (block & PM_CLK_GATE_REG_MASK);
18 void cns3xxx_pwr_power_up(unsigned int block)
20 PM_PLL_HM_PD_CTRL_REG &= ~(block & CNS3XXX_PWR_PLL_ALL);
22 /* Wait for 300us for the PLL output clock locked. */
26 void cns3xxx_pwr_power_down(unsigned int block)
28 /* write '1' to power down */
29 PM_PLL_HM_PD_CTRL_REG |= (block & CNS3XXX_PWR_PLL_ALL);
32 static void cns3xxx_pwr_soft_rst_force(unsigned int block)
35 * bit 0, 28, 29 => program low to reset,
36 * the other else program low and then high
38 if (block & 0x30000001) {
39 PM_SOFT_RST_REG &= ~(block & PM_SOFT_RST_REG_MASK);
41 PM_SOFT_RST_REG &= ~(block & PM_SOFT_RST_REG_MASK);
42 PM_SOFT_RST_REG |= (block & PM_SOFT_RST_REG_MASK);
46 void cns3xxx_pwr_soft_rst(unsigned int block)
48 static unsigned int soft_reset;
50 if (soft_reset & block) {
51 /* SPI/I2C/GPIO use the same block, reset once. */
56 cns3xxx_pwr_soft_rst_force(block);
59 void arch_reset(char mode, const char *cmd)
62 * To reset, we hit the on-board reset register
65 cns3xxx_pwr_soft_rst(CNS3XXX_PWR_SOFTWARE_RST(GLOBAL));
69 * cns3xxx_cpu_clock - return CPU/L2 clock
74 int cns3xxx_cpu_clock(void)
80 cpu_sel = (PM_CLK_CTRL_REG >> PM_CLK_CTRL_REG_OFFSET_PLL_CPU_SEL) & 0xf;
81 div_sel = (PM_CLK_CTRL_REG >> PM_CLK_CTRL_REG_OFFSET_CPU_CLK_DIV) & 0x3;
83 cpu = (300 + ((cpu_sel / 3) * 100) + ((cpu_sel % 3) * 33)) >> div_sel;