Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
[pandora-kernel.git] / arch / arm / mach-clps711x / irq.c
1 /*
2  *  linux/arch/arm/mach-clps711x/irq.c
3  *
4  *  Copyright (C) 2000 Deep Blue Solutions Ltd.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
19  */
20 #include <linux/init.h>
21 #include <linux/list.h>
22 #include <linux/io.h>
23
24 #include <asm/mach/irq.h>
25 #include <mach/hardware.h>
26 #include <asm/irq.h>
27
28 #include <asm/hardware/clps7111.h>
29
30 static void int1_mask(struct irq_data *d)
31 {
32         u32 intmr1;
33
34         intmr1 = clps_readl(INTMR1);
35         intmr1 &= ~(1 << d->irq);
36         clps_writel(intmr1, INTMR1);
37 }
38
39 static void int1_ack(struct irq_data *d)
40 {
41         u32 intmr1;
42
43         intmr1 = clps_readl(INTMR1);
44         intmr1 &= ~(1 << d->irq);
45         clps_writel(intmr1, INTMR1);
46
47         switch (d->irq) {
48         case IRQ_CSINT:  clps_writel(0, COEOI);  break;
49         case IRQ_TC1OI:  clps_writel(0, TC1EOI); break;
50         case IRQ_TC2OI:  clps_writel(0, TC2EOI); break;
51         case IRQ_RTCMI:  clps_writel(0, RTCEOI); break;
52         case IRQ_TINT:   clps_writel(0, TEOI);   break;
53         case IRQ_UMSINT: clps_writel(0, UMSEOI); break;
54         }
55 }
56
57 static void int1_unmask(struct irq_data *d)
58 {
59         u32 intmr1;
60
61         intmr1 = clps_readl(INTMR1);
62         intmr1 |= 1 << d->irq;
63         clps_writel(intmr1, INTMR1);
64 }
65
66 static struct irq_chip int1_chip = {
67         .irq_ack        = int1_ack,
68         .irq_mask       = int1_mask,
69         .irq_unmask     = int1_unmask,
70 };
71
72 static void int2_mask(struct irq_data *d)
73 {
74         u32 intmr2;
75
76         intmr2 = clps_readl(INTMR2);
77         intmr2 &= ~(1 << (d->irq - 16));
78         clps_writel(intmr2, INTMR2);
79 }
80
81 static void int2_ack(struct irq_data *d)
82 {
83         u32 intmr2;
84
85         intmr2 = clps_readl(INTMR2);
86         intmr2 &= ~(1 << (d->irq - 16));
87         clps_writel(intmr2, INTMR2);
88
89         switch (d->irq) {
90         case IRQ_KBDINT: clps_writel(0, KBDEOI); break;
91         }
92 }
93
94 static void int2_unmask(struct irq_data *d)
95 {
96         u32 intmr2;
97
98         intmr2 = clps_readl(INTMR2);
99         intmr2 |= 1 << (d->irq - 16);
100         clps_writel(intmr2, INTMR2);
101 }
102
103 static struct irq_chip int2_chip = {
104         .irq_ack        = int2_ack,
105         .irq_mask       = int2_mask,
106         .irq_unmask     = int2_unmask,
107 };
108
109 void __init clps711x_init_irq(void)
110 {
111         unsigned int i;
112
113         for (i = 0; i < NR_IRQS; i++) {
114                 if (INT1_IRQS & (1 << i)) {
115                         set_irq_handler(i, handle_level_irq);
116                         set_irq_chip(i, &int1_chip);
117                         set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
118                 }
119                 if (INT2_IRQS & (1 << i)) {
120                         set_irq_handler(i, handle_level_irq);
121                         set_irq_chip(i, &int2_chip);
122                         set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
123                 }                       
124         }
125
126         /*
127          * Disable interrupts
128          */
129         clps_writel(0, INTMR1);
130         clps_writel(0, INTMR2);
131
132         /*
133          * Clear down any pending interrupts
134          */
135         clps_writel(0, COEOI);
136         clps_writel(0, TC1EOI);
137         clps_writel(0, TC2EOI);
138         clps_writel(0, RTCEOI);
139         clps_writel(0, TEOI);
140         clps_writel(0, UMSEOI);
141         clps_writel(0, SYNCIO);
142         clps_writel(0, KBDEOI);
143 }