arch/arm/mach-at91/include/mach/cpu.h

   1 /*
   2  * arch/arm/mach-at91/include/mach/cpu.h
   3  *
   4  *  Copyright (C) 2006 SAN People
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  */
  12
  13 #ifndef __ASM_ARCH_CPU_H
  14 #define __ASM_ARCH_CPU_H
  15
  16 #include <mach/hardware.h>
  17 #include <mach/at91_dbgu.h>
  18
  19
  20 #define ARCH_ID_AT91RM9200      0x09290780
  21 #define ARCH_ID_AT91SAM9260     0x019803a0
  22 #define ARCH_ID_AT91SAM9261     0x019703a0
  23 #define ARCH_ID_AT91SAM9263     0x019607a0
  24 #define ARCH_ID_AT91SAM9G10     0x019903a0
  25 #define ARCH_ID_AT91SAM9G20     0x019905a0
  26 #define ARCH_ID_AT91SAM9RL64    0x019b03a0
  27 #define ARCH_ID_AT91SAM9G45     0x819b05a0
  28 #define ARCH_ID_AT91SAM9G45MRL  0x819b05a2      /* aka 9G45-ES2 & non ES lots */
  29 #define ARCH_ID_AT91SAM9G45ES   0x819b05a1      /* 9G45-ES (Engineering Sample) */
  30 #define ARCH_ID_AT91SAM9X5      0x819a05a0
  31 #define ARCH_ID_AT91CAP9        0x039A03A0
  32
  33 #define ARCH_ID_AT91SAM9XE128   0x329973a0
  34 #define ARCH_ID_AT91SAM9XE256   0x329a93a0
  35 #define ARCH_ID_AT91SAM9XE512   0x329aa3a0
  36
  37 #define ARCH_ID_AT572D940HF     0x0e0303e0
  38
  39 #define ARCH_ID_AT91M40800      0x14080044
  40 #define ARCH_ID_AT91R40807      0x44080746
  41 #define ARCH_ID_AT91M40807      0x14080745
  42 #define ARCH_ID_AT91R40008      0x44000840
  43
  44 static inline unsigned long at91_cpu_identify(void)
  45 {
  46         return (at91_sys_read(AT91_DBGU_CIDR) & ~AT91_CIDR_VERSION);
  47 }
  48
  49 static inline unsigned long at91_cpu_fully_identify(void)
  50 {
  51         return at91_sys_read(AT91_DBGU_CIDR);
  52 }
  53
  54 #define ARCH_EXID_AT91SAM9M11   0x00000001
  55 #define ARCH_EXID_AT91SAM9M10   0x00000002
  56 #define ARCH_EXID_AT91SAM9G46   0x00000003
  57 #define ARCH_EXID_AT91SAM9G45   0x00000004
  58
  59 #define ARCH_EXID_AT91SAM9G15   0x00000000
  60 #define ARCH_EXID_AT91SAM9G35   0x00000001
  61 #define ARCH_EXID_AT91SAM9X35   0x00000002
  62 #define ARCH_EXID_AT91SAM9G25   0x00000003
  63 #define ARCH_EXID_AT91SAM9X25   0x00000004
  64
  65 static inline unsigned long at91_exid_identify(void)
  66 {
  67         return at91_sys_read(AT91_DBGU_EXID);
  68 }
  69
  70
  71 #define ARCH_FAMILY_AT91X92     0x09200000
  72 #define ARCH_FAMILY_AT91SAM9    0x01900000
  73 #define ARCH_FAMILY_AT91SAM9XE  0x02900000
  74
  75 static inline unsigned long at91_arch_identify(void)
  76 {
  77         return (at91_sys_read(AT91_DBGU_CIDR) & AT91_CIDR_ARCH);
  78 }
  79
  80 #ifdef CONFIG_ARCH_AT91CAP9
  81 #include <mach/at91_pmc.h>
  82
  83 #define ARCH_REVISION_CAP9_B    0x399
  84 #define ARCH_REVISION_CAP9_C    0x601
  85
  86 static inline unsigned long at91cap9_rev_identify(void)
  87 {
  88         return (at91_sys_read(AT91_PMC_VER));
  89 }
  90 #endif
  91
  92 #ifdef CONFIG_ARCH_AT91RM9200
  93 extern int rm9200_type;
  94 #define ARCH_REVISON_9200_BGA   (0 << 0)
  95 #define ARCH_REVISON_9200_PQFP  (1 << 0)
  96 #define cpu_is_at91rm9200()     (at91_cpu_identify() == ARCH_ID_AT91RM9200)
  97 #define cpu_is_at91rm9200_bga() (!cpu_is_at91rm9200_pqfp())
  98 #define cpu_is_at91rm9200_pqfp() (cpu_is_at91rm9200() && rm9200_type & ARCH_REVISON_9200_PQFP)
  99 #else
 100 #define cpu_is_at91rm9200()     (0)
 101 #define cpu_is_at91rm9200_bga() (0)
 102 #define cpu_is_at91rm9200_pqfp() (0)
 103 #endif
 104
 105 #ifdef CONFIG_ARCH_AT91SAM9260
 106 #define cpu_is_at91sam9xe()     (at91_arch_identify() == ARCH_FAMILY_AT91SAM9XE)
 107 #define cpu_is_at91sam9260()    ((at91_cpu_identify() == ARCH_ID_AT91SAM9260) || cpu_is_at91sam9xe())
 108 #else
 109 #define cpu_is_at91sam9xe()     (0)
 110 #define cpu_is_at91sam9260()    (0)
 111 #endif
 112
 113 #ifdef CONFIG_ARCH_AT91SAM9G20
 114 #define cpu_is_at91sam9g20()    (at91_cpu_identify() == ARCH_ID_AT91SAM9G20)
 115 #else
 116 #define cpu_is_at91sam9g20()    (0)
 117 #endif
 118
 119 #ifdef CONFIG_ARCH_AT91SAM9261
 120 #define cpu_is_at91sam9261()    (at91_cpu_identify() == ARCH_ID_AT91SAM9261)
 121 #else
 122 #define cpu_is_at91sam9261()    (0)
 123 #endif
 124
 125 #ifdef CONFIG_ARCH_AT91SAM9G10
 126 #define cpu_is_at91sam9g10()    ((at91_cpu_identify() & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10)
 127 #else
 128 #define cpu_is_at91sam9g10()    (0)
 129 #endif
 130
 131 #ifdef CONFIG_ARCH_AT91SAM9263
 132 #define cpu_is_at91sam9263()    (at91_cpu_identify() == ARCH_ID_AT91SAM9263)
 133 #else
 134 #define cpu_is_at91sam9263()    (0)
 135 #endif
 136
 137 #ifdef CONFIG_ARCH_AT91SAM9RL
 138 #define cpu_is_at91sam9rl()     (at91_cpu_identify() == ARCH_ID_AT91SAM9RL64)
 139 #else
 140 #define cpu_is_at91sam9rl()     (0)
 141 #endif
 142
 143 #ifdef CONFIG_ARCH_AT91SAM9G45
 144 #define cpu_is_at91sam9g45()    (at91_cpu_identify() == ARCH_ID_AT91SAM9G45)
 145 #define cpu_is_at91sam9g45es()  (at91_cpu_fully_identify() == ARCH_ID_AT91SAM9G45ES)
 146 #define cpu_is_at91sam9m10()    (cpu_is_at91sam9g45() && \
 147                                 (at91_exid_identify() == ARCH_EXID_AT91SAM9M10))
 148 #define cpu_is_at91sam9m46()    (cpu_is_at91sam9g45() && \
 149                                 (at91_exid_identify() == ARCH_EXID_AT91SAM9G46))
 150 #define cpu_is_at91sam9m11()    (cpu_is_at91sam9g45() && \
 151                                 (at91_exid_identify() == ARCH_EXID_AT91SAM9M11))
 152 #else
 153 #define cpu_is_at91sam9g45()    (0)
 154 #define cpu_is_at91sam9g45es()  (0)
 155 #define cpu_is_at91sam9m10()    (0)
 156 #define cpu_is_at91sam9g46()    (0)
 157 #define cpu_is_at91sam9m11()    (0)
 158 #endif
 159
 160 #ifdef CONFIG_ARCH_AT91SAM9X5
 161 #define cpu_is_at91sam9x5()     (at91_cpu_identify() == ARCH_ID_AT91SAM9X5)
 162 #define cpu_is_at91sam9g15()    (cpu_is_at91sam9x5() && \
 163                                 (at91_exid_identify() == ARCH_EXID_AT91SAM9G15))
 164 #define cpu_is_at91sam9g35()    (cpu_is_at91sam9x5() && \
 165                                 (at91_exid_identify() == ARCH_EXID_AT91SAM9G35))
 166 #define cpu_is_at91sam9x35()    (cpu_is_at91sam9x5() && \
 167                                 (at91_exid_identify() == ARCH_EXID_AT91SAM9X35))
 168 #define cpu_is_at91sam9g25()    (cpu_is_at91sam9x5() && \
 169                                 (at91_exid_identify() == ARCH_EXID_AT91SAM9G25))
 170 #define cpu_is_at91sam9x25()    (cpu_is_at91sam9x5() && \
 171                                 (at91_exid_identify() == ARCH_EXID_AT91SAM9X25))
 172 #else
 173 #define cpu_is_at91sam9x5()     (0)
 174 #define cpu_is_at91sam9g15()    (0)
 175 #define cpu_is_at91sam9g35()    (0)
 176 #define cpu_is_at91sam9x35()    (0)
 177 #define cpu_is_at91sam9g25()    (0)
 178 #define cpu_is_at91sam9x25()    (0)
 179 #endif
 180
 181 #ifdef CONFIG_ARCH_AT91CAP9
 182 #define cpu_is_at91cap9()       (at91_cpu_identify() == ARCH_ID_AT91CAP9)
 183 #define cpu_is_at91cap9_revB()  (at91cap9_rev_identify() == ARCH_REVISION_CAP9_B)
 184 #define cpu_is_at91cap9_revC()  (at91cap9_rev_identify() == ARCH_REVISION_CAP9_C)
 185 #else
 186 #define cpu_is_at91cap9()       (0)
 187 #define cpu_is_at91cap9_revB()  (0)
 188 #define cpu_is_at91cap9_revC()  (0)
 189 #endif
 190
 191 #ifdef CONFIG_ARCH_AT572D940HF
 192 #define cpu_is_at572d940hf() (at91_cpu_identify() == ARCH_ID_AT572D940HF)
 193 #else
 194 #define cpu_is_at572d940hf() (0)
 195 #endif
 196
 197 /*
 198  * Since this is ARM, we will never run on any AVR32 CPU. But these
 199  * definitions may reduce clutter in common drivers.
 200  */
 201 #define cpu_is_at32ap7000()     (0)
 202
 203 #endif