atmel_serial: keep the platform_device unchanged
[pandora-kernel.git] / arch / arm / mach-at91 / at91sam9rl_devices.c
1 /*
2  *  Copyright (C) 2007 Atmel Corporation
3  *
4  * This file is subject to the terms and conditions of the GNU General Public
5  * License.  See the file COPYING in the main directory of this archive for
6  * more details.
7  */
8
9 #include <asm/mach/arch.h>
10 #include <asm/mach/map.h>
11
12 #include <linux/dma-mapping.h>
13 #include <linux/platform_device.h>
14 #include <linux/i2c-gpio.h>
15
16 #include <linux/fb.h>
17 #include <video/atmel_lcdc.h>
18
19 #include <mach/board.h>
20 #include <mach/gpio.h>
21 #include <mach/at91sam9rl.h>
22 #include <mach/at91sam9rl_matrix.h>
23 #include <mach/at91sam9_smc.h>
24 #include <mach/at_hdmac.h>
25
26 #include "generic.h"
27
28
29 /* --------------------------------------------------------------------
30  *  HDMAC - AHB DMA Controller
31  * -------------------------------------------------------------------- */
32
33 #if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE)
34 static u64 hdmac_dmamask = DMA_BIT_MASK(32);
35
36 static struct at_dma_platform_data atdma_pdata = {
37         .nr_channels    = 2,
38 };
39
40 static struct resource hdmac_resources[] = {
41         [0] = {
42                 .start  = AT91_BASE_SYS + AT91_DMA,
43                 .end    = AT91_BASE_SYS + AT91_DMA + SZ_512 - 1,
44                 .flags  = IORESOURCE_MEM,
45         },
46         [2] = {
47                 .start  = AT91SAM9RL_ID_DMA,
48                 .end    = AT91SAM9RL_ID_DMA,
49                 .flags  = IORESOURCE_IRQ,
50         },
51 };
52
53 static struct platform_device at_hdmac_device = {
54         .name           = "at_hdmac",
55         .id             = -1,
56         .dev            = {
57                                 .dma_mask               = &hdmac_dmamask,
58                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
59                                 .platform_data          = &atdma_pdata,
60         },
61         .resource       = hdmac_resources,
62         .num_resources  = ARRAY_SIZE(hdmac_resources),
63 };
64
65 void __init at91_add_device_hdmac(void)
66 {
67         dma_cap_set(DMA_MEMCPY, atdma_pdata.cap_mask);
68         platform_device_register(&at_hdmac_device);
69 }
70 #else
71 void __init at91_add_device_hdmac(void) {}
72 #endif
73
74 /* --------------------------------------------------------------------
75  *  USB HS Device (Gadget)
76  * -------------------------------------------------------------------- */
77
78 #if defined(CONFIG_USB_GADGET_ATMEL_USBA) || defined(CONFIG_USB_GADGET_ATMEL_USBA_MODULE)
79
80 static struct resource usba_udc_resources[] = {
81         [0] = {
82                 .start  = AT91SAM9RL_UDPHS_FIFO,
83                 .end    = AT91SAM9RL_UDPHS_FIFO + SZ_512K - 1,
84                 .flags  = IORESOURCE_MEM,
85         },
86         [1] = {
87                 .start  = AT91SAM9RL_BASE_UDPHS,
88                 .end    = AT91SAM9RL_BASE_UDPHS + SZ_1K - 1,
89                 .flags  = IORESOURCE_MEM,
90         },
91         [2] = {
92                 .start  = AT91SAM9RL_ID_UDPHS,
93                 .end    = AT91SAM9RL_ID_UDPHS,
94                 .flags  = IORESOURCE_IRQ,
95         },
96 };
97
98 #define EP(nam, idx, maxpkt, maxbk, dma, isoc)                  \
99         [idx] = {                                               \
100                 .name           = nam,                          \
101                 .index          = idx,                          \
102                 .fifo_size      = maxpkt,                       \
103                 .nr_banks       = maxbk,                        \
104                 .can_dma        = dma,                          \
105                 .can_isoc       = isoc,                         \
106         }
107
108 static struct usba_ep_data usba_udc_ep[] __initdata = {
109         EP("ep0", 0, 64, 1, 0, 0),
110         EP("ep1", 1, 1024, 2, 1, 1),
111         EP("ep2", 2, 1024, 2, 1, 1),
112         EP("ep3", 3, 1024, 3, 1, 0),
113         EP("ep4", 4, 1024, 3, 1, 0),
114         EP("ep5", 5, 1024, 3, 1, 1),
115         EP("ep6", 6, 1024, 3, 1, 1),
116 };
117
118 #undef EP
119
120 /*
121  * pdata doesn't have room for any endpoints, so we need to
122  * append room for the ones we need right after it.
123  */
124 static struct {
125         struct usba_platform_data pdata;
126         struct usba_ep_data ep[7];
127 } usba_udc_data;
128
129 static struct platform_device at91_usba_udc_device = {
130         .name           = "atmel_usba_udc",
131         .id             = -1,
132         .dev            = {
133                                 .platform_data  = &usba_udc_data.pdata,
134         },
135         .resource       = usba_udc_resources,
136         .num_resources  = ARRAY_SIZE(usba_udc_resources),
137 };
138
139 void __init at91_add_device_usba(struct usba_platform_data *data)
140 {
141         /*
142          * Invalid pins are 0 on AT91, but the usba driver is shared
143          * with AVR32, which use negative values instead. Once/if
144          * gpio_is_valid() is ported to AT91, revisit this code.
145          */
146         usba_udc_data.pdata.vbus_pin = -EINVAL;
147         usba_udc_data.pdata.num_ep = ARRAY_SIZE(usba_udc_ep);
148         memcpy(usba_udc_data.ep, usba_udc_ep, sizeof(usba_udc_ep));
149
150         if (data && data->vbus_pin > 0) {
151                 at91_set_gpio_input(data->vbus_pin, 0);
152                 at91_set_deglitch(data->vbus_pin, 1);
153                 usba_udc_data.pdata.vbus_pin = data->vbus_pin;
154         }
155
156         /* Pullup pin is handled internally by USB device peripheral */
157
158         /* Clocks */
159         at91_clock_associate("utmi_clk", &at91_usba_udc_device.dev, "hclk");
160         at91_clock_associate("udphs_clk", &at91_usba_udc_device.dev, "pclk");
161
162         platform_device_register(&at91_usba_udc_device);
163 }
164 #else
165 void __init at91_add_device_usba(struct usba_platform_data *data) {}
166 #endif
167
168
169 /* --------------------------------------------------------------------
170  *  MMC / SD
171  * -------------------------------------------------------------------- */
172
173 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
174 static u64 mmc_dmamask = DMA_BIT_MASK(32);
175 static struct at91_mmc_data mmc_data;
176
177 static struct resource mmc_resources[] = {
178         [0] = {
179                 .start  = AT91SAM9RL_BASE_MCI,
180                 .end    = AT91SAM9RL_BASE_MCI + SZ_16K - 1,
181                 .flags  = IORESOURCE_MEM,
182         },
183         [1] = {
184                 .start  = AT91SAM9RL_ID_MCI,
185                 .end    = AT91SAM9RL_ID_MCI,
186                 .flags  = IORESOURCE_IRQ,
187         },
188 };
189
190 static struct platform_device at91sam9rl_mmc_device = {
191         .name           = "at91_mci",
192         .id             = -1,
193         .dev            = {
194                                 .dma_mask               = &mmc_dmamask,
195                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
196                                 .platform_data          = &mmc_data,
197         },
198         .resource       = mmc_resources,
199         .num_resources  = ARRAY_SIZE(mmc_resources),
200 };
201
202 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
203 {
204         if (!data)
205                 return;
206
207         /* input/irq */
208         if (data->det_pin) {
209                 at91_set_gpio_input(data->det_pin, 1);
210                 at91_set_deglitch(data->det_pin, 1);
211         }
212         if (data->wp_pin)
213                 at91_set_gpio_input(data->wp_pin, 1);
214         if (data->vcc_pin)
215                 at91_set_gpio_output(data->vcc_pin, 0);
216
217         /* CLK */
218         at91_set_A_periph(AT91_PIN_PA2, 0);
219
220         /* CMD */
221         at91_set_A_periph(AT91_PIN_PA1, 1);
222
223         /* DAT0, maybe DAT1..DAT3 */
224         at91_set_A_periph(AT91_PIN_PA0, 1);
225         if (data->wire4) {
226                 at91_set_A_periph(AT91_PIN_PA3, 1);
227                 at91_set_A_periph(AT91_PIN_PA4, 1);
228                 at91_set_A_periph(AT91_PIN_PA5, 1);
229         }
230
231         mmc_data = *data;
232         platform_device_register(&at91sam9rl_mmc_device);
233 }
234 #else
235 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
236 #endif
237
238
239 /* --------------------------------------------------------------------
240  *  NAND / SmartMedia
241  * -------------------------------------------------------------------- */
242
243 #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
244 static struct atmel_nand_data nand_data;
245
246 #define NAND_BASE       AT91_CHIPSELECT_3
247
248 static struct resource nand_resources[] = {
249         [0] = {
250                 .start  = NAND_BASE,
251                 .end    = NAND_BASE + SZ_256M - 1,
252                 .flags  = IORESOURCE_MEM,
253         },
254         [1] = {
255                 .start  = AT91_BASE_SYS + AT91_ECC,
256                 .end    = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1,
257                 .flags  = IORESOURCE_MEM,
258         }
259 };
260
261 static struct platform_device atmel_nand_device = {
262         .name           = "atmel_nand",
263         .id             = -1,
264         .dev            = {
265                                 .platform_data  = &nand_data,
266         },
267         .resource       = nand_resources,
268         .num_resources  = ARRAY_SIZE(nand_resources),
269 };
270
271 void __init at91_add_device_nand(struct atmel_nand_data *data)
272 {
273         unsigned long csa;
274
275         if (!data)
276                 return;
277
278         csa = at91_sys_read(AT91_MATRIX_EBICSA);
279         at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
280
281         /* enable pin */
282         if (data->enable_pin)
283                 at91_set_gpio_output(data->enable_pin, 1);
284
285         /* ready/busy pin */
286         if (data->rdy_pin)
287                 at91_set_gpio_input(data->rdy_pin, 1);
288
289         /* card detect pin */
290         if (data->det_pin)
291                 at91_set_gpio_input(data->det_pin, 1);
292
293         at91_set_A_periph(AT91_PIN_PB4, 0);             /* NANDOE */
294         at91_set_A_periph(AT91_PIN_PB5, 0);             /* NANDWE */
295
296         nand_data = *data;
297         platform_device_register(&atmel_nand_device);
298 }
299
300 #else
301 void __init at91_add_device_nand(struct atmel_nand_data *data) {}
302 #endif
303
304
305 /* --------------------------------------------------------------------
306  *  TWI (i2c)
307  * -------------------------------------------------------------------- */
308
309 /*
310  * Prefer the GPIO code since the TWI controller isn't robust
311  * (gets overruns and underruns under load) and can only issue
312  * repeated STARTs in one scenario (the driver doesn't yet handle them).
313  */
314 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
315
316 static struct i2c_gpio_platform_data pdata = {
317         .sda_pin                = AT91_PIN_PA23,
318         .sda_is_open_drain      = 1,
319         .scl_pin                = AT91_PIN_PA24,
320         .scl_is_open_drain      = 1,
321         .udelay                 = 2,            /* ~100 kHz */
322 };
323
324 static struct platform_device at91sam9rl_twi_device = {
325         .name                   = "i2c-gpio",
326         .id                     = -1,
327         .dev.platform_data      = &pdata,
328 };
329
330 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
331 {
332         at91_set_GPIO_periph(AT91_PIN_PA23, 1);         /* TWD (SDA) */
333         at91_set_multi_drive(AT91_PIN_PA23, 1);
334
335         at91_set_GPIO_periph(AT91_PIN_PA24, 1);         /* TWCK (SCL) */
336         at91_set_multi_drive(AT91_PIN_PA24, 1);
337
338         i2c_register_board_info(0, devices, nr_devices);
339         platform_device_register(&at91sam9rl_twi_device);
340 }
341
342 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
343
344 static struct resource twi_resources[] = {
345         [0] = {
346                 .start  = AT91SAM9RL_BASE_TWI0,
347                 .end    = AT91SAM9RL_BASE_TWI0 + SZ_16K - 1,
348                 .flags  = IORESOURCE_MEM,
349         },
350         [1] = {
351                 .start  = AT91SAM9RL_ID_TWI0,
352                 .end    = AT91SAM9RL_ID_TWI0,
353                 .flags  = IORESOURCE_IRQ,
354         },
355 };
356
357 static struct platform_device at91sam9rl_twi_device = {
358         .name           = "at91_i2c",
359         .id             = -1,
360         .resource       = twi_resources,
361         .num_resources  = ARRAY_SIZE(twi_resources),
362 };
363
364 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
365 {
366         /* pins used for TWI interface */
367         at91_set_A_periph(AT91_PIN_PA23, 0);            /* TWD */
368         at91_set_multi_drive(AT91_PIN_PA23, 1);
369
370         at91_set_A_periph(AT91_PIN_PA24, 0);            /* TWCK */
371         at91_set_multi_drive(AT91_PIN_PA24, 1);
372
373         i2c_register_board_info(0, devices, nr_devices);
374         platform_device_register(&at91sam9rl_twi_device);
375 }
376 #else
377 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
378 #endif
379
380
381 /* --------------------------------------------------------------------
382  *  SPI
383  * -------------------------------------------------------------------- */
384
385 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
386 static u64 spi_dmamask = DMA_BIT_MASK(32);
387
388 static struct resource spi_resources[] = {
389         [0] = {
390                 .start  = AT91SAM9RL_BASE_SPI,
391                 .end    = AT91SAM9RL_BASE_SPI + SZ_16K - 1,
392                 .flags  = IORESOURCE_MEM,
393         },
394         [1] = {
395                 .start  = AT91SAM9RL_ID_SPI,
396                 .end    = AT91SAM9RL_ID_SPI,
397                 .flags  = IORESOURCE_IRQ,
398         },
399 };
400
401 static struct platform_device at91sam9rl_spi_device = {
402         .name           = "atmel_spi",
403         .id             = 0,
404         .dev            = {
405                                 .dma_mask               = &spi_dmamask,
406                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
407         },
408         .resource       = spi_resources,
409         .num_resources  = ARRAY_SIZE(spi_resources),
410 };
411
412 static const unsigned spi_standard_cs[4] = { AT91_PIN_PA28, AT91_PIN_PB7, AT91_PIN_PD8, AT91_PIN_PD9 };
413
414
415 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
416 {
417         int i;
418         unsigned long cs_pin;
419
420         at91_set_A_periph(AT91_PIN_PA25, 0);    /* MISO */
421         at91_set_A_periph(AT91_PIN_PA26, 0);    /* MOSI */
422         at91_set_A_periph(AT91_PIN_PA27, 0);    /* SPCK */
423
424         /* Enable SPI chip-selects */
425         for (i = 0; i < nr_devices; i++) {
426                 if (devices[i].controller_data)
427                         cs_pin = (unsigned long) devices[i].controller_data;
428                 else
429                         cs_pin = spi_standard_cs[devices[i].chip_select];
430
431                 /* enable chip-select pin */
432                 at91_set_gpio_output(cs_pin, 1);
433
434                 /* pass chip-select pin to driver */
435                 devices[i].controller_data = (void *) cs_pin;
436         }
437
438         spi_register_board_info(devices, nr_devices);
439         platform_device_register(&at91sam9rl_spi_device);
440 }
441 #else
442 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
443 #endif
444
445
446 /* --------------------------------------------------------------------
447  *  AC97
448  * -------------------------------------------------------------------- */
449
450 #if defined(CONFIG_SND_ATMEL_AC97C) || defined(CONFIG_SND_ATMEL_AC97C_MODULE)
451 static u64 ac97_dmamask = DMA_BIT_MASK(32);
452 static struct ac97c_platform_data ac97_data;
453
454 static struct resource ac97_resources[] = {
455         [0] = {
456                 .start  = AT91SAM9RL_BASE_AC97C,
457                 .end    = AT91SAM9RL_BASE_AC97C + SZ_16K - 1,
458                 .flags  = IORESOURCE_MEM,
459         },
460         [1] = {
461                 .start  = AT91SAM9RL_ID_AC97C,
462                 .end    = AT91SAM9RL_ID_AC97C,
463                 .flags  = IORESOURCE_IRQ,
464         },
465 };
466
467 static struct platform_device at91sam9rl_ac97_device = {
468         .name           = "atmel_ac97c",
469         .id             = 0,
470         .dev            = {
471                                 .dma_mask               = &ac97_dmamask,
472                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
473                                 .platform_data          = &ac97_data,
474         },
475         .resource       = ac97_resources,
476         .num_resources  = ARRAY_SIZE(ac97_resources),
477 };
478
479 void __init at91_add_device_ac97(struct ac97c_platform_data *data)
480 {
481         if (!data)
482                 return;
483
484         at91_set_A_periph(AT91_PIN_PD1, 0);     /* AC97FS */
485         at91_set_A_periph(AT91_PIN_PD2, 0);     /* AC97CK */
486         at91_set_A_periph(AT91_PIN_PD3, 0);     /* AC97TX */
487         at91_set_A_periph(AT91_PIN_PD4, 0);     /* AC97RX */
488
489         /* reset */
490         if (data->reset_pin)
491                 at91_set_gpio_output(data->reset_pin, 0);
492
493         ac97_data = *data;
494         platform_device_register(&at91sam9rl_ac97_device);
495 }
496 #else
497 void __init at91_add_device_ac97(struct ac97c_platform_data *data) {}
498 #endif
499
500
501 /* --------------------------------------------------------------------
502  *  LCD Controller
503  * -------------------------------------------------------------------- */
504
505 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
506 static u64 lcdc_dmamask = DMA_BIT_MASK(32);
507 static struct atmel_lcdfb_info lcdc_data;
508
509 static struct resource lcdc_resources[] = {
510         [0] = {
511                 .start  = AT91SAM9RL_LCDC_BASE,
512                 .end    = AT91SAM9RL_LCDC_BASE + SZ_4K - 1,
513                 .flags  = IORESOURCE_MEM,
514         },
515         [1] = {
516                 .start  = AT91SAM9RL_ID_LCDC,
517                 .end    = AT91SAM9RL_ID_LCDC,
518                 .flags  = IORESOURCE_IRQ,
519         },
520 };
521
522 static struct platform_device at91_lcdc_device = {
523         .name           = "atmel_lcdfb",
524         .id             = 0,
525         .dev            = {
526                                 .dma_mask               = &lcdc_dmamask,
527                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
528                                 .platform_data          = &lcdc_data,
529         },
530         .resource       = lcdc_resources,
531         .num_resources  = ARRAY_SIZE(lcdc_resources),
532 };
533
534 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
535 {
536         if (!data) {
537                 return;
538         }
539
540         at91_set_B_periph(AT91_PIN_PC1, 0);     /* LCDPWR */
541         at91_set_A_periph(AT91_PIN_PC5, 0);     /* LCDHSYNC */
542         at91_set_A_periph(AT91_PIN_PC6, 0);     /* LCDDOTCK */
543         at91_set_A_periph(AT91_PIN_PC7, 0);     /* LCDDEN */
544         at91_set_A_periph(AT91_PIN_PC3, 0);     /* LCDCC */
545         at91_set_B_periph(AT91_PIN_PC9, 0);     /* LCDD3 */
546         at91_set_B_periph(AT91_PIN_PC10, 0);    /* LCDD4 */
547         at91_set_B_periph(AT91_PIN_PC11, 0);    /* LCDD5 */
548         at91_set_B_periph(AT91_PIN_PC12, 0);    /* LCDD6 */
549         at91_set_B_periph(AT91_PIN_PC13, 0);    /* LCDD7 */
550         at91_set_B_periph(AT91_PIN_PC15, 0);    /* LCDD11 */
551         at91_set_B_periph(AT91_PIN_PC16, 0);    /* LCDD12 */
552         at91_set_B_periph(AT91_PIN_PC17, 0);    /* LCDD13 */
553         at91_set_B_periph(AT91_PIN_PC18, 0);    /* LCDD14 */
554         at91_set_B_periph(AT91_PIN_PC19, 0);    /* LCDD15 */
555         at91_set_B_periph(AT91_PIN_PC20, 0);    /* LCDD18 */
556         at91_set_B_periph(AT91_PIN_PC21, 0);    /* LCDD19 */
557         at91_set_B_periph(AT91_PIN_PC22, 0);    /* LCDD20 */
558         at91_set_B_periph(AT91_PIN_PC23, 0);    /* LCDD21 */
559         at91_set_B_periph(AT91_PIN_PC24, 0);    /* LCDD22 */
560         at91_set_B_periph(AT91_PIN_PC25, 0);    /* LCDD23 */
561
562         lcdc_data = *data;
563         platform_device_register(&at91_lcdc_device);
564 }
565 #else
566 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
567 #endif
568
569
570 /* --------------------------------------------------------------------
571  *  Timer/Counter block
572  * -------------------------------------------------------------------- */
573
574 #ifdef CONFIG_ATMEL_TCLIB
575
576 static struct resource tcb_resources[] = {
577         [0] = {
578                 .start  = AT91SAM9RL_BASE_TCB0,
579                 .end    = AT91SAM9RL_BASE_TCB0 + SZ_16K - 1,
580                 .flags  = IORESOURCE_MEM,
581         },
582         [1] = {
583                 .start  = AT91SAM9RL_ID_TC0,
584                 .end    = AT91SAM9RL_ID_TC0,
585                 .flags  = IORESOURCE_IRQ,
586         },
587         [2] = {
588                 .start  = AT91SAM9RL_ID_TC1,
589                 .end    = AT91SAM9RL_ID_TC1,
590                 .flags  = IORESOURCE_IRQ,
591         },
592         [3] = {
593                 .start  = AT91SAM9RL_ID_TC2,
594                 .end    = AT91SAM9RL_ID_TC2,
595                 .flags  = IORESOURCE_IRQ,
596         },
597 };
598
599 static struct platform_device at91sam9rl_tcb_device = {
600         .name           = "atmel_tcb",
601         .id             = 0,
602         .resource       = tcb_resources,
603         .num_resources  = ARRAY_SIZE(tcb_resources),
604 };
605
606 static void __init at91_add_device_tc(void)
607 {
608         /* this chip has a separate clock and irq for each TC channel */
609         at91_clock_associate("tc0_clk", &at91sam9rl_tcb_device.dev, "t0_clk");
610         at91_clock_associate("tc1_clk", &at91sam9rl_tcb_device.dev, "t1_clk");
611         at91_clock_associate("tc2_clk", &at91sam9rl_tcb_device.dev, "t2_clk");
612         platform_device_register(&at91sam9rl_tcb_device);
613 }
614 #else
615 static void __init at91_add_device_tc(void) { }
616 #endif
617
618
619 /* --------------------------------------------------------------------
620  *  Touchscreen
621  * -------------------------------------------------------------------- */
622
623 #if defined(CONFIG_TOUCHSCREEN_ATMEL_TSADCC) || defined(CONFIG_TOUCHSCREEN_ATMEL_TSADCC_MODULE)
624 static u64 tsadcc_dmamask = DMA_BIT_MASK(32);
625 static struct at91_tsadcc_data tsadcc_data;
626
627 static struct resource tsadcc_resources[] = {
628         [0] = {
629                 .start  = AT91SAM9RL_BASE_TSC,
630                 .end    = AT91SAM9RL_BASE_TSC + SZ_16K - 1,
631                 .flags  = IORESOURCE_MEM,
632         },
633         [1] = {
634                 .start  = AT91SAM9RL_ID_TSC,
635                 .end    = AT91SAM9RL_ID_TSC,
636                 .flags  = IORESOURCE_IRQ,
637         }
638 };
639
640 static struct platform_device at91sam9rl_tsadcc_device = {
641         .name           = "atmel_tsadcc",
642         .id             = -1,
643         .dev            = {
644                                 .dma_mask               = &tsadcc_dmamask,
645                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
646                                 .platform_data          = &tsadcc_data,
647         },
648         .resource       = tsadcc_resources,
649         .num_resources  = ARRAY_SIZE(tsadcc_resources),
650 };
651
652 void __init at91_add_device_tsadcc(struct at91_tsadcc_data *data)
653 {
654         if (!data)
655                 return;
656
657         at91_set_A_periph(AT91_PIN_PA17, 0);    /* AD0_XR */
658         at91_set_A_periph(AT91_PIN_PA18, 0);    /* AD1_XL */
659         at91_set_A_periph(AT91_PIN_PA19, 0);    /* AD2_YT */
660         at91_set_A_periph(AT91_PIN_PA20, 0);    /* AD3_TB */
661
662         tsadcc_data = *data;
663         platform_device_register(&at91sam9rl_tsadcc_device);
664 }
665 #else
666 void __init at91_add_device_tsadcc(struct at91_tsadcc_data *data) {}
667 #endif
668
669
670 /* --------------------------------------------------------------------
671  *  RTC
672  * -------------------------------------------------------------------- */
673
674 #if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE)
675 static struct platform_device at91sam9rl_rtc_device = {
676         .name           = "at91_rtc",
677         .id             = -1,
678         .num_resources  = 0,
679 };
680
681 static void __init at91_add_device_rtc(void)
682 {
683         platform_device_register(&at91sam9rl_rtc_device);
684 }
685 #else
686 static void __init at91_add_device_rtc(void) {}
687 #endif
688
689
690 /* --------------------------------------------------------------------
691  *  RTT
692  * -------------------------------------------------------------------- */
693
694 static struct resource rtt_resources[] = {
695         {
696                 .start  = AT91_BASE_SYS + AT91_RTT,
697                 .end    = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1,
698                 .flags  = IORESOURCE_MEM,
699         }
700 };
701
702 static struct platform_device at91sam9rl_rtt_device = {
703         .name           = "at91_rtt",
704         .id             = 0,
705         .resource       = rtt_resources,
706         .num_resources  = ARRAY_SIZE(rtt_resources),
707 };
708
709 static void __init at91_add_device_rtt(void)
710 {
711         platform_device_register(&at91sam9rl_rtt_device);
712 }
713
714
715 /* --------------------------------------------------------------------
716  *  Watchdog
717  * -------------------------------------------------------------------- */
718
719 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
720 static struct platform_device at91sam9rl_wdt_device = {
721         .name           = "at91_wdt",
722         .id             = -1,
723         .num_resources  = 0,
724 };
725
726 static void __init at91_add_device_watchdog(void)
727 {
728         platform_device_register(&at91sam9rl_wdt_device);
729 }
730 #else
731 static void __init at91_add_device_watchdog(void) {}
732 #endif
733
734
735 /* --------------------------------------------------------------------
736  *  PWM
737  * --------------------------------------------------------------------*/
738
739 #if defined(CONFIG_ATMEL_PWM)
740 static u32 pwm_mask;
741
742 static struct resource pwm_resources[] = {
743         [0] = {
744                 .start  = AT91SAM9RL_BASE_PWMC,
745                 .end    = AT91SAM9RL_BASE_PWMC + SZ_16K - 1,
746                 .flags  = IORESOURCE_MEM,
747         },
748         [1] = {
749                 .start  = AT91SAM9RL_ID_PWMC,
750                 .end    = AT91SAM9RL_ID_PWMC,
751                 .flags  = IORESOURCE_IRQ,
752         },
753 };
754
755 static struct platform_device at91sam9rl_pwm0_device = {
756         .name   = "atmel_pwm",
757         .id     = -1,
758         .dev    = {
759                 .platform_data          = &pwm_mask,
760         },
761         .resource       = pwm_resources,
762         .num_resources  = ARRAY_SIZE(pwm_resources),
763 };
764
765 void __init at91_add_device_pwm(u32 mask)
766 {
767         if (mask & (1 << AT91_PWM0))
768                 at91_set_B_periph(AT91_PIN_PB8, 1);     /* enable PWM0 */
769
770         if (mask & (1 << AT91_PWM1))
771                 at91_set_B_periph(AT91_PIN_PB9, 1);     /* enable PWM1 */
772
773         if (mask & (1 << AT91_PWM2))
774                 at91_set_B_periph(AT91_PIN_PD5, 1);     /* enable PWM2 */
775
776         if (mask & (1 << AT91_PWM3))
777                 at91_set_B_periph(AT91_PIN_PD8, 1);     /* enable PWM3 */
778
779         pwm_mask = mask;
780
781         platform_device_register(&at91sam9rl_pwm0_device);
782 }
783 #else
784 void __init at91_add_device_pwm(u32 mask) {}
785 #endif
786
787
788 /* --------------------------------------------------------------------
789  *  SSC -- Synchronous Serial Controller
790  * -------------------------------------------------------------------- */
791
792 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
793 static u64 ssc0_dmamask = DMA_BIT_MASK(32);
794
795 static struct resource ssc0_resources[] = {
796         [0] = {
797                 .start  = AT91SAM9RL_BASE_SSC0,
798                 .end    = AT91SAM9RL_BASE_SSC0 + SZ_16K - 1,
799                 .flags  = IORESOURCE_MEM,
800         },
801         [1] = {
802                 .start  = AT91SAM9RL_ID_SSC0,
803                 .end    = AT91SAM9RL_ID_SSC0,
804                 .flags  = IORESOURCE_IRQ,
805         },
806 };
807
808 static struct platform_device at91sam9rl_ssc0_device = {
809         .name   = "ssc",
810         .id     = 0,
811         .dev    = {
812                 .dma_mask               = &ssc0_dmamask,
813                 .coherent_dma_mask      = DMA_BIT_MASK(32),
814         },
815         .resource       = ssc0_resources,
816         .num_resources  = ARRAY_SIZE(ssc0_resources),
817 };
818
819 static inline void configure_ssc0_pins(unsigned pins)
820 {
821         if (pins & ATMEL_SSC_TF)
822                 at91_set_A_periph(AT91_PIN_PC0, 1);
823         if (pins & ATMEL_SSC_TK)
824                 at91_set_A_periph(AT91_PIN_PC1, 1);
825         if (pins & ATMEL_SSC_TD)
826                 at91_set_A_periph(AT91_PIN_PA15, 1);
827         if (pins & ATMEL_SSC_RD)
828                 at91_set_A_periph(AT91_PIN_PA16, 1);
829         if (pins & ATMEL_SSC_RK)
830                 at91_set_B_periph(AT91_PIN_PA10, 1);
831         if (pins & ATMEL_SSC_RF)
832                 at91_set_B_periph(AT91_PIN_PA22, 1);
833 }
834
835 static u64 ssc1_dmamask = DMA_BIT_MASK(32);
836
837 static struct resource ssc1_resources[] = {
838         [0] = {
839                 .start  = AT91SAM9RL_BASE_SSC1,
840                 .end    = AT91SAM9RL_BASE_SSC1 + SZ_16K - 1,
841                 .flags  = IORESOURCE_MEM,
842         },
843         [1] = {
844                 .start  = AT91SAM9RL_ID_SSC1,
845                 .end    = AT91SAM9RL_ID_SSC1,
846                 .flags  = IORESOURCE_IRQ,
847         },
848 };
849
850 static struct platform_device at91sam9rl_ssc1_device = {
851         .name   = "ssc",
852         .id     = 1,
853         .dev    = {
854                 .dma_mask               = &ssc1_dmamask,
855                 .coherent_dma_mask      = DMA_BIT_MASK(32),
856         },
857         .resource       = ssc1_resources,
858         .num_resources  = ARRAY_SIZE(ssc1_resources),
859 };
860
861 static inline void configure_ssc1_pins(unsigned pins)
862 {
863         if (pins & ATMEL_SSC_TF)
864                 at91_set_B_periph(AT91_PIN_PA29, 1);
865         if (pins & ATMEL_SSC_TK)
866                 at91_set_B_periph(AT91_PIN_PA30, 1);
867         if (pins & ATMEL_SSC_TD)
868                 at91_set_B_periph(AT91_PIN_PA13, 1);
869         if (pins & ATMEL_SSC_RD)
870                 at91_set_B_periph(AT91_PIN_PA14, 1);
871         if (pins & ATMEL_SSC_RK)
872                 at91_set_B_periph(AT91_PIN_PA9, 1);
873         if (pins & ATMEL_SSC_RF)
874                 at91_set_B_periph(AT91_PIN_PA8, 1);
875 }
876
877 /*
878  * SSC controllers are accessed through library code, instead of any
879  * kind of all-singing/all-dancing driver.  For example one could be
880  * used by a particular I2S audio codec's driver, while another one
881  * on the same system might be used by a custom data capture driver.
882  */
883 void __init at91_add_device_ssc(unsigned id, unsigned pins)
884 {
885         struct platform_device *pdev;
886
887         /*
888          * NOTE: caller is responsible for passing information matching
889          * "pins" to whatever will be using each particular controller.
890          */
891         switch (id) {
892         case AT91SAM9RL_ID_SSC0:
893                 pdev = &at91sam9rl_ssc0_device;
894                 configure_ssc0_pins(pins);
895                 at91_clock_associate("ssc0_clk", &pdev->dev, "pclk");
896                 break;
897         case AT91SAM9RL_ID_SSC1:
898                 pdev = &at91sam9rl_ssc1_device;
899                 configure_ssc1_pins(pins);
900                 at91_clock_associate("ssc1_clk", &pdev->dev, "pclk");
901                 break;
902         default:
903                 return;
904         }
905
906         platform_device_register(pdev);
907 }
908
909 #else
910 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
911 #endif
912
913
914 /* --------------------------------------------------------------------
915  *  UART
916  * -------------------------------------------------------------------- */
917
918 #if defined(CONFIG_SERIAL_ATMEL)
919 static struct resource dbgu_resources[] = {
920         [0] = {
921                 .start  = AT91_VA_BASE_SYS + AT91_DBGU,
922                 .end    = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
923                 .flags  = IORESOURCE_MEM,
924         },
925         [1] = {
926                 .start  = AT91_ID_SYS,
927                 .end    = AT91_ID_SYS,
928                 .flags  = IORESOURCE_IRQ,
929         },
930 };
931
932 static struct atmel_uart_data dbgu_data = {
933         .use_dma_tx     = 0,
934         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
935         .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
936 };
937
938 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
939
940 static struct platform_device at91sam9rl_dbgu_device = {
941         .name           = "atmel_usart",
942         .id             = 0,
943         .dev            = {
944                                 .dma_mask               = &dbgu_dmamask,
945                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
946                                 .platform_data          = &dbgu_data,
947         },
948         .resource       = dbgu_resources,
949         .num_resources  = ARRAY_SIZE(dbgu_resources),
950 };
951
952 static inline void configure_dbgu_pins(void)
953 {
954         at91_set_A_periph(AT91_PIN_PA21, 0);            /* DRXD */
955         at91_set_A_periph(AT91_PIN_PA22, 1);            /* DTXD */
956 }
957
958 static struct resource uart0_resources[] = {
959         [0] = {
960                 .start  = AT91SAM9RL_BASE_US0,
961                 .end    = AT91SAM9RL_BASE_US0 + SZ_16K - 1,
962                 .flags  = IORESOURCE_MEM,
963         },
964         [1] = {
965                 .start  = AT91SAM9RL_ID_US0,
966                 .end    = AT91SAM9RL_ID_US0,
967                 .flags  = IORESOURCE_IRQ,
968         },
969 };
970
971 static struct atmel_uart_data uart0_data = {
972         .use_dma_tx     = 1,
973         .use_dma_rx     = 1,
974 };
975
976 static u64 uart0_dmamask = DMA_BIT_MASK(32);
977
978 static struct platform_device at91sam9rl_uart0_device = {
979         .name           = "atmel_usart",
980         .id             = 1,
981         .dev            = {
982                                 .dma_mask               = &uart0_dmamask,
983                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
984                                 .platform_data          = &uart0_data,
985         },
986         .resource       = uart0_resources,
987         .num_resources  = ARRAY_SIZE(uart0_resources),
988 };
989
990 static inline void configure_usart0_pins(unsigned pins)
991 {
992         at91_set_A_periph(AT91_PIN_PA6, 1);             /* TXD0 */
993         at91_set_A_periph(AT91_PIN_PA7, 0);             /* RXD0 */
994
995         if (pins & ATMEL_UART_RTS)
996                 at91_set_A_periph(AT91_PIN_PA9, 0);     /* RTS0 */
997         if (pins & ATMEL_UART_CTS)
998                 at91_set_A_periph(AT91_PIN_PA10, 0);    /* CTS0 */
999         if (pins & ATMEL_UART_DSR)
1000                 at91_set_A_periph(AT91_PIN_PD14, 0);    /* DSR0 */
1001         if (pins & ATMEL_UART_DTR)
1002                 at91_set_A_periph(AT91_PIN_PD15, 0);    /* DTR0 */
1003         if (pins & ATMEL_UART_DCD)
1004                 at91_set_A_periph(AT91_PIN_PD16, 0);    /* DCD0 */
1005         if (pins & ATMEL_UART_RI)
1006                 at91_set_A_periph(AT91_PIN_PD17, 0);    /* RI0 */
1007 }
1008
1009 static struct resource uart1_resources[] = {
1010         [0] = {
1011                 .start  = AT91SAM9RL_BASE_US1,
1012                 .end    = AT91SAM9RL_BASE_US1 + SZ_16K - 1,
1013                 .flags  = IORESOURCE_MEM,
1014         },
1015         [1] = {
1016                 .start  = AT91SAM9RL_ID_US1,
1017                 .end    = AT91SAM9RL_ID_US1,
1018                 .flags  = IORESOURCE_IRQ,
1019         },
1020 };
1021
1022 static struct atmel_uart_data uart1_data = {
1023         .use_dma_tx     = 1,
1024         .use_dma_rx     = 1,
1025 };
1026
1027 static u64 uart1_dmamask = DMA_BIT_MASK(32);
1028
1029 static struct platform_device at91sam9rl_uart1_device = {
1030         .name           = "atmel_usart",
1031         .id             = 2,
1032         .dev            = {
1033                                 .dma_mask               = &uart1_dmamask,
1034                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1035                                 .platform_data          = &uart1_data,
1036         },
1037         .resource       = uart1_resources,
1038         .num_resources  = ARRAY_SIZE(uart1_resources),
1039 };
1040
1041 static inline void configure_usart1_pins(unsigned pins)
1042 {
1043         at91_set_A_periph(AT91_PIN_PA11, 1);            /* TXD1 */
1044         at91_set_A_periph(AT91_PIN_PA12, 0);            /* RXD1 */
1045
1046         if (pins & ATMEL_UART_RTS)
1047                 at91_set_B_periph(AT91_PIN_PA18, 0);    /* RTS1 */
1048         if (pins & ATMEL_UART_CTS)
1049                 at91_set_B_periph(AT91_PIN_PA19, 0);    /* CTS1 */
1050 }
1051
1052 static struct resource uart2_resources[] = {
1053         [0] = {
1054                 .start  = AT91SAM9RL_BASE_US2,
1055                 .end    = AT91SAM9RL_BASE_US2 + SZ_16K - 1,
1056                 .flags  = IORESOURCE_MEM,
1057         },
1058         [1] = {
1059                 .start  = AT91SAM9RL_ID_US2,
1060                 .end    = AT91SAM9RL_ID_US2,
1061                 .flags  = IORESOURCE_IRQ,
1062         },
1063 };
1064
1065 static struct atmel_uart_data uart2_data = {
1066         .use_dma_tx     = 1,
1067         .use_dma_rx     = 1,
1068 };
1069
1070 static u64 uart2_dmamask = DMA_BIT_MASK(32);
1071
1072 static struct platform_device at91sam9rl_uart2_device = {
1073         .name           = "atmel_usart",
1074         .id             = 3,
1075         .dev            = {
1076                                 .dma_mask               = &uart2_dmamask,
1077                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1078                                 .platform_data          = &uart2_data,
1079         },
1080         .resource       = uart2_resources,
1081         .num_resources  = ARRAY_SIZE(uart2_resources),
1082 };
1083
1084 static inline void configure_usart2_pins(unsigned pins)
1085 {
1086         at91_set_A_periph(AT91_PIN_PA13, 1);            /* TXD2 */
1087         at91_set_A_periph(AT91_PIN_PA14, 0);            /* RXD2 */
1088
1089         if (pins & ATMEL_UART_RTS)
1090                 at91_set_A_periph(AT91_PIN_PA29, 0);    /* RTS2 */
1091         if (pins & ATMEL_UART_CTS)
1092                 at91_set_A_periph(AT91_PIN_PA30, 0);    /* CTS2 */
1093 }
1094
1095 static struct resource uart3_resources[] = {
1096         [0] = {
1097                 .start  = AT91SAM9RL_BASE_US3,
1098                 .end    = AT91SAM9RL_BASE_US3 + SZ_16K - 1,
1099                 .flags  = IORESOURCE_MEM,
1100         },
1101         [1] = {
1102                 .start  = AT91SAM9RL_ID_US3,
1103                 .end    = AT91SAM9RL_ID_US3,
1104                 .flags  = IORESOURCE_IRQ,
1105         },
1106 };
1107
1108 static struct atmel_uart_data uart3_data = {
1109         .use_dma_tx     = 1,
1110         .use_dma_rx     = 1,
1111 };
1112
1113 static u64 uart3_dmamask = DMA_BIT_MASK(32);
1114
1115 static struct platform_device at91sam9rl_uart3_device = {
1116         .name           = "atmel_usart",
1117         .id             = 4,
1118         .dev            = {
1119                                 .dma_mask               = &uart3_dmamask,
1120                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1121                                 .platform_data          = &uart3_data,
1122         },
1123         .resource       = uart3_resources,
1124         .num_resources  = ARRAY_SIZE(uart3_resources),
1125 };
1126
1127 static inline void configure_usart3_pins(unsigned pins)
1128 {
1129         at91_set_A_periph(AT91_PIN_PB0, 1);             /* TXD3 */
1130         at91_set_A_periph(AT91_PIN_PB1, 0);             /* RXD3 */
1131
1132         if (pins & ATMEL_UART_RTS)
1133                 at91_set_B_periph(AT91_PIN_PD4, 0);     /* RTS3 */
1134         if (pins & ATMEL_UART_CTS)
1135                 at91_set_B_periph(AT91_PIN_PD3, 0);     /* CTS3 */
1136 }
1137
1138 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
1139 struct platform_device *atmel_default_console_device;   /* the serial console device */
1140
1141 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1142 {
1143         struct platform_device *pdev;
1144         struct atmel_uart_data *pdata;
1145
1146         switch (id) {
1147                 case 0:         /* DBGU */
1148                         pdev = &at91sam9rl_dbgu_device;
1149                         configure_dbgu_pins();
1150                         at91_clock_associate("mck", &pdev->dev, "usart");
1151                         break;
1152                 case AT91SAM9RL_ID_US0:
1153                         pdev = &at91sam9rl_uart0_device;
1154                         configure_usart0_pins(pins);
1155                         at91_clock_associate("usart0_clk", &pdev->dev, "usart");
1156                         break;
1157                 case AT91SAM9RL_ID_US1:
1158                         pdev = &at91sam9rl_uart1_device;
1159                         configure_usart1_pins(pins);
1160                         at91_clock_associate("usart1_clk", &pdev->dev, "usart");
1161                         break;
1162                 case AT91SAM9RL_ID_US2:
1163                         pdev = &at91sam9rl_uart2_device;
1164                         configure_usart2_pins(pins);
1165                         at91_clock_associate("usart2_clk", &pdev->dev, "usart");
1166                         break;
1167                 case AT91SAM9RL_ID_US3:
1168                         pdev = &at91sam9rl_uart3_device;
1169                         configure_usart3_pins(pins);
1170                         at91_clock_associate("usart3_clk", &pdev->dev, "usart");
1171                         break;
1172                 default:
1173                         return;
1174         }
1175         pdata = pdev->dev.platform_data;
1176         pdata->num = portnr;            /* update to mapped ID */
1177
1178         if (portnr < ATMEL_MAX_UART)
1179                 at91_uarts[portnr] = pdev;
1180 }
1181
1182 void __init at91_set_serial_console(unsigned portnr)
1183 {
1184         if (portnr < ATMEL_MAX_UART)
1185                 atmel_default_console_device = at91_uarts[portnr];
1186 }
1187
1188 void __init at91_add_device_serial(void)
1189 {
1190         int i;
1191
1192         for (i = 0; i < ATMEL_MAX_UART; i++) {
1193                 if (at91_uarts[i])
1194                         platform_device_register(at91_uarts[i]);
1195         }
1196
1197         if (!atmel_default_console_device)
1198                 printk(KERN_INFO "AT91: No default serial console defined.\n");
1199 }
1200 #else
1201 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1202 void __init at91_set_serial_console(unsigned portnr) {}
1203 void __init at91_add_device_serial(void) {}
1204 #endif
1205
1206
1207 /* -------------------------------------------------------------------- */
1208
1209 /*
1210  * These devices are always present and don't need any board-specific
1211  * setup.
1212  */
1213 static int __init at91_add_standard_devices(void)
1214 {
1215         at91_add_device_hdmac();
1216         at91_add_device_rtc();
1217         at91_add_device_rtt();
1218         at91_add_device_watchdog();
1219         at91_add_device_tc();
1220         return 0;
1221 }
1222
1223 arch_initcall(at91_add_standard_devices);