[ARM] 4904/1: [AT91] Pass ECC controller to NAND driver
[pandora-kernel.git] / arch / arm / mach-at91 / at91sam9260_devices.c
1 /*
2  * arch/arm/mach-at91/at91sam9260_devices.c
3  *
4  *  Copyright (C) 2006 Atmel
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  */
12 #include <asm/mach/arch.h>
13 #include <asm/mach/map.h>
14
15 #include <linux/dma-mapping.h>
16 #include <linux/platform_device.h>
17 #include <linux/i2c-gpio.h>
18
19 #include <asm/arch/board.h>
20 #include <asm/arch/gpio.h>
21 #include <asm/arch/at91sam9260.h>
22 #include <asm/arch/at91sam9260_matrix.h>
23 #include <asm/arch/at91sam9_smc.h>
24
25 #include "generic.h"
26
27
28 /* --------------------------------------------------------------------
29  *  USB Host
30  * -------------------------------------------------------------------- */
31
32 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
33 static u64 ohci_dmamask = DMA_BIT_MASK(32);
34 static struct at91_usbh_data usbh_data;
35
36 static struct resource usbh_resources[] = {
37         [0] = {
38                 .start  = AT91SAM9260_UHP_BASE,
39                 .end    = AT91SAM9260_UHP_BASE + SZ_1M - 1,
40                 .flags  = IORESOURCE_MEM,
41         },
42         [1] = {
43                 .start  = AT91SAM9260_ID_UHP,
44                 .end    = AT91SAM9260_ID_UHP,
45                 .flags  = IORESOURCE_IRQ,
46         },
47 };
48
49 static struct platform_device at91_usbh_device = {
50         .name           = "at91_ohci",
51         .id             = -1,
52         .dev            = {
53                                 .dma_mask               = &ohci_dmamask,
54                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
55                                 .platform_data          = &usbh_data,
56         },
57         .resource       = usbh_resources,
58         .num_resources  = ARRAY_SIZE(usbh_resources),
59 };
60
61 void __init at91_add_device_usbh(struct at91_usbh_data *data)
62 {
63         if (!data)
64                 return;
65
66         usbh_data = *data;
67         platform_device_register(&at91_usbh_device);
68 }
69 #else
70 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
71 #endif
72
73
74 /* --------------------------------------------------------------------
75  *  USB Device (Gadget)
76  * -------------------------------------------------------------------- */
77
78 #ifdef CONFIG_USB_GADGET_AT91
79 static struct at91_udc_data udc_data;
80
81 static struct resource udc_resources[] = {
82         [0] = {
83                 .start  = AT91SAM9260_BASE_UDP,
84                 .end    = AT91SAM9260_BASE_UDP + SZ_16K - 1,
85                 .flags  = IORESOURCE_MEM,
86         },
87         [1] = {
88                 .start  = AT91SAM9260_ID_UDP,
89                 .end    = AT91SAM9260_ID_UDP,
90                 .flags  = IORESOURCE_IRQ,
91         },
92 };
93
94 static struct platform_device at91_udc_device = {
95         .name           = "at91_udc",
96         .id             = -1,
97         .dev            = {
98                                 .platform_data          = &udc_data,
99         },
100         .resource       = udc_resources,
101         .num_resources  = ARRAY_SIZE(udc_resources),
102 };
103
104 void __init at91_add_device_udc(struct at91_udc_data *data)
105 {
106         if (!data)
107                 return;
108
109         if (data->vbus_pin) {
110                 at91_set_gpio_input(data->vbus_pin, 0);
111                 at91_set_deglitch(data->vbus_pin, 1);
112         }
113
114         /* Pullup pin is handled internally by USB device peripheral */
115
116         udc_data = *data;
117         platform_device_register(&at91_udc_device);
118 }
119 #else
120 void __init at91_add_device_udc(struct at91_udc_data *data) {}
121 #endif
122
123
124 /* --------------------------------------------------------------------
125  *  Ethernet
126  * -------------------------------------------------------------------- */
127
128 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
129 static u64 eth_dmamask = DMA_BIT_MASK(32);
130 static struct at91_eth_data eth_data;
131
132 static struct resource eth_resources[] = {
133         [0] = {
134                 .start  = AT91SAM9260_BASE_EMAC,
135                 .end    = AT91SAM9260_BASE_EMAC + SZ_16K - 1,
136                 .flags  = IORESOURCE_MEM,
137         },
138         [1] = {
139                 .start  = AT91SAM9260_ID_EMAC,
140                 .end    = AT91SAM9260_ID_EMAC,
141                 .flags  = IORESOURCE_IRQ,
142         },
143 };
144
145 static struct platform_device at91sam9260_eth_device = {
146         .name           = "macb",
147         .id             = -1,
148         .dev            = {
149                                 .dma_mask               = &eth_dmamask,
150                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
151                                 .platform_data          = &eth_data,
152         },
153         .resource       = eth_resources,
154         .num_resources  = ARRAY_SIZE(eth_resources),
155 };
156
157 void __init at91_add_device_eth(struct at91_eth_data *data)
158 {
159         if (!data)
160                 return;
161
162         if (data->phy_irq_pin) {
163                 at91_set_gpio_input(data->phy_irq_pin, 0);
164                 at91_set_deglitch(data->phy_irq_pin, 1);
165         }
166
167         /* Pins used for MII and RMII */
168         at91_set_A_periph(AT91_PIN_PA19, 0);    /* ETXCK_EREFCK */
169         at91_set_A_periph(AT91_PIN_PA17, 0);    /* ERXDV */
170         at91_set_A_periph(AT91_PIN_PA14, 0);    /* ERX0 */
171         at91_set_A_periph(AT91_PIN_PA15, 0);    /* ERX1 */
172         at91_set_A_periph(AT91_PIN_PA18, 0);    /* ERXER */
173         at91_set_A_periph(AT91_PIN_PA16, 0);    /* ETXEN */
174         at91_set_A_periph(AT91_PIN_PA12, 0);    /* ETX0 */
175         at91_set_A_periph(AT91_PIN_PA13, 0);    /* ETX1 */
176         at91_set_A_periph(AT91_PIN_PA21, 0);    /* EMDIO */
177         at91_set_A_periph(AT91_PIN_PA20, 0);    /* EMDC */
178
179         if (!data->is_rmii) {
180                 at91_set_B_periph(AT91_PIN_PA28, 0);    /* ECRS */
181                 at91_set_B_periph(AT91_PIN_PA29, 0);    /* ECOL */
182                 at91_set_B_periph(AT91_PIN_PA25, 0);    /* ERX2 */
183                 at91_set_B_periph(AT91_PIN_PA26, 0);    /* ERX3 */
184                 at91_set_B_periph(AT91_PIN_PA27, 0);    /* ERXCK */
185                 at91_set_B_periph(AT91_PIN_PA23, 0);    /* ETX2 */
186                 at91_set_B_periph(AT91_PIN_PA24, 0);    /* ETX3 */
187                 at91_set_B_periph(AT91_PIN_PA22, 0);    /* ETXER */
188         }
189
190         eth_data = *data;
191         platform_device_register(&at91sam9260_eth_device);
192 }
193 #else
194 void __init at91_add_device_eth(struct at91_eth_data *data) {}
195 #endif
196
197
198 /* --------------------------------------------------------------------
199  *  MMC / SD
200  * -------------------------------------------------------------------- */
201
202 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
203 static u64 mmc_dmamask = DMA_BIT_MASK(32);
204 static struct at91_mmc_data mmc_data;
205
206 static struct resource mmc_resources[] = {
207         [0] = {
208                 .start  = AT91SAM9260_BASE_MCI,
209                 .end    = AT91SAM9260_BASE_MCI + SZ_16K - 1,
210                 .flags  = IORESOURCE_MEM,
211         },
212         [1] = {
213                 .start  = AT91SAM9260_ID_MCI,
214                 .end    = AT91SAM9260_ID_MCI,
215                 .flags  = IORESOURCE_IRQ,
216         },
217 };
218
219 static struct platform_device at91sam9260_mmc_device = {
220         .name           = "at91_mci",
221         .id             = -1,
222         .dev            = {
223                                 .dma_mask               = &mmc_dmamask,
224                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
225                                 .platform_data          = &mmc_data,
226         },
227         .resource       = mmc_resources,
228         .num_resources  = ARRAY_SIZE(mmc_resources),
229 };
230
231 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
232 {
233         if (!data)
234                 return;
235
236         /* input/irq */
237         if (data->det_pin) {
238                 at91_set_gpio_input(data->det_pin, 1);
239                 at91_set_deglitch(data->det_pin, 1);
240         }
241         if (data->wp_pin)
242                 at91_set_gpio_input(data->wp_pin, 1);
243         if (data->vcc_pin)
244                 at91_set_gpio_output(data->vcc_pin, 0);
245
246         /* CLK */
247         at91_set_A_periph(AT91_PIN_PA8, 0);
248
249         if (data->slot_b) {
250                 /* CMD */
251                 at91_set_B_periph(AT91_PIN_PA1, 1);
252
253                 /* DAT0, maybe DAT1..DAT3 */
254                 at91_set_B_periph(AT91_PIN_PA0, 1);
255                 if (data->wire4) {
256                         at91_set_B_periph(AT91_PIN_PA5, 1);
257                         at91_set_B_periph(AT91_PIN_PA4, 1);
258                         at91_set_B_periph(AT91_PIN_PA3, 1);
259                 }
260         } else {
261                 /* CMD */
262                 at91_set_A_periph(AT91_PIN_PA7, 1);
263
264                 /* DAT0, maybe DAT1..DAT3 */
265                 at91_set_A_periph(AT91_PIN_PA6, 1);
266                 if (data->wire4) {
267                         at91_set_A_periph(AT91_PIN_PA9, 1);
268                         at91_set_A_periph(AT91_PIN_PA10, 1);
269                         at91_set_A_periph(AT91_PIN_PA11, 1);
270                 }
271         }
272
273         mmc_data = *data;
274         platform_device_register(&at91sam9260_mmc_device);
275 }
276 #else
277 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
278 #endif
279
280
281 /* --------------------------------------------------------------------
282  *  NAND / SmartMedia
283  * -------------------------------------------------------------------- */
284
285 #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
286 static struct at91_nand_data nand_data;
287
288 #define NAND_BASE       AT91_CHIPSELECT_3
289
290 static struct resource nand_resources[] = {
291         [0] = {
292                 .start  = NAND_BASE,
293                 .end    = NAND_BASE + SZ_256M - 1,
294                 .flags  = IORESOURCE_MEM,
295         },
296         [1] = {
297                 .start  = AT91_BASE_SYS + AT91_ECC,
298                 .end    = AT91_BASE_SYS + AT91_ECC + SZ_512 - 1,
299                 .flags  = IORESOURCE_MEM,
300         }
301 };
302
303 static struct platform_device at91sam9260_nand_device = {
304         .name           = "at91_nand",
305         .id             = -1,
306         .dev            = {
307                                 .platform_data  = &nand_data,
308         },
309         .resource       = nand_resources,
310         .num_resources  = ARRAY_SIZE(nand_resources),
311 };
312
313 void __init at91_add_device_nand(struct at91_nand_data *data)
314 {
315         unsigned long csa, mode;
316
317         if (!data)
318                 return;
319
320         csa = at91_sys_read(AT91_MATRIX_EBICSA);
321         at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
322
323         /* set the bus interface characteristics */
324         at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
325                         | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
326
327         at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3)
328                         | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
329
330         at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
331
332         if (data->bus_width_16)
333                 mode = AT91_SMC_DBW_16;
334         else
335                 mode = AT91_SMC_DBW_8;
336         at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2));
337
338         /* enable pin */
339         if (data->enable_pin)
340                 at91_set_gpio_output(data->enable_pin, 1);
341
342         /* ready/busy pin */
343         if (data->rdy_pin)
344                 at91_set_gpio_input(data->rdy_pin, 1);
345
346         /* card detect pin */
347         if (data->det_pin)
348                 at91_set_gpio_input(data->det_pin, 1);
349
350         nand_data = *data;
351         platform_device_register(&at91sam9260_nand_device);
352 }
353 #else
354 void __init at91_add_device_nand(struct at91_nand_data *data) {}
355 #endif
356
357
358 /* --------------------------------------------------------------------
359  *  TWI (i2c)
360  * -------------------------------------------------------------------- */
361
362 /*
363  * Prefer the GPIO code since the TWI controller isn't robust
364  * (gets overruns and underruns under load) and can only issue
365  * repeated STARTs in one scenario (the driver doesn't yet handle them).
366  */
367
368 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
369
370 static struct i2c_gpio_platform_data pdata = {
371         .sda_pin                = AT91_PIN_PA23,
372         .sda_is_open_drain      = 1,
373         .scl_pin                = AT91_PIN_PA24,
374         .scl_is_open_drain      = 1,
375         .udelay                 = 2,            /* ~100 kHz */
376 };
377
378 static struct platform_device at91sam9260_twi_device = {
379         .name                   = "i2c-gpio",
380         .id                     = -1,
381         .dev.platform_data      = &pdata,
382 };
383
384 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
385 {
386         at91_set_GPIO_periph(AT91_PIN_PA23, 1);         /* TWD (SDA) */
387         at91_set_multi_drive(AT91_PIN_PA23, 1);
388
389         at91_set_GPIO_periph(AT91_PIN_PA24, 1);         /* TWCK (SCL) */
390         at91_set_multi_drive(AT91_PIN_PA24, 1);
391
392         i2c_register_board_info(0, devices, nr_devices);
393         platform_device_register(&at91sam9260_twi_device);
394 }
395
396 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
397
398 static struct resource twi_resources[] = {
399         [0] = {
400                 .start  = AT91SAM9260_BASE_TWI,
401                 .end    = AT91SAM9260_BASE_TWI + SZ_16K - 1,
402                 .flags  = IORESOURCE_MEM,
403         },
404         [1] = {
405                 .start  = AT91SAM9260_ID_TWI,
406                 .end    = AT91SAM9260_ID_TWI,
407                 .flags  = IORESOURCE_IRQ,
408         },
409 };
410
411 static struct platform_device at91sam9260_twi_device = {
412         .name           = "at91_i2c",
413         .id             = -1,
414         .resource       = twi_resources,
415         .num_resources  = ARRAY_SIZE(twi_resources),
416 };
417
418 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
419 {
420         /* pins used for TWI interface */
421         at91_set_A_periph(AT91_PIN_PA23, 0);            /* TWD */
422         at91_set_multi_drive(AT91_PIN_PA23, 1);
423
424         at91_set_A_periph(AT91_PIN_PA24, 0);            /* TWCK */
425         at91_set_multi_drive(AT91_PIN_PA24, 1);
426
427         i2c_register_board_info(0, devices, nr_devices);
428         platform_device_register(&at91sam9260_twi_device);
429 }
430 #else
431 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
432 #endif
433
434
435 /* --------------------------------------------------------------------
436  *  SPI
437  * -------------------------------------------------------------------- */
438
439 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
440 static u64 spi_dmamask = DMA_BIT_MASK(32);
441
442 static struct resource spi0_resources[] = {
443         [0] = {
444                 .start  = AT91SAM9260_BASE_SPI0,
445                 .end    = AT91SAM9260_BASE_SPI0 + SZ_16K - 1,
446                 .flags  = IORESOURCE_MEM,
447         },
448         [1] = {
449                 .start  = AT91SAM9260_ID_SPI0,
450                 .end    = AT91SAM9260_ID_SPI0,
451                 .flags  = IORESOURCE_IRQ,
452         },
453 };
454
455 static struct platform_device at91sam9260_spi0_device = {
456         .name           = "atmel_spi",
457         .id             = 0,
458         .dev            = {
459                                 .dma_mask               = &spi_dmamask,
460                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
461         },
462         .resource       = spi0_resources,
463         .num_resources  = ARRAY_SIZE(spi0_resources),
464 };
465
466 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PC11, AT91_PIN_PC16, AT91_PIN_PC17 };
467
468 static struct resource spi1_resources[] = {
469         [0] = {
470                 .start  = AT91SAM9260_BASE_SPI1,
471                 .end    = AT91SAM9260_BASE_SPI1 + SZ_16K - 1,
472                 .flags  = IORESOURCE_MEM,
473         },
474         [1] = {
475                 .start  = AT91SAM9260_ID_SPI1,
476                 .end    = AT91SAM9260_ID_SPI1,
477                 .flags  = IORESOURCE_IRQ,
478         },
479 };
480
481 static struct platform_device at91sam9260_spi1_device = {
482         .name           = "atmel_spi",
483         .id             = 1,
484         .dev            = {
485                                 .dma_mask               = &spi_dmamask,
486                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
487         },
488         .resource       = spi1_resources,
489         .num_resources  = ARRAY_SIZE(spi1_resources),
490 };
491
492 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB3, AT91_PIN_PC5, AT91_PIN_PC4, AT91_PIN_PC3 };
493
494 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
495 {
496         int i;
497         unsigned long cs_pin;
498         short enable_spi0 = 0;
499         short enable_spi1 = 0;
500
501         /* Choose SPI chip-selects */
502         for (i = 0; i < nr_devices; i++) {
503                 if (devices[i].controller_data)
504                         cs_pin = (unsigned long) devices[i].controller_data;
505                 else if (devices[i].bus_num == 0)
506                         cs_pin = spi0_standard_cs[devices[i].chip_select];
507                 else
508                         cs_pin = spi1_standard_cs[devices[i].chip_select];
509
510                 if (devices[i].bus_num == 0)
511                         enable_spi0 = 1;
512                 else
513                         enable_spi1 = 1;
514
515                 /* enable chip-select pin */
516                 at91_set_gpio_output(cs_pin, 1);
517
518                 /* pass chip-select pin to driver */
519                 devices[i].controller_data = (void *) cs_pin;
520         }
521
522         spi_register_board_info(devices, nr_devices);
523
524         /* Configure SPI bus(es) */
525         if (enable_spi0) {
526                 at91_set_A_periph(AT91_PIN_PA0, 0);     /* SPI0_MISO */
527                 at91_set_A_periph(AT91_PIN_PA1, 0);     /* SPI0_MOSI */
528                 at91_set_A_periph(AT91_PIN_PA2, 0);     /* SPI1_SPCK */
529
530                 at91_clock_associate("spi0_clk", &at91sam9260_spi0_device.dev, "spi_clk");
531                 platform_device_register(&at91sam9260_spi0_device);
532         }
533         if (enable_spi1) {
534                 at91_set_A_periph(AT91_PIN_PB0, 0);     /* SPI1_MISO */
535                 at91_set_A_periph(AT91_PIN_PB1, 0);     /* SPI1_MOSI */
536                 at91_set_A_periph(AT91_PIN_PB2, 0);     /* SPI1_SPCK */
537
538                 at91_clock_associate("spi1_clk", &at91sam9260_spi1_device.dev, "spi_clk");
539                 platform_device_register(&at91sam9260_spi1_device);
540         }
541 }
542 #else
543 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
544 #endif
545
546
547 /* --------------------------------------------------------------------
548  *  RTT
549  * -------------------------------------------------------------------- */
550
551 static struct resource rtt_resources[] = {
552         {
553                 .start  = AT91_BASE_SYS + AT91_RTT,
554                 .end    = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1,
555                 .flags  = IORESOURCE_MEM,
556         }
557 };
558
559 static struct platform_device at91sam9260_rtt_device = {
560         .name           = "at91_rtt",
561         .id             = -1,
562         .resource       = rtt_resources,
563         .num_resources  = ARRAY_SIZE(rtt_resources),
564 };
565
566 static void __init at91_add_device_rtt(void)
567 {
568         platform_device_register(&at91sam9260_rtt_device);
569 }
570
571
572 /* --------------------------------------------------------------------
573  *  Watchdog
574  * -------------------------------------------------------------------- */
575
576 #if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE)
577 static struct platform_device at91sam9260_wdt_device = {
578         .name           = "at91_wdt",
579         .id             = -1,
580         .num_resources  = 0,
581 };
582
583 static void __init at91_add_device_watchdog(void)
584 {
585         platform_device_register(&at91sam9260_wdt_device);
586 }
587 #else
588 static void __init at91_add_device_watchdog(void) {}
589 #endif
590
591
592 /* --------------------------------------------------------------------
593  *  SSC -- Synchronous Serial Controller
594  * -------------------------------------------------------------------- */
595
596 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
597 static u64 ssc_dmamask = DMA_BIT_MASK(32);
598
599 static struct resource ssc_resources[] = {
600         [0] = {
601                 .start  = AT91SAM9260_BASE_SSC,
602                 .end    = AT91SAM9260_BASE_SSC + SZ_16K - 1,
603                 .flags  = IORESOURCE_MEM,
604         },
605         [1] = {
606                 .start  = AT91SAM9260_ID_SSC,
607                 .end    = AT91SAM9260_ID_SSC,
608                 .flags  = IORESOURCE_IRQ,
609         },
610 };
611
612 static struct platform_device at91sam9260_ssc_device = {
613         .name   = "ssc",
614         .id     = 0,
615         .dev    = {
616                 .dma_mask               = &ssc_dmamask,
617                 .coherent_dma_mask      = DMA_BIT_MASK(32),
618         },
619         .resource       = ssc_resources,
620         .num_resources  = ARRAY_SIZE(ssc_resources),
621 };
622
623 static inline void configure_ssc_pins(unsigned pins)
624 {
625         if (pins & ATMEL_SSC_TF)
626                 at91_set_A_periph(AT91_PIN_PB17, 1);
627         if (pins & ATMEL_SSC_TK)
628                 at91_set_A_periph(AT91_PIN_PB16, 1);
629         if (pins & ATMEL_SSC_TD)
630                 at91_set_A_periph(AT91_PIN_PB18, 1);
631         if (pins & ATMEL_SSC_RD)
632                 at91_set_A_periph(AT91_PIN_PB19, 1);
633         if (pins & ATMEL_SSC_RK)
634                 at91_set_A_periph(AT91_PIN_PB20, 1);
635         if (pins & ATMEL_SSC_RF)
636                 at91_set_A_periph(AT91_PIN_PB21, 1);
637 }
638
639 /*
640  * SSC controllers are accessed through library code, instead of any
641  * kind of all-singing/all-dancing driver.  For example one could be
642  * used by a particular I2S audio codec's driver, while another one
643  * on the same system might be used by a custom data capture driver.
644  */
645 void __init at91_add_device_ssc(unsigned id, unsigned pins)
646 {
647         struct platform_device *pdev;
648
649         /*
650          * NOTE: caller is responsible for passing information matching
651          * "pins" to whatever will be using each particular controller.
652          */
653         switch (id) {
654         case AT91SAM9260_ID_SSC:
655                 pdev = &at91sam9260_ssc_device;
656                 configure_ssc_pins(pins);
657                 at91_clock_associate("ssc_clk", &pdev->dev, "pclk");
658                 break;
659         default:
660                 return;
661         }
662
663         platform_device_register(pdev);
664 }
665
666 #else
667 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
668 #endif
669
670
671 /* --------------------------------------------------------------------
672  *  UART
673  * -------------------------------------------------------------------- */
674 #if defined(CONFIG_SERIAL_ATMEL)
675 static struct resource dbgu_resources[] = {
676         [0] = {
677                 .start  = AT91_VA_BASE_SYS + AT91_DBGU,
678                 .end    = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
679                 .flags  = IORESOURCE_MEM,
680         },
681         [1] = {
682                 .start  = AT91_ID_SYS,
683                 .end    = AT91_ID_SYS,
684                 .flags  = IORESOURCE_IRQ,
685         },
686 };
687
688 static struct atmel_uart_data dbgu_data = {
689         .use_dma_tx     = 0,
690         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
691         .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
692 };
693
694 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
695
696 static struct platform_device at91sam9260_dbgu_device = {
697         .name           = "atmel_usart",
698         .id             = 0,
699         .dev            = {
700                                 .dma_mask               = &dbgu_dmamask,
701                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
702                                 .platform_data          = &dbgu_data,
703         },
704         .resource       = dbgu_resources,
705         .num_resources  = ARRAY_SIZE(dbgu_resources),
706 };
707
708 static inline void configure_dbgu_pins(void)
709 {
710         at91_set_A_periph(AT91_PIN_PB14, 0);            /* DRXD */
711         at91_set_A_periph(AT91_PIN_PB15, 1);            /* DTXD */
712 }
713
714 static struct resource uart0_resources[] = {
715         [0] = {
716                 .start  = AT91SAM9260_BASE_US0,
717                 .end    = AT91SAM9260_BASE_US0 + SZ_16K - 1,
718                 .flags  = IORESOURCE_MEM,
719         },
720         [1] = {
721                 .start  = AT91SAM9260_ID_US0,
722                 .end    = AT91SAM9260_ID_US0,
723                 .flags  = IORESOURCE_IRQ,
724         },
725 };
726
727 static struct atmel_uart_data uart0_data = {
728         .use_dma_tx     = 1,
729         .use_dma_rx     = 1,
730 };
731
732 static u64 uart0_dmamask = DMA_BIT_MASK(32);
733
734 static struct platform_device at91sam9260_uart0_device = {
735         .name           = "atmel_usart",
736         .id             = 1,
737         .dev            = {
738                                 .dma_mask               = &uart0_dmamask,
739                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
740                                 .platform_data          = &uart0_data,
741         },
742         .resource       = uart0_resources,
743         .num_resources  = ARRAY_SIZE(uart0_resources),
744 };
745
746 static inline void configure_usart0_pins(unsigned pins)
747 {
748         at91_set_A_periph(AT91_PIN_PB4, 1);             /* TXD0 */
749         at91_set_A_periph(AT91_PIN_PB5, 0);             /* RXD0 */
750
751         if (pins & ATMEL_UART_RTS)
752                 at91_set_A_periph(AT91_PIN_PB26, 0);    /* RTS0 */
753         if (pins & ATMEL_UART_CTS)
754                 at91_set_A_periph(AT91_PIN_PB27, 0);    /* CTS0 */
755         if (pins & ATMEL_UART_DTR)
756                 at91_set_A_periph(AT91_PIN_PB24, 0);    /* DTR0 */
757         if (pins & ATMEL_UART_DSR)
758                 at91_set_A_periph(AT91_PIN_PB22, 0);    /* DSR0 */
759         if (pins & ATMEL_UART_DCD)
760                 at91_set_A_periph(AT91_PIN_PB23, 0);    /* DCD0 */
761         if (pins & ATMEL_UART_RI)
762                 at91_set_A_periph(AT91_PIN_PB25, 0);    /* RI0 */
763 }
764
765 static struct resource uart1_resources[] = {
766         [0] = {
767                 .start  = AT91SAM9260_BASE_US1,
768                 .end    = AT91SAM9260_BASE_US1 + SZ_16K - 1,
769                 .flags  = IORESOURCE_MEM,
770         },
771         [1] = {
772                 .start  = AT91SAM9260_ID_US1,
773                 .end    = AT91SAM9260_ID_US1,
774                 .flags  = IORESOURCE_IRQ,
775         },
776 };
777
778 static struct atmel_uart_data uart1_data = {
779         .use_dma_tx     = 1,
780         .use_dma_rx     = 1,
781 };
782
783 static u64 uart1_dmamask = DMA_BIT_MASK(32);
784
785 static struct platform_device at91sam9260_uart1_device = {
786         .name           = "atmel_usart",
787         .id             = 2,
788         .dev            = {
789                                 .dma_mask               = &uart1_dmamask,
790                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
791                                 .platform_data          = &uart1_data,
792         },
793         .resource       = uart1_resources,
794         .num_resources  = ARRAY_SIZE(uart1_resources),
795 };
796
797 static inline void configure_usart1_pins(unsigned pins)
798 {
799         at91_set_A_periph(AT91_PIN_PB6, 1);             /* TXD1 */
800         at91_set_A_periph(AT91_PIN_PB7, 0);             /* RXD1 */
801
802         if (pins & ATMEL_UART_RTS)
803                 at91_set_A_periph(AT91_PIN_PB28, 0);    /* RTS1 */
804         if (pins & ATMEL_UART_CTS)
805                 at91_set_A_periph(AT91_PIN_PB29, 0);    /* CTS1 */
806 }
807
808 static struct resource uart2_resources[] = {
809         [0] = {
810                 .start  = AT91SAM9260_BASE_US2,
811                 .end    = AT91SAM9260_BASE_US2 + SZ_16K - 1,
812                 .flags  = IORESOURCE_MEM,
813         },
814         [1] = {
815                 .start  = AT91SAM9260_ID_US2,
816                 .end    = AT91SAM9260_ID_US2,
817                 .flags  = IORESOURCE_IRQ,
818         },
819 };
820
821 static struct atmel_uart_data uart2_data = {
822         .use_dma_tx     = 1,
823         .use_dma_rx     = 1,
824 };
825
826 static u64 uart2_dmamask = DMA_BIT_MASK(32);
827
828 static struct platform_device at91sam9260_uart2_device = {
829         .name           = "atmel_usart",
830         .id             = 3,
831         .dev            = {
832                                 .dma_mask               = &uart2_dmamask,
833                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
834                                 .platform_data          = &uart2_data,
835         },
836         .resource       = uart2_resources,
837         .num_resources  = ARRAY_SIZE(uart2_resources),
838 };
839
840 static inline void configure_usart2_pins(unsigned pins)
841 {
842         at91_set_A_periph(AT91_PIN_PB8, 1);             /* TXD2 */
843         at91_set_A_periph(AT91_PIN_PB9, 0);             /* RXD2 */
844
845         if (pins & ATMEL_UART_RTS)
846                 at91_set_A_periph(AT91_PIN_PA4, 0);     /* RTS2 */
847         if (pins & ATMEL_UART_CTS)
848                 at91_set_A_periph(AT91_PIN_PA5, 0);     /* CTS2 */
849 }
850
851 static struct resource uart3_resources[] = {
852         [0] = {
853                 .start  = AT91SAM9260_BASE_US3,
854                 .end    = AT91SAM9260_BASE_US3 + SZ_16K - 1,
855                 .flags  = IORESOURCE_MEM,
856         },
857         [1] = {
858                 .start  = AT91SAM9260_ID_US3,
859                 .end    = AT91SAM9260_ID_US3,
860                 .flags  = IORESOURCE_IRQ,
861         },
862 };
863
864 static struct atmel_uart_data uart3_data = {
865         .use_dma_tx     = 1,
866         .use_dma_rx     = 1,
867 };
868
869 static u64 uart3_dmamask = DMA_BIT_MASK(32);
870
871 static struct platform_device at91sam9260_uart3_device = {
872         .name           = "atmel_usart",
873         .id             = 4,
874         .dev            = {
875                                 .dma_mask               = &uart3_dmamask,
876                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
877                                 .platform_data          = &uart3_data,
878         },
879         .resource       = uart3_resources,
880         .num_resources  = ARRAY_SIZE(uart3_resources),
881 };
882
883 static inline void configure_usart3_pins(unsigned pins)
884 {
885         at91_set_A_periph(AT91_PIN_PB10, 1);            /* TXD3 */
886         at91_set_A_periph(AT91_PIN_PB11, 0);            /* RXD3 */
887
888         if (pins & ATMEL_UART_RTS)
889                 at91_set_B_periph(AT91_PIN_PC8, 0);     /* RTS3 */
890         if (pins & ATMEL_UART_CTS)
891                 at91_set_B_periph(AT91_PIN_PC10, 0);    /* CTS3 */
892 }
893
894 static struct resource uart4_resources[] = {
895         [0] = {
896                 .start  = AT91SAM9260_BASE_US4,
897                 .end    = AT91SAM9260_BASE_US4 + SZ_16K - 1,
898                 .flags  = IORESOURCE_MEM,
899         },
900         [1] = {
901                 .start  = AT91SAM9260_ID_US4,
902                 .end    = AT91SAM9260_ID_US4,
903                 .flags  = IORESOURCE_IRQ,
904         },
905 };
906
907 static struct atmel_uart_data uart4_data = {
908         .use_dma_tx     = 1,
909         .use_dma_rx     = 1,
910 };
911
912 static u64 uart4_dmamask = DMA_BIT_MASK(32);
913
914 static struct platform_device at91sam9260_uart4_device = {
915         .name           = "atmel_usart",
916         .id             = 5,
917         .dev            = {
918                                 .dma_mask               = &uart4_dmamask,
919                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
920                                 .platform_data          = &uart4_data,
921         },
922         .resource       = uart4_resources,
923         .num_resources  = ARRAY_SIZE(uart4_resources),
924 };
925
926 static inline void configure_usart4_pins(void)
927 {
928         at91_set_B_periph(AT91_PIN_PA31, 1);            /* TXD4 */
929         at91_set_B_periph(AT91_PIN_PA30, 0);            /* RXD4 */
930 }
931
932 static struct resource uart5_resources[] = {
933         [0] = {
934                 .start  = AT91SAM9260_BASE_US5,
935                 .end    = AT91SAM9260_BASE_US5 + SZ_16K - 1,
936                 .flags  = IORESOURCE_MEM,
937         },
938         [1] = {
939                 .start  = AT91SAM9260_ID_US5,
940                 .end    = AT91SAM9260_ID_US5,
941                 .flags  = IORESOURCE_IRQ,
942         },
943 };
944
945 static struct atmel_uart_data uart5_data = {
946         .use_dma_tx     = 1,
947         .use_dma_rx     = 1,
948 };
949
950 static u64 uart5_dmamask = DMA_BIT_MASK(32);
951
952 static struct platform_device at91sam9260_uart5_device = {
953         .name           = "atmel_usart",
954         .id             = 6,
955         .dev            = {
956                                 .dma_mask               = &uart5_dmamask,
957                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
958                                 .platform_data          = &uart5_data,
959         },
960         .resource       = uart5_resources,
961         .num_resources  = ARRAY_SIZE(uart5_resources),
962 };
963
964 static inline void configure_usart5_pins(void)
965 {
966         at91_set_A_periph(AT91_PIN_PB12, 1);            /* TXD5 */
967         at91_set_A_periph(AT91_PIN_PB13, 0);            /* RXD5 */
968 }
969
970 static struct platform_device *at91_uarts[ATMEL_MAX_UART];      /* the UARTs to use */
971 struct platform_device *atmel_default_console_device;   /* the serial console device */
972
973 void __init __deprecated at91_init_serial(struct at91_uart_config *config)
974 {
975         int i;
976
977         /* Fill in list of supported UARTs */
978         for (i = 0; i < config->nr_tty; i++) {
979                 switch (config->tty_map[i]) {
980                         case 0:
981                                 configure_usart0_pins(ATMEL_UART_CTS | ATMEL_UART_RTS | ATMEL_UART_DSR | ATMEL_UART_DTR | ATMEL_UART_DCD | ATMEL_UART_RI);
982                                 at91_uarts[i] = &at91sam9260_uart0_device;
983                                 at91_clock_associate("usart0_clk", &at91sam9260_uart0_device.dev, "usart");
984                                 break;
985                         case 1:
986                                 configure_usart1_pins(ATMEL_UART_CTS | ATMEL_UART_RTS);
987                                 at91_uarts[i] = &at91sam9260_uart1_device;
988                                 at91_clock_associate("usart1_clk", &at91sam9260_uart1_device.dev, "usart");
989                                 break;
990                         case 2:
991                                 configure_usart2_pins(0);
992                                 at91_uarts[i] = &at91sam9260_uart2_device;
993                                 at91_clock_associate("usart2_clk", &at91sam9260_uart2_device.dev, "usart");
994                                 break;
995                         case 3:
996                                 configure_usart3_pins(0);
997                                 at91_uarts[i] = &at91sam9260_uart3_device;
998                                 at91_clock_associate("usart3_clk", &at91sam9260_uart3_device.dev, "usart");
999                                 break;
1000                         case 4:
1001                                 configure_usart4_pins();
1002                                 at91_uarts[i] = &at91sam9260_uart4_device;
1003                                 at91_clock_associate("usart4_clk", &at91sam9260_uart4_device.dev, "usart");
1004                                 break;
1005                         case 5:
1006                                 configure_usart5_pins();
1007                                 at91_uarts[i] = &at91sam9260_uart5_device;
1008                                 at91_clock_associate("usart5_clk", &at91sam9260_uart5_device.dev, "usart");
1009                                 break;
1010                         case 6:
1011                                 configure_dbgu_pins();
1012                                 at91_uarts[i] = &at91sam9260_dbgu_device;
1013                                 at91_clock_associate("mck", &at91sam9260_dbgu_device.dev, "usart");
1014                                 break;
1015                         default:
1016                                 continue;
1017                 }
1018                 at91_uarts[i]->id = i;          /* update ID number to mapped ID */
1019         }
1020
1021         /* Set serial console device */
1022         if (config->console_tty < ATMEL_MAX_UART)
1023                 atmel_default_console_device = at91_uarts[config->console_tty];
1024         if (!atmel_default_console_device)
1025                 printk(KERN_INFO "AT91: No default serial console defined.\n");
1026 }
1027
1028 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1029 {
1030         struct platform_device *pdev;
1031
1032         switch (id) {
1033                 case 0:         /* DBGU */
1034                         pdev = &at91sam9260_dbgu_device;
1035                         configure_dbgu_pins();
1036                         at91_clock_associate("mck", &pdev->dev, "usart");
1037                         break;
1038                 case AT91SAM9260_ID_US0:
1039                         pdev = &at91sam9260_uart0_device;
1040                         configure_usart0_pins(pins);
1041                         at91_clock_associate("usart0_clk", &pdev->dev, "usart");
1042                         break;
1043                 case AT91SAM9260_ID_US1:
1044                         pdev = &at91sam9260_uart1_device;
1045                         configure_usart1_pins(pins);
1046                         at91_clock_associate("usart1_clk", &pdev->dev, "usart");
1047                         break;
1048                 case AT91SAM9260_ID_US2:
1049                         pdev = &at91sam9260_uart2_device;
1050                         configure_usart2_pins(pins);
1051                         at91_clock_associate("usart2_clk", &pdev->dev, "usart");
1052                         break;
1053                 case AT91SAM9260_ID_US3:
1054                         pdev = &at91sam9260_uart3_device;
1055                         configure_usart3_pins(pins);
1056                         at91_clock_associate("usart3_clk", &pdev->dev, "usart");
1057                         break;
1058                 case AT91SAM9260_ID_US4:
1059                         pdev = &at91sam9260_uart4_device;
1060                         configure_usart4_pins();
1061                         at91_clock_associate("usart4_clk", &pdev->dev, "usart");
1062                         break;
1063                 case AT91SAM9260_ID_US5:
1064                         pdev = &at91sam9260_uart5_device;
1065                         configure_usart5_pins();
1066                         at91_clock_associate("usart5_clk", &pdev->dev, "usart");
1067                         break;
1068                 default:
1069                         return;
1070         }
1071         pdev->id = portnr;              /* update to mapped ID */
1072
1073         if (portnr < ATMEL_MAX_UART)
1074                 at91_uarts[portnr] = pdev;
1075 }
1076
1077 void __init at91_set_serial_console(unsigned portnr)
1078 {
1079         if (portnr < ATMEL_MAX_UART)
1080                 atmel_default_console_device = at91_uarts[portnr];
1081         if (!atmel_default_console_device)
1082                 printk(KERN_INFO "AT91: No default serial console defined.\n");
1083 }
1084
1085 void __init at91_add_device_serial(void)
1086 {
1087         int i;
1088
1089         for (i = 0; i < ATMEL_MAX_UART; i++) {
1090                 if (at91_uarts[i])
1091                         platform_device_register(at91_uarts[i]);
1092         }
1093 }
1094 #else
1095 void __init __deprecated at91_init_serial(struct at91_uart_config *config) {}
1096 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1097 void __init at91_set_serial_console(unsigned portnr) {}
1098 void __init at91_add_device_serial(void) {}
1099 #endif
1100
1101
1102 /* -------------------------------------------------------------------- */
1103 /*
1104  * These devices are always present and don't need any board-specific
1105  * setup.
1106  */
1107 static int __init at91_add_standard_devices(void)
1108 {
1109         at91_add_device_rtt();
1110         at91_add_device_watchdog();
1111         return 0;
1112 }
1113
1114 arch_initcall(at91_add_standard_devices);