2 * arch/arm/mach-at91/at91sam9260.c
4 * Copyright (C) 2006 SAN People
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
13 #include <linux/module.h>
17 #include <asm/mach/arch.h>
18 #include <asm/mach/map.h>
20 #include <mach/at91_dbgu.h>
21 #include <mach/at91sam9260.h>
22 #include <mach/at91_pmc.h>
23 #include <mach/at91_rstc.h>
24 #include <mach/at91_shdwc.h>
30 /* --------------------------------------------------------------------
32 * -------------------------------------------------------------------- */
35 * The peripheral clocks.
37 static struct clk pioA_clk = {
39 .pmc_mask = 1 << AT91SAM9260_ID_PIOA,
40 .type = CLK_TYPE_PERIPHERAL,
42 static struct clk pioB_clk = {
44 .pmc_mask = 1 << AT91SAM9260_ID_PIOB,
45 .type = CLK_TYPE_PERIPHERAL,
47 static struct clk pioC_clk = {
49 .pmc_mask = 1 << AT91SAM9260_ID_PIOC,
50 .type = CLK_TYPE_PERIPHERAL,
52 static struct clk adc_clk = {
54 .pmc_mask = 1 << AT91SAM9260_ID_ADC,
55 .type = CLK_TYPE_PERIPHERAL,
57 static struct clk usart0_clk = {
59 .pmc_mask = 1 << AT91SAM9260_ID_US0,
60 .type = CLK_TYPE_PERIPHERAL,
62 static struct clk usart1_clk = {
64 .pmc_mask = 1 << AT91SAM9260_ID_US1,
65 .type = CLK_TYPE_PERIPHERAL,
67 static struct clk usart2_clk = {
69 .pmc_mask = 1 << AT91SAM9260_ID_US2,
70 .type = CLK_TYPE_PERIPHERAL,
72 static struct clk mmc_clk = {
74 .pmc_mask = 1 << AT91SAM9260_ID_MCI,
75 .type = CLK_TYPE_PERIPHERAL,
77 static struct clk udc_clk = {
79 .pmc_mask = 1 << AT91SAM9260_ID_UDP,
80 .type = CLK_TYPE_PERIPHERAL,
82 static struct clk twi_clk = {
84 .pmc_mask = 1 << AT91SAM9260_ID_TWI,
85 .type = CLK_TYPE_PERIPHERAL,
87 static struct clk spi0_clk = {
89 .pmc_mask = 1 << AT91SAM9260_ID_SPI0,
90 .type = CLK_TYPE_PERIPHERAL,
92 static struct clk spi1_clk = {
94 .pmc_mask = 1 << AT91SAM9260_ID_SPI1,
95 .type = CLK_TYPE_PERIPHERAL,
97 static struct clk ssc_clk = {
99 .pmc_mask = 1 << AT91SAM9260_ID_SSC,
100 .type = CLK_TYPE_PERIPHERAL,
102 static struct clk tc0_clk = {
104 .pmc_mask = 1 << AT91SAM9260_ID_TC0,
105 .type = CLK_TYPE_PERIPHERAL,
107 static struct clk tc1_clk = {
109 .pmc_mask = 1 << AT91SAM9260_ID_TC1,
110 .type = CLK_TYPE_PERIPHERAL,
112 static struct clk tc2_clk = {
114 .pmc_mask = 1 << AT91SAM9260_ID_TC2,
115 .type = CLK_TYPE_PERIPHERAL,
117 static struct clk ohci_clk = {
119 .pmc_mask = 1 << AT91SAM9260_ID_UHP,
120 .type = CLK_TYPE_PERIPHERAL,
122 static struct clk macb_clk = {
124 .pmc_mask = 1 << AT91SAM9260_ID_EMAC,
125 .type = CLK_TYPE_PERIPHERAL,
127 static struct clk isi_clk = {
129 .pmc_mask = 1 << AT91SAM9260_ID_ISI,
130 .type = CLK_TYPE_PERIPHERAL,
132 static struct clk usart3_clk = {
133 .name = "usart3_clk",
134 .pmc_mask = 1 << AT91SAM9260_ID_US3,
135 .type = CLK_TYPE_PERIPHERAL,
137 static struct clk usart4_clk = {
138 .name = "usart4_clk",
139 .pmc_mask = 1 << AT91SAM9260_ID_US4,
140 .type = CLK_TYPE_PERIPHERAL,
142 static struct clk usart5_clk = {
143 .name = "usart5_clk",
144 .pmc_mask = 1 << AT91SAM9260_ID_US5,
145 .type = CLK_TYPE_PERIPHERAL,
147 static struct clk tc3_clk = {
149 .pmc_mask = 1 << AT91SAM9260_ID_TC3,
150 .type = CLK_TYPE_PERIPHERAL,
152 static struct clk tc4_clk = {
154 .pmc_mask = 1 << AT91SAM9260_ID_TC4,
155 .type = CLK_TYPE_PERIPHERAL,
157 static struct clk tc5_clk = {
159 .pmc_mask = 1 << AT91SAM9260_ID_TC5,
160 .type = CLK_TYPE_PERIPHERAL,
163 static struct clk *periph_clocks[] __initdata = {
192 static struct clk_lookup periph_clocks_lookups[] = {
193 CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
194 CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
195 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
196 CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
197 CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
198 CLKDEV_CON_DEV_ID("t3_clk", "atmel_tcb.1", &tc3_clk),
199 CLKDEV_CON_DEV_ID("t4_clk", "atmel_tcb.1", &tc4_clk),
200 CLKDEV_CON_DEV_ID("t5_clk", "atmel_tcb.1", &tc5_clk),
201 CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc_clk),
202 /* fake hclk clock */
203 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
206 static struct clk_lookup usart_clocks_lookups[] = {
207 CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
208 CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
209 CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
210 CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
211 CLKDEV_CON_DEV_ID("usart", "atmel_usart.4", &usart3_clk),
212 CLKDEV_CON_DEV_ID("usart", "atmel_usart.5", &usart4_clk),
213 CLKDEV_CON_DEV_ID("usart", "atmel_usart.6", &usart5_clk),
217 * The two programmable clocks.
218 * You must configure pin multiplexing to bring these signals out.
220 static struct clk pck0 = {
222 .pmc_mask = AT91_PMC_PCK0,
223 .type = CLK_TYPE_PROGRAMMABLE,
226 static struct clk pck1 = {
228 .pmc_mask = AT91_PMC_PCK1,
229 .type = CLK_TYPE_PROGRAMMABLE,
233 static void __init at91sam9260_register_clocks(void)
237 for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
238 clk_register(periph_clocks[i]);
240 clkdev_add_table(periph_clocks_lookups,
241 ARRAY_SIZE(periph_clocks_lookups));
242 clkdev_add_table(usart_clocks_lookups,
243 ARRAY_SIZE(usart_clocks_lookups));
249 static struct clk_lookup console_clock_lookup;
251 void __init at91sam9260_set_console_clock(int id)
253 if (id >= ARRAY_SIZE(usart_clocks_lookups))
256 console_clock_lookup.con_id = "usart";
257 console_clock_lookup.clk = usart_clocks_lookups[id].clk;
258 clkdev_add(&console_clock_lookup);
261 /* --------------------------------------------------------------------
263 * -------------------------------------------------------------------- */
265 static struct at91_gpio_bank at91sam9260_gpio[] = {
267 .id = AT91SAM9260_ID_PIOA,
271 .id = AT91SAM9260_ID_PIOB,
275 .id = AT91SAM9260_ID_PIOC,
281 static void at91sam9260_poweroff(void)
283 at91_sys_write(AT91_SHDW_CR, AT91_SHDW_KEY | AT91_SHDW_SHDW);
287 /* --------------------------------------------------------------------
288 * AT91SAM9260 processor initialization
289 * -------------------------------------------------------------------- */
291 static void __init at91sam9xe_map_io(void)
293 unsigned long sram_size;
295 switch (at91_soc_initdata.cidr & AT91_CIDR_SRAMSIZ) {
296 case AT91_CIDR_SRAMSIZ_32K:
297 sram_size = 2 * SZ_16K;
299 case AT91_CIDR_SRAMSIZ_16K:
304 at91_init_sram(0, AT91SAM9XE_SRAM_BASE, sram_size);
307 static void __init at91sam9260_map_io(void)
309 if (cpu_is_at91sam9xe()) {
311 } else if (cpu_is_at91sam9g20()) {
312 at91_init_sram(0, AT91SAM9G20_SRAM0_BASE, AT91SAM9G20_SRAM0_SIZE);
313 at91_init_sram(1, AT91SAM9G20_SRAM1_BASE, AT91SAM9G20_SRAM1_SIZE);
315 at91_init_sram(0, AT91SAM9260_SRAM0_BASE, AT91SAM9260_SRAM0_SIZE);
316 at91_init_sram(1, AT91SAM9260_SRAM1_BASE, AT91SAM9260_SRAM1_SIZE);
320 static void __init at91sam9260_initialize(void)
322 at91_arch_reset = at91sam9_alt_reset;
323 pm_power_off = at91sam9260_poweroff;
324 at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
325 | (1 << AT91SAM9260_ID_IRQ2);
327 /* Register GPIO subsystem */
328 at91_gpio_init(at91sam9260_gpio, 3);
331 /* --------------------------------------------------------------------
332 * Interrupt initialization
333 * -------------------------------------------------------------------- */
336 * The default interrupt priority levels (0 = lowest, 7 = highest).
338 static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = {
339 7, /* Advanced Interrupt Controller */
340 7, /* System Peripherals */
341 1, /* Parallel IO Controller A */
342 1, /* Parallel IO Controller B */
343 1, /* Parallel IO Controller C */
344 0, /* Analog-to-Digital Converter */
348 0, /* Multimedia Card Interface */
349 2, /* USB Device Port */
350 6, /* Two-Wire Interface */
351 5, /* Serial Peripheral Interface 0 */
352 5, /* Serial Peripheral Interface 1 */
353 5, /* Serial Synchronous Controller */
356 0, /* Timer Counter 0 */
357 0, /* Timer Counter 1 */
358 0, /* Timer Counter 2 */
359 2, /* USB Host port */
361 0, /* Image Sensor Interface */
365 0, /* Timer Counter 3 */
366 0, /* Timer Counter 4 */
367 0, /* Timer Counter 5 */
368 0, /* Advanced Interrupt Controller */
369 0, /* Advanced Interrupt Controller */
370 0, /* Advanced Interrupt Controller */
373 struct at91_init_soc __initdata at91sam9260_soc = {
374 .map_io = at91sam9260_map_io,
375 .default_irq_priority = at91sam9260_default_irq_priority,
376 .register_clocks = at91sam9260_register_clocks,
377 .init = at91sam9260_initialize,