arch/arm/boot/dts/imx6qdl-sabrelite.dtsi

   1 /*
   2  * Copyright 2011 Freescale Semiconductor, Inc.
   3  * Copyright 2011 Linaro Ltd.
   4  *
   5  * The code contained herein is licensed under the GNU General Public
   6  * License. You may obtain a copy of the GNU General Public License
   7  * Version 2 or later at the following locations:
   8  *
   9  * http://www.opensource.org/licenses/gpl-license.html
  10  * http://www.gnu.org/copyleft/gpl.html
  11  */
  12 #include <dt-bindings/gpio/gpio.h>
  13 #include <dt-bindings/input/input.h>
  14
  15 / {
  16         chosen {
  17                 stdout-path = &uart2;
  18         };
  19
  20         memory {
  21                 reg = <0x10000000 0x40000000>;
  22         };
  23
  24         regulators {
  25                 compatible = "simple-bus";
  26                 #address-cells = <1>;
  27                 #size-cells = <0>;
  28
  29                 reg_2p5v: regulator@0 {
  30                         compatible = "regulator-fixed";
  31                         reg = <0>;
  32                         regulator-name = "2P5V";
  33                         regulator-min-microvolt = <2500000>;
  34                         regulator-max-microvolt = <2500000>;
  35                         regulator-always-on;
  36                 };
  37
  38                 reg_3p3v: regulator@1 {
  39                         compatible = "regulator-fixed";
  40                         reg = <1>;
  41                         regulator-name = "3P3V";
  42                         regulator-min-microvolt = <3300000>;
  43                         regulator-max-microvolt = <3300000>;
  44                         regulator-always-on;
  45                 };
  46
  47                 reg_usb_otg_vbus: regulator@2 {
  48                         compatible = "regulator-fixed";
  49                         reg = <2>;
  50                         regulator-name = "usb_otg_vbus";
  51                         regulator-min-microvolt = <5000000>;
  52                         regulator-max-microvolt = <5000000>;
  53                         gpio = <&gpio3 22 0>;
  54                         enable-active-high;
  55                 };
  56         };
  57
  58         gpio-keys {
  59                 compatible = "gpio-keys";
  60                 pinctrl-names = "default";
  61                 pinctrl-0 = <&pinctrl_gpio_keys>;
  62
  63                 power {
  64                         label = "Power Button";
  65                         gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
  66                         linux,code = <KEY_POWER>;
  67                         gpio-key,wakeup;
  68                 };
  69
  70                 menu {
  71                         label = "Menu";
  72                         gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
  73                         linux,code = <KEY_MENU>;
  74                 };
  75
  76                 home {
  77                         label = "Home";
  78                         gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
  79                         linux,code = <KEY_HOME>;
  80                 };
  81
  82                 back {
  83                         label = "Back";
  84                         gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
  85                         linux,code = <KEY_BACK>;
  86                 };
  87
  88                 volume-up {
  89                         label = "Volume Up";
  90                         gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
  91                         linux,code = <KEY_VOLUMEUP>;
  92                 };
  93
  94                 volume-down {
  95                         label = "Volume Down";
  96                         gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
  97                         linux,code = <KEY_VOLUMEDOWN>;
  98                 };
  99         };
 100
 101         sound {
 102                 compatible = "fsl,imx6q-sabrelite-sgtl5000",
 103                              "fsl,imx-audio-sgtl5000";
 104                 model = "imx6q-sabrelite-sgtl5000";
 105                 ssi-controller = <&ssi1>;
 106                 audio-codec = <&codec>;
 107                 audio-routing =
 108                         "MIC_IN", "Mic Jack",
 109                         "Mic Jack", "Mic Bias",
 110                         "Headphone Jack", "HP_OUT";
 111                 mux-int-port = <1>;
 112                 mux-ext-port = <4>;
 113         };
 114
 115         backlight_lcd {
 116                 compatible = "pwm-backlight";
 117                 pwms = <&pwm1 0 5000000>;
 118                 brightness-levels = <0 4 8 16 32 64 128 255>;
 119                 default-brightness-level = <7>;
 120                 power-supply = <&reg_3p3v>;
 121                 status = "okay";
 122         };
 123
 124         backlight_lvds {
 125                 compatible = "pwm-backlight";
 126                 pwms = <&pwm4 0 5000000>;
 127                 brightness-levels = <0 4 8 16 32 64 128 255>;
 128                 default-brightness-level = <7>;
 129                 power-supply = <&reg_3p3v>;
 130                 status = "okay";
 131         };
 132 };
 133
 134 &audmux {
 135         pinctrl-names = "default";
 136         pinctrl-0 = <&pinctrl_audmux>;
 137         status = "okay";
 138 };
 139
 140 &ecspi1 {
 141         fsl,spi-num-chipselects = <1>;
 142         cs-gpios = <&gpio3 19 0>;
 143         pinctrl-names = "default";
 144         pinctrl-0 = <&pinctrl_ecspi1>;
 145         status = "okay";
 146
 147         flash: m25p80@0 {
 148                 compatible = "sst,sst25vf016b";
 149                 spi-max-frequency = <20000000>;
 150                 reg = <0>;
 151         };
 152 };
 153
 154 &fec {
 155         pinctrl-names = "default";
 156         pinctrl-0 = <&pinctrl_enet>;
 157         phy-mode = "rgmii";
 158         phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
 159         txen-skew-ps = <0>;
 160         txc-skew-ps = <3000>;
 161         rxdv-skew-ps = <0>;
 162         rxc-skew-ps = <3000>;
 163         rxd0-skew-ps = <0>;
 164         rxd1-skew-ps = <0>;
 165         rxd2-skew-ps = <0>;
 166         rxd3-skew-ps = <0>;
 167         txd0-skew-ps = <0>;
 168         txd1-skew-ps = <0>;
 169         txd2-skew-ps = <0>;
 170         txd3-skew-ps = <0>;
 171         interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
 172                               <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
 173         status = "okay";
 174 };
 175
 176 &hdmi {
 177         ddc-i2c-bus = <&i2c2>;
 178         status = "okay";
 179 };
 180
 181 &i2c1 {
 182         clock-frequency = <100000>;
 183         pinctrl-names = "default";
 184         pinctrl-0 = <&pinctrl_i2c1>;
 185         status = "okay";
 186
 187         codec: sgtl5000@0a {
 188                 compatible = "fsl,sgtl5000";
 189                 reg = <0x0a>;
 190                 clocks = <&clks 201>;
 191                 VDDA-supply = <&reg_2p5v>;
 192                 VDDIO-supply = <&reg_3p3v>;
 193         };
 194 };
 195
 196 &i2c2 {
 197         clock-frequency = <100000>;
 198         pinctrl-names = "default";
 199         pinctrl-0 = <&pinctrl_i2c2>;
 200         status = "okay";
 201 };
 202
 203 &i2c3 {
 204         clock-frequency = <100000>;
 205         pinctrl-names = "default";
 206         pinctrl-0 = <&pinctrl_i2c3>;
 207         status = "okay";
 208 };
 209
 210 &iomuxc {
 211         pinctrl-names = "default";
 212         pinctrl-0 = <&pinctrl_hog>;
 213
 214         imx6q-sabrelite {
 215                 pinctrl_hog: hoggrp {
 216                         fsl,pins = <
 217                                 /* SGTL5000 sys_mclk */
 218                                 MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x030b0
 219                         >;
 220                 };
 221
 222                 pinctrl_audmux: audmuxgrp {
 223                         fsl,pins = <
 224                                 MX6QDL_PAD_SD2_DAT0__AUD4_RXD           0x130b0
 225                                 MX6QDL_PAD_SD2_DAT3__AUD4_TXC           0x130b0
 226                                 MX6QDL_PAD_SD2_DAT2__AUD4_TXD           0x110b0
 227                                 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS          0x130b0
 228                         >;
 229                 };
 230
 231                 pinctrl_ecspi1: ecspi1grp {
 232                         fsl,pins = <
 233                                 MX6QDL_PAD_EIM_D17__ECSPI1_MISO         0x100b1
 234                                 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI         0x100b1
 235                                 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK         0x100b1
 236                                 MX6QDL_PAD_EIM_D19__GPIO3_IO19  0x000b1 /* CS */
 237                         >;
 238                 };
 239
 240                 pinctrl_enet: enetgrp {
 241                         fsl,pins = <
 242                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x100b0
 243                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x100b0
 244                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x100b0
 245                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x100b0
 246                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x100b0
 247                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x100b0
 248                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x100b0
 249                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x100b0
 250                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x100b0
 251                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
 252                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
 253                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
 254                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
 255                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
 256                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
 257                                 /* Phy reset */
 258                                 MX6QDL_PAD_EIM_D23__GPIO3_IO23          0x000b0
 259                                 MX6QDL_PAD_GPIO_6__ENET_IRQ             0x000b1
 260                         >;
 261                 };
 262
 263                 pinctrl_gpio_keys: gpio_keysgrp {
 264                         fsl,pins = <
 265                                 /* Power Button */
 266                                 MX6QDL_PAD_NANDF_D3__GPIO2_IO03         0x1b0b0
 267                                 /* Menu Button */
 268                                 MX6QDL_PAD_NANDF_D1__GPIO2_IO01         0x1b0b0
 269                                 /* Home Button */
 270                                 MX6QDL_PAD_NANDF_D4__GPIO2_IO04         0x1b0b0
 271                                 /* Back Button */
 272                                 MX6QDL_PAD_NANDF_D2__GPIO2_IO02         0x1b0b0
 273                                 /* Volume Up Button */
 274                                 MX6QDL_PAD_GPIO_18__GPIO7_IO13          0x1b0b0
 275                                 /* Volume Down Button */
 276                                 MX6QDL_PAD_GPIO_19__GPIO4_IO05          0x1b0b0
 277                         >;
 278                 };
 279
 280                 pinctrl_i2c1: i2c1grp {
 281                         fsl,pins = <
 282                                 MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
 283                                 MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
 284                         >;
 285                 };
 286
 287                 pinctrl_i2c2: i2c2grp {
 288                         fsl,pins = <
 289                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
 290                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
 291                         >;
 292                 };
 293
 294                 pinctrl_i2c3: i2c3grp {
 295                         fsl,pins = <
 296                                 MX6QDL_PAD_GPIO_5__I2C3_SCL             0x4001b8b1
 297                                 MX6QDL_PAD_GPIO_16__I2C3_SDA            0x4001b8b1
 298                         >;
 299                 };
 300
 301                 pinctrl_pwm1: pwm1grp {
 302                         fsl,pins = <
 303                                 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
 304                         >;
 305                 };
 306
 307                 pinctrl_pwm3: pwm3grp {
 308                         fsl,pins = <
 309                                 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
 310                         >;
 311                 };
 312
 313                 pinctrl_pwm4: pwm4grp {
 314                         fsl,pins = <
 315                                 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
 316                         >;
 317                 };
 318
 319                 pinctrl_uart1: uart1grp {
 320                         fsl,pins = <
 321                                 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
 322                                 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA      0x1b0b1
 323                         >;
 324                 };
 325
 326                 pinctrl_uart2: uart2grp {
 327                         fsl,pins = <
 328                                 MX6QDL_PAD_EIM_D26__UART2_TX_DATA       0x1b0b1
 329                                 MX6QDL_PAD_EIM_D27__UART2_RX_DATA       0x1b0b1
 330                         >;
 331                 };
 332
 333                 pinctrl_usbotg: usbotggrp {
 334                         fsl,pins = <
 335                                 MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
 336                                 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
 337                                 /* power enable, high active */
 338                                 MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x000b0
 339                         >;
 340                 };
 341
 342                 pinctrl_usdhc3: usdhc3grp {
 343                         fsl,pins = <
 344                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
 345                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
 346                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
 347                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
 348                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
 349                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
 350                                 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */
 351                                 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0 /* WP */
 352                         >;
 353                 };
 354
 355                 pinctrl_usdhc4: usdhc4grp {
 356                         fsl,pins = <
 357                                 MX6QDL_PAD_SD4_CMD__SD4_CMD             0x17059
 358                                 MX6QDL_PAD_SD4_CLK__SD4_CLK             0x10059
 359                                 MX6QDL_PAD_SD4_DAT0__SD4_DATA0          0x17059
 360                                 MX6QDL_PAD_SD4_DAT1__SD4_DATA1          0x17059
 361                                 MX6QDL_PAD_SD4_DAT2__SD4_DATA2          0x17059
 362                                 MX6QDL_PAD_SD4_DAT3__SD4_DATA3          0x17059
 363                                 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */
 364                         >;
 365                 };
 366         };
 367 };
 368
 369 &ldb {
 370         status = "okay";
 371
 372         lvds-channel@0 {
 373                 fsl,data-mapping = "spwg";
 374                 fsl,data-width = <18>;
 375                 status = "okay";
 376
 377                 display-timings {
 378                         native-mode = <&timing0>;
 379                         timing0: hsd100pxn1 {
 380                                 clock-frequency = <65000000>;
 381                                 hactive = <1024>;
 382                                 vactive = <768>;
 383                                 hback-porch = <220>;
 384                                 hfront-porch = <40>;
 385                                 vback-porch = <21>;
 386                                 vfront-porch = <7>;
 387                                 hsync-len = <60>;
 388                                 vsync-len = <10>;
 389                         };
 390                 };
 391         };
 392 };
 393
 394 &pcie {
 395         status = "okay";
 396 };
 397
 398 &pwm1 {
 399         pinctrl-names = "default";
 400         pinctrl-0 = <&pinctrl_pwm1>;
 401         status = "okay";
 402 };
 403
 404 &pwm3 {
 405         pinctrl-names = "default";
 406         pinctrl-0 = <&pinctrl_pwm3>;
 407         status = "okay";
 408 };
 409
 410 &pwm4 {
 411         pinctrl-names = "default";
 412         pinctrl-0 = <&pinctrl_pwm4>;
 413         status = "okay";
 414 };
 415
 416 &ssi1 {
 417         status = "okay";
 418 };
 419
 420 &uart1 {
 421         pinctrl-names = "default";
 422         pinctrl-0 = <&pinctrl_uart1>;
 423         status = "okay";
 424 };
 425
 426 &uart2 {
 427         pinctrl-names = "default";
 428         pinctrl-0 = <&pinctrl_uart2>;
 429         status = "okay";
 430 };
 431
 432 &usbh1 {
 433         status = "okay";
 434 };
 435
 436 &usbotg {
 437         vbus-supply = <&reg_usb_otg_vbus>;
 438         pinctrl-names = "default";
 439         pinctrl-0 = <&pinctrl_usbotg>;
 440         disable-over-current;
 441         status = "okay";
 442 };
 443
 444 &usdhc3 {
 445         pinctrl-names = "default";
 446         pinctrl-0 = <&pinctrl_usdhc3>;
 447         cd-gpios = <&gpio7 0 0>;
 448         wp-gpios = <&gpio7 1 0>;
 449         vmmc-supply = <&reg_3p3v>;
 450         status = "okay";
 451 };
 452
 453 &usdhc4 {
 454         pinctrl-names = "default";
 455         pinctrl-0 = <&pinctrl_usdhc4>;
 456         cd-gpios = <&gpio2 6 0>;
 457         vmmc-supply = <&reg_3p3v>;
 458         status = "okay";
 459 };