arch/arm/boot/dts/exynos4.dtsi

   1 /*
   2  * Samsung's Exynos4 SoC series common device tree source
   3  *
   4  * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
   5  *              http://www.samsung.com
   6  * Copyright (c) 2010-2011 Linaro Ltd.
   7  *              www.linaro.org
   8  *
   9  * Samsung's Exynos4 SoC series device nodes are listed in this file.  Particular
  10  * SoCs from Exynos4 series can include this file and provide values for SoCs
  11  * specfic bindings.
  12  *
  13  * Note: This file does not include device nodes for all the controllers in
  14  * Exynos4 SoCs. As device tree coverage for Exynos4 increases, additional
  15  * nodes can be added to this file.
  16  *
  17  * This program is free software; you can redistribute it and/or modify
  18  * it under the terms of the GNU General Public License version 2 as
  19  * published by the Free Software Foundation.
  20  */
  21
  22 #include <dt-bindings/clock/exynos4.h>
  23 #include <dt-bindings/clock/exynos-audss-clk.h>
  24 #include "skeleton.dtsi"
  25
  26 / {
  27         interrupt-parent = <&gic>;
  28
  29         aliases {
  30                 spi0 = &spi_0;
  31                 spi1 = &spi_1;
  32                 spi2 = &spi_2;
  33                 i2c0 = &i2c_0;
  34                 i2c1 = &i2c_1;
  35                 i2c2 = &i2c_2;
  36                 i2c3 = &i2c_3;
  37                 i2c4 = &i2c_4;
  38                 i2c5 = &i2c_5;
  39                 i2c6 = &i2c_6;
  40                 i2c7 = &i2c_7;
  41                 csis0 = &csis_0;
  42                 csis1 = &csis_1;
  43                 fimc0 = &fimc_0;
  44                 fimc1 = &fimc_1;
  45                 fimc2 = &fimc_2;
  46                 fimc3 = &fimc_3;
  47                 serial0 = &serial_0;
  48                 serial1 = &serial_1;
  49                 serial2 = &serial_2;
  50                 serial3 = &serial_3;
  51         };
  52
  53         clock_audss: clock-controller@03810000 {
  54                 compatible = "samsung,exynos4210-audss-clock";
  55                 reg = <0x03810000 0x0C>;
  56                 #clock-cells = <1>;
  57         };
  58
  59         i2s0: i2s@03830000 {
  60                 compatible = "samsung,s5pv210-i2s";
  61                 reg = <0x03830000 0x100>;
  62                 clocks = <&clock_audss EXYNOS_I2S_BUS>;
  63                 clock-names = "iis";
  64                 #clock-cells = <1>;
  65                 clock-output-names = "i2s_cdclk0";
  66                 dmas = <&pdma0 12>, <&pdma0 11>, <&pdma0 10>;
  67                 dma-names = "tx", "rx", "tx-sec";
  68                 samsung,idma-addr = <0x03000000>;
  69                 #sound-dai-cells = <1>;
  70                 status = "disabled";
  71         };
  72
  73         chipid@10000000 {
  74                 compatible = "samsung,exynos4210-chipid";
  75                 reg = <0x10000000 0x100>;
  76         };
  77
  78         mipi_phy: video-phy@10020710 {
  79                 compatible = "samsung,s5pv210-mipi-video-phy";
  80                 reg = <0x10020710 8>;
  81                 #phy-cells = <1>;
  82         };
  83
  84         pd_mfc: mfc-power-domain@10023C40 {
  85                 compatible = "samsung,exynos4210-pd";
  86                 reg = <0x10023C40 0x20>;
  87         };
  88
  89         pd_g3d: g3d-power-domain@10023C60 {
  90                 compatible = "samsung,exynos4210-pd";
  91                 reg = <0x10023C60 0x20>;
  92         };
  93
  94         pd_lcd0: lcd0-power-domain@10023C80 {
  95                 compatible = "samsung,exynos4210-pd";
  96                 reg = <0x10023C80 0x20>;
  97         };
  98
  99         pd_tv: tv-power-domain@10023C20 {
 100                 compatible = "samsung,exynos4210-pd";
 101                 reg = <0x10023C20 0x20>;
 102         };
 103
 104         pd_cam: cam-power-domain@10023C00 {
 105                 compatible = "samsung,exynos4210-pd";
 106                 reg = <0x10023C00 0x20>;
 107         };
 108
 109         pd_gps: gps-power-domain@10023CE0 {
 110                 compatible = "samsung,exynos4210-pd";
 111                 reg = <0x10023CE0 0x20>;
 112         };
 113
 114         pd_gps_alive: gps-alive-power-domain@10023D00 {
 115                 compatible = "samsung,exynos4210-pd";
 116                 reg = <0x10023D00 0x20>;
 117         };
 118
 119         gic: interrupt-controller@10490000 {
 120                 compatible = "arm,cortex-a9-gic";
 121                 #interrupt-cells = <3>;
 122                 interrupt-controller;
 123                 reg = <0x10490000 0x10000>, <0x10480000 0x10000>;
 124         };
 125
 126         combiner: interrupt-controller@10440000 {
 127                 compatible = "samsung,exynos4210-combiner";
 128                 #interrupt-cells = <2>;
 129                 interrupt-controller;
 130                 reg = <0x10440000 0x1000>;
 131         };
 132
 133         pmu {
 134                 compatible = "arm,cortex-a9-pmu";
 135                 interrupt-parent = <&combiner>;
 136                 interrupts = <2 2>, <3 2>;
 137         };
 138
 139         sys_reg: syscon@10010000 {
 140                 compatible = "samsung,exynos4-sysreg", "syscon";
 141                 reg = <0x10010000 0x400>;
 142         };
 143
 144         pmu_system_controller: system-controller@10020000 {
 145                 compatible = "samsung,exynos4210-pmu", "syscon";
 146                 reg = <0x10020000 0x4000>;
 147         };
 148
 149         dsi_0: dsi@11C80000 {
 150                 compatible = "samsung,exynos4210-mipi-dsi";
 151                 reg = <0x11C80000 0x10000>;
 152                 interrupts = <0 79 0>;
 153                 samsung,power-domain = <&pd_lcd0>;
 154                 phys = <&mipi_phy 1>;
 155                 phy-names = "dsim";
 156                 clocks = <&clock CLK_DSIM0>, <&clock CLK_SCLK_MIPI0>;
 157                 clock-names = "bus_clk", "pll_clk";
 158                 status = "disabled";
 159                 #address-cells = <1>;
 160                 #size-cells = <0>;
 161         };
 162
 163         camera {
 164                 compatible = "samsung,fimc", "simple-bus";
 165                 status = "disabled";
 166                 #address-cells = <1>;
 167                 #size-cells = <1>;
 168                 #clock-cells = <1>;
 169                 clock-output-names = "cam_a_clkout", "cam_b_clkout";
 170                 ranges;
 171
 172                 fimc_0: fimc@11800000 {
 173                         compatible = "samsung,exynos4210-fimc";
 174                         reg = <0x11800000 0x1000>;
 175                         interrupts = <0 84 0>;
 176                         clocks = <&clock CLK_FIMC0>, <&clock CLK_SCLK_FIMC0>;
 177                         clock-names = "fimc", "sclk_fimc";
 178                         samsung,power-domain = <&pd_cam>;
 179                         samsung,sysreg = <&sys_reg>;
 180                         status = "disabled";
 181                 };
 182
 183                 fimc_1: fimc@11810000 {
 184                         compatible = "samsung,exynos4210-fimc";
 185                         reg = <0x11810000 0x1000>;
 186                         interrupts = <0 85 0>;
 187                         clocks = <&clock CLK_FIMC1>, <&clock CLK_SCLK_FIMC1>;
 188                         clock-names = "fimc", "sclk_fimc";
 189                         samsung,power-domain = <&pd_cam>;
 190                         samsung,sysreg = <&sys_reg>;
 191                         status = "disabled";
 192                 };
 193
 194                 fimc_2: fimc@11820000 {
 195                         compatible = "samsung,exynos4210-fimc";
 196                         reg = <0x11820000 0x1000>;
 197                         interrupts = <0 86 0>;
 198                         clocks = <&clock CLK_FIMC2>, <&clock CLK_SCLK_FIMC2>;
 199                         clock-names = "fimc", "sclk_fimc";
 200                         samsung,power-domain = <&pd_cam>;
 201                         samsung,sysreg = <&sys_reg>;
 202                         status = "disabled";
 203                 };
 204
 205                 fimc_3: fimc@11830000 {
 206                         compatible = "samsung,exynos4210-fimc";
 207                         reg = <0x11830000 0x1000>;
 208                         interrupts = <0 87 0>;
 209                         clocks = <&clock CLK_FIMC3>, <&clock CLK_SCLK_FIMC3>;
 210                         clock-names = "fimc", "sclk_fimc";
 211                         samsung,power-domain = <&pd_cam>;
 212                         samsung,sysreg = <&sys_reg>;
 213                         status = "disabled";
 214                 };
 215
 216                 csis_0: csis@11880000 {
 217                         compatible = "samsung,exynos4210-csis";
 218                         reg = <0x11880000 0x4000>;
 219                         interrupts = <0 78 0>;
 220                         clocks = <&clock CLK_CSIS0>, <&clock CLK_SCLK_CSIS0>;
 221                         clock-names = "csis", "sclk_csis";
 222                         bus-width = <4>;
 223                         samsung,power-domain = <&pd_cam>;
 224                         phys = <&mipi_phy 0>;
 225                         phy-names = "csis";
 226                         status = "disabled";
 227                         #address-cells = <1>;
 228                         #size-cells = <0>;
 229                 };
 230
 231                 csis_1: csis@11890000 {
 232                         compatible = "samsung,exynos4210-csis";
 233                         reg = <0x11890000 0x4000>;
 234                         interrupts = <0 80 0>;
 235                         clocks = <&clock CLK_CSIS1>, <&clock CLK_SCLK_CSIS1>;
 236                         clock-names = "csis", "sclk_csis";
 237                         bus-width = <2>;
 238                         samsung,power-domain = <&pd_cam>;
 239                         phys = <&mipi_phy 2>;
 240                         phy-names = "csis";
 241                         status = "disabled";
 242                         #address-cells = <1>;
 243                         #size-cells = <0>;
 244                 };
 245         };
 246
 247         watchdog@10060000 {
 248                 compatible = "samsung,s3c2410-wdt";
 249                 reg = <0x10060000 0x100>;
 250                 interrupts = <0 43 0>;
 251                 clocks = <&clock CLK_WDT>;
 252                 clock-names = "watchdog";
 253                 status = "disabled";
 254         };
 255
 256         rtc@10070000 {
 257                 compatible = "samsung,s3c6410-rtc";
 258                 reg = <0x10070000 0x100>;
 259                 interrupts = <0 44 0>, <0 45 0>;
 260                 clocks = <&clock CLK_RTC>;
 261                 clock-names = "rtc";
 262                 status = "disabled";
 263         };
 264
 265         keypad@100A0000 {
 266                 compatible = "samsung,s5pv210-keypad";
 267                 reg = <0x100A0000 0x100>;
 268                 interrupts = <0 109 0>;
 269                 clocks = <&clock CLK_KEYIF>;
 270                 clock-names = "keypad";
 271                 status = "disabled";
 272         };
 273
 274         sdhci@12510000 {
 275                 compatible = "samsung,exynos4210-sdhci";
 276                 reg = <0x12510000 0x100>;
 277                 interrupts = <0 73 0>;
 278                 clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
 279                 clock-names = "hsmmc", "mmc_busclk.2";
 280                 status = "disabled";
 281         };
 282
 283         sdhci@12520000 {
 284                 compatible = "samsung,exynos4210-sdhci";
 285                 reg = <0x12520000 0x100>;
 286                 interrupts = <0 74 0>;
 287                 clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
 288                 clock-names = "hsmmc", "mmc_busclk.2";
 289                 status = "disabled";
 290         };
 291
 292         sdhci@12530000 {
 293                 compatible = "samsung,exynos4210-sdhci";
 294                 reg = <0x12530000 0x100>;
 295                 interrupts = <0 75 0>;
 296                 clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>;
 297                 clock-names = "hsmmc", "mmc_busclk.2";
 298                 status = "disabled";
 299         };
 300
 301         sdhci@12540000 {
 302                 compatible = "samsung,exynos4210-sdhci";
 303                 reg = <0x12540000 0x100>;
 304                 interrupts = <0 76 0>;
 305                 clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>;
 306                 clock-names = "hsmmc", "mmc_busclk.2";
 307                 status = "disabled";
 308         };
 309
 310         exynos_usbphy: exynos-usbphy@125B0000 {
 311                 compatible = "samsung,exynos4210-usb2-phy";
 312                 reg = <0x125B0000 0x100>;
 313                 samsung,pmureg-phandle = <&pmu_system_controller>;
 314                 clocks = <&clock CLK_USB_DEVICE>, <&clock CLK_XUSBXTI>;
 315                 clock-names = "phy", "ref";
 316                 #phy-cells = <1>;
 317                 status = "disabled";
 318         };
 319
 320         hsotg@12480000 {
 321                 compatible = "samsung,s3c6400-hsotg";
 322                 reg = <0x12480000 0x20000>;
 323                 interrupts = <0 71 0>;
 324                 clocks = <&clock CLK_USB_DEVICE>;
 325                 clock-names = "otg";
 326                 phys = <&exynos_usbphy 0>;
 327                 phy-names = "usb2-phy";
 328                 status = "disabled";
 329         };
 330
 331         ehci@12580000 {
 332                 compatible = "samsung,exynos4210-ehci";
 333                 reg = <0x12580000 0x100>;
 334                 interrupts = <0 70 0>;
 335                 clocks = <&clock CLK_USB_HOST>;
 336                 clock-names = "usbhost";
 337                 status = "disabled";
 338                 #address-cells = <1>;
 339                 #size-cells = <0>;
 340                 port@0 {
 341                     reg = <0>;
 342                     phys = <&exynos_usbphy 1>;
 343                     status = "disabled";
 344                 };
 345                 port@1 {
 346                     reg = <1>;
 347                     phys = <&exynos_usbphy 2>;
 348                     status = "disabled";
 349                 };
 350                 port@2 {
 351                     reg = <2>;
 352                     phys = <&exynos_usbphy 3>;
 353                     status = "disabled";
 354                 };
 355         };
 356
 357         ohci@12590000 {
 358                 compatible = "samsung,exynos4210-ohci";
 359                 reg = <0x12590000 0x100>;
 360                 interrupts = <0 70 0>;
 361                 clocks = <&clock CLK_USB_HOST>;
 362                 clock-names = "usbhost";
 363                 status = "disabled";
 364                 #address-cells = <1>;
 365                 #size-cells = <0>;
 366                 port@0 {
 367                     reg = <0>;
 368                     phys = <&exynos_usbphy 1>;
 369                     status = "disabled";
 370                 };
 371         };
 372
 373         i2s1: i2s@13960000 {
 374                 compatible = "samsung,s3c6410-i2s";
 375                 reg = <0x13960000 0x100>;
 376                 clocks = <&clock CLK_I2S1>;
 377                 clock-names = "iis";
 378                 #clock-cells = <1>;
 379                 clock-output-names = "i2s_cdclk1";
 380                 dmas = <&pdma1 12>, <&pdma1 11>;
 381                 dma-names = "tx", "rx";
 382                 #sound-dai-cells = <1>;
 383                 status = "disabled";
 384         };
 385
 386         i2s2: i2s@13970000 {
 387                 compatible = "samsung,s3c6410-i2s";
 388                 reg = <0x13970000 0x100>;
 389                 clocks = <&clock CLK_I2S2>;
 390                 clock-names = "iis";
 391                 #clock-cells = <1>;
 392                 clock-output-names = "i2s_cdclk2";
 393                 dmas = <&pdma0 14>, <&pdma0 13>;
 394                 dma-names = "tx", "rx";
 395                 #sound-dai-cells = <1>;
 396                 status = "disabled";
 397         };
 398
 399         mfc: codec@13400000 {
 400                 compatible = "samsung,mfc-v5";
 401                 reg = <0x13400000 0x10000>;
 402                 interrupts = <0 94 0>;
 403                 samsung,power-domain = <&pd_mfc>;
 404                 clocks = <&clock CLK_MFC>, <&clock CLK_SCLK_MFC>;
 405                 clock-names = "mfc", "sclk_mfc";
 406                 status = "disabled";
 407         };
 408
 409         serial_0: serial@13800000 {
 410                 compatible = "samsung,exynos4210-uart";
 411                 reg = <0x13800000 0x100>;
 412                 interrupts = <0 52 0>;
 413                 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
 414                 clock-names = "uart", "clk_uart_baud0";
 415                 status = "disabled";
 416         };
 417
 418         serial_1: serial@13810000 {
 419                 compatible = "samsung,exynos4210-uart";
 420                 reg = <0x13810000 0x100>;
 421                 interrupts = <0 53 0>;
 422                 clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
 423                 clock-names = "uart", "clk_uart_baud0";
 424                 status = "disabled";
 425         };
 426
 427         serial_2: serial@13820000 {
 428                 compatible = "samsung,exynos4210-uart";
 429                 reg = <0x13820000 0x100>;
 430                 interrupts = <0 54 0>;
 431                 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
 432                 clock-names = "uart", "clk_uart_baud0";
 433                 status = "disabled";
 434         };
 435
 436         serial_3: serial@13830000 {
 437                 compatible = "samsung,exynos4210-uart";
 438                 reg = <0x13830000 0x100>;
 439                 interrupts = <0 55 0>;
 440                 clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
 441                 clock-names = "uart", "clk_uart_baud0";
 442                 status = "disabled";
 443         };
 444
 445         i2c_0: i2c@13860000 {
 446                 #address-cells = <1>;
 447                 #size-cells = <0>;
 448                 compatible = "samsung,s3c2440-i2c";
 449                 reg = <0x13860000 0x100>;
 450                 interrupts = <0 58 0>;
 451                 clocks = <&clock CLK_I2C0>;
 452                 clock-names = "i2c";
 453                 pinctrl-names = "default";
 454                 pinctrl-0 = <&i2c0_bus>;
 455                 status = "disabled";
 456         };
 457
 458         i2c_1: i2c@13870000 {
 459                 #address-cells = <1>;
 460                 #size-cells = <0>;
 461                 compatible = "samsung,s3c2440-i2c";
 462                 reg = <0x13870000 0x100>;
 463                 interrupts = <0 59 0>;
 464                 clocks = <&clock CLK_I2C1>;
 465                 clock-names = "i2c";
 466                 pinctrl-names = "default";
 467                 pinctrl-0 = <&i2c1_bus>;
 468                 status = "disabled";
 469         };
 470
 471         i2c_2: i2c@13880000 {
 472                 #address-cells = <1>;
 473                 #size-cells = <0>;
 474                 compatible = "samsung,s3c2440-i2c";
 475                 reg = <0x13880000 0x100>;
 476                 interrupts = <0 60 0>;
 477                 clocks = <&clock CLK_I2C2>;
 478                 clock-names = "i2c";
 479                 pinctrl-names = "default";
 480                 pinctrl-0 = <&i2c2_bus>;
 481                 status = "disabled";
 482         };
 483
 484         i2c_3: i2c@13890000 {
 485                 #address-cells = <1>;
 486                 #size-cells = <0>;
 487                 compatible = "samsung,s3c2440-i2c";
 488                 reg = <0x13890000 0x100>;
 489                 interrupts = <0 61 0>;
 490                 clocks = <&clock CLK_I2C3>;
 491                 clock-names = "i2c";
 492                 pinctrl-names = "default";
 493                 pinctrl-0 = <&i2c3_bus>;
 494                 status = "disabled";
 495         };
 496
 497         i2c_4: i2c@138A0000 {
 498                 #address-cells = <1>;
 499                 #size-cells = <0>;
 500                 compatible = "samsung,s3c2440-i2c";
 501                 reg = <0x138A0000 0x100>;
 502                 interrupts = <0 62 0>;
 503                 clocks = <&clock CLK_I2C4>;
 504                 clock-names = "i2c";
 505                 pinctrl-names = "default";
 506                 pinctrl-0 = <&i2c4_bus>;
 507                 status = "disabled";
 508         };
 509
 510         i2c_5: i2c@138B0000 {
 511                 #address-cells = <1>;
 512                 #size-cells = <0>;
 513                 compatible = "samsung,s3c2440-i2c";
 514                 reg = <0x138B0000 0x100>;
 515                 interrupts = <0 63 0>;
 516                 clocks = <&clock CLK_I2C5>;
 517                 clock-names = "i2c";
 518                 pinctrl-names = "default";
 519                 pinctrl-0 = <&i2c5_bus>;
 520                 status = "disabled";
 521         };
 522
 523         i2c_6: i2c@138C0000 {
 524                 #address-cells = <1>;
 525                 #size-cells = <0>;
 526                 compatible = "samsung,s3c2440-i2c";
 527                 reg = <0x138C0000 0x100>;
 528                 interrupts = <0 64 0>;
 529                 clocks = <&clock CLK_I2C6>;
 530                 clock-names = "i2c";
 531                 pinctrl-names = "default";
 532                 pinctrl-0 = <&i2c6_bus>;
 533                 status = "disabled";
 534         };
 535
 536         i2c_7: i2c@138D0000 {
 537                 #address-cells = <1>;
 538                 #size-cells = <0>;
 539                 compatible = "samsung,s3c2440-i2c";
 540                 reg = <0x138D0000 0x100>;
 541                 interrupts = <0 65 0>;
 542                 clocks = <&clock CLK_I2C7>;
 543                 clock-names = "i2c";
 544                 pinctrl-names = "default";
 545                 pinctrl-0 = <&i2c7_bus>;
 546                 status = "disabled";
 547         };
 548
 549         spi_0: spi@13920000 {
 550                 compatible = "samsung,exynos4210-spi";
 551                 reg = <0x13920000 0x100>;
 552                 interrupts = <0 66 0>;
 553                 dmas = <&pdma0 7>, <&pdma0 6>;
 554                 dma-names = "tx", "rx";
 555                 #address-cells = <1>;
 556                 #size-cells = <0>;
 557                 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
 558                 clock-names = "spi", "spi_busclk0";
 559                 pinctrl-names = "default";
 560                 pinctrl-0 = <&spi0_bus>;
 561                 status = "disabled";
 562         };
 563
 564         spi_1: spi@13930000 {
 565                 compatible = "samsung,exynos4210-spi";
 566                 reg = <0x13930000 0x100>;
 567                 interrupts = <0 67 0>;
 568                 dmas = <&pdma1 7>, <&pdma1 6>;
 569                 dma-names = "tx", "rx";
 570                 #address-cells = <1>;
 571                 #size-cells = <0>;
 572                 clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
 573                 clock-names = "spi", "spi_busclk0";
 574                 pinctrl-names = "default";
 575                 pinctrl-0 = <&spi1_bus>;
 576                 status = "disabled";
 577         };
 578
 579         spi_2: spi@13940000 {
 580                 compatible = "samsung,exynos4210-spi";
 581                 reg = <0x13940000 0x100>;
 582                 interrupts = <0 68 0>;
 583                 dmas = <&pdma0 9>, <&pdma0 8>;
 584                 dma-names = "tx", "rx";
 585                 #address-cells = <1>;
 586                 #size-cells = <0>;
 587                 clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
 588                 clock-names = "spi", "spi_busclk0";
 589                 pinctrl-names = "default";
 590                 pinctrl-0 = <&spi2_bus>;
 591                 status = "disabled";
 592         };
 593
 594         pwm@139D0000 {
 595                 compatible = "samsung,exynos4210-pwm";
 596                 reg = <0x139D0000 0x1000>;
 597                 interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
 598                 clocks = <&clock CLK_PWM>;
 599                 clock-names = "timers";
 600                 #pwm-cells = <3>;
 601                 status = "disabled";
 602         };
 603
 604         amba {
 605                 #address-cells = <1>;
 606                 #size-cells = <1>;
 607                 compatible = "arm,amba-bus";
 608                 interrupt-parent = <&gic>;
 609                 ranges;
 610
 611                 pdma0: pdma@12680000 {
 612                         compatible = "arm,pl330", "arm,primecell";
 613                         reg = <0x12680000 0x1000>;
 614                         interrupts = <0 35 0>;
 615                         clocks = <&clock CLK_PDMA0>;
 616                         clock-names = "apb_pclk";
 617                         #dma-cells = <1>;
 618                         #dma-channels = <8>;
 619                         #dma-requests = <32>;
 620                 };
 621
 622                 pdma1: pdma@12690000 {
 623                         compatible = "arm,pl330", "arm,primecell";
 624                         reg = <0x12690000 0x1000>;
 625                         interrupts = <0 36 0>;
 626                         clocks = <&clock CLK_PDMA1>;
 627                         clock-names = "apb_pclk";
 628                         #dma-cells = <1>;
 629                         #dma-channels = <8>;
 630                         #dma-requests = <32>;
 631                 };
 632
 633                 mdma1: mdma@12850000 {
 634                         compatible = "arm,pl330", "arm,primecell";
 635                         reg = <0x12850000 0x1000>;
 636                         interrupts = <0 34 0>;
 637                         clocks = <&clock CLK_MDMA>;
 638                         clock-names = "apb_pclk";
 639                         #dma-cells = <1>;
 640                         #dma-channels = <8>;
 641                         #dma-requests = <1>;
 642                 };
 643         };
 644
 645         fimd: fimd@11c00000 {
 646                 compatible = "samsung,exynos4210-fimd";
 647                 interrupt-parent = <&combiner>;
 648                 reg = <0x11c00000 0x20000>;
 649                 interrupt-names = "fifo", "vsync", "lcd_sys";
 650                 interrupts = <11 0>, <11 1>, <11 2>;
 651                 clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>;
 652                 clock-names = "sclk_fimd", "fimd";
 653                 samsung,power-domain = <&pd_lcd0>;
 654                 samsung,sysreg = <&sys_reg>;
 655                 status = "disabled";
 656         };
 657 };