cifs: fix race between call_async() and reconnect()
[pandora-kernel.git] / Documentation / hwmon / jc42
1 Kernel driver jc42
2 ==================
3
4 Supported chips:
5   * Analog Devices ADT7408
6     Prefix: 'adt7408'
7     Addresses scanned: I2C 0x18 - 0x1f
8     Datasheets:
9         http://www.analog.com/static/imported-files/data_sheets/ADT7408.pdf
10   * Atmel AT30TS00
11     Prefix: 'at30ts00'
12     Addresses scanned: I2C 0x18 - 0x1f
13     Datasheets:
14         http://www.atmel.com/Images/doc8585.pdf
15   * IDT TSE2002B3, TSE2002GB2, TS3000B3, TS3000GB2
16     Prefix: 'tse2002', 'ts3000'
17     Addresses scanned: I2C 0x18 - 0x1f
18     Datasheets:
19         http://www.idt.com/sites/default/files/documents/IDT_TSE2002B3C_DST_20100512_120303152056.pdf
20         http://www.idt.com/sites/default/files/documents/IDT_TSE2002GB2A1_DST_20111107_120303145914.pdf
21         http://www.idt.com/sites/default/files/documents/IDT_TS3000B3A_DST_20101129_120303152013.pdf
22         http://www.idt.com/sites/default/files/documents/IDT_TS3000GB2A1_DST_20111104_120303151012.pdf
23   * Maxim MAX6604
24     Prefix: 'max6604'
25     Addresses scanned: I2C 0x18 - 0x1f
26     Datasheets:
27         http://datasheets.maxim-ic.com/en/ds/MAX6604.pdf
28   * Microchip MCP9804, MCP9805, MCP98242, MCP98243, MCP9843
29     Prefixes: 'mcp9804', 'mcp9805', 'mcp98242', 'mcp98243', 'mcp9843'
30     Addresses scanned: I2C 0x18 - 0x1f
31     Datasheets:
32         http://ww1.microchip.com/downloads/en/DeviceDoc/22203C.pdf
33         http://ww1.microchip.com/downloads/en/DeviceDoc/21977b.pdf
34         http://ww1.microchip.com/downloads/en/DeviceDoc/21996a.pdf
35         http://ww1.microchip.com/downloads/en/DeviceDoc/22153c.pdf
36   * NXP Semiconductors SE97, SE97B
37     Prefix: 'se97'
38     Addresses scanned: I2C 0x18 - 0x1f
39     Datasheets:
40         http://www.nxp.com/documents/data_sheet/SE97.pdf
41         http://www.nxp.com/documents/data_sheet/SE97B.pdf
42   * NXP Semiconductors SE98
43     Prefix: 'se98'
44     Addresses scanned: I2C 0x18 - 0x1f
45     Datasheets:
46         http://www.nxp.com/documents/data_sheet/SE98.pdf
47   * ON Semiconductor CAT34TS02, CAT6095
48     Prefix: 'cat34ts02', 'cat6095'
49     Addresses scanned: I2C 0x18 - 0x1f
50     Datasheet:
51         http://www.onsemi.com/pub_link/Collateral/CAT34TS02-D.PDF
52         http://www.onsemi.com/pub/Collateral/CAT6095-D.PDF
53   * ST Microelectronics STTS424, STTS424E02
54     Prefix: 'stts424'
55     Addresses scanned: I2C 0x18 - 0x1f
56     Datasheets:
57         http://www.st.com/stonline/products/literature/ds/13447/stts424.pdf
58         http://www.st.com/stonline/products/literature/ds/13448/stts424e02.pdf
59   * ST Microelectronics STTS2002, STTS3000
60     Prefix: 'stts2002', 'stts3000'
61     Addresses scanned: I2C 0x18 - 0x1f
62     Datasheets:
63         http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/DATASHEET/CD00225278.pdf
64         http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/DATA_BRIEF/CD00270920.pdf
65   * JEDEC JC 42.4 compliant temperature sensor chips
66     Prefix: 'jc42'
67     Addresses scanned: I2C 0x18 - 0x1f
68     Datasheet:
69         http://www.jedec.org/sites/default/files/docs/4_01_04R19.pdf
70
71 Author:
72         Guenter Roeck <guenter.roeck@ericsson.com>
73
74
75 Description
76 -----------
77
78 This driver implements support for JEDEC JC 42.4 compliant temperature sensors,
79 which are used on many DDR3 memory modules for mobile devices and servers. Some
80 systems use the sensor to prevent memory overheating by automatically throttling
81 the memory controller.
82
83 The driver auto-detects the chips listed above, but can be manually instantiated
84 to support other JC 42.4 compliant chips.
85
86 Example: the following will load the driver for a generic JC 42.4 compliant
87 temperature sensor at address 0x18 on I2C bus #1:
88
89 # modprobe jc42
90 # echo jc42 0x18 > /sys/bus/i2c/devices/i2c-1/new_device
91
92 A JC 42.4 compliant chip supports a single temperature sensor. Minimum, maximum,
93 and critical temperature can be configured. There are alarms for high, low,
94 and critical thresholds.
95
96 There is also an hysteresis to control the thresholds for resetting alarms.
97 Per JC 42.4 specification, the hysteresis threshold can be configured to 0, 1.5,
98 3.0, and 6.0 degrees C. Configured hysteresis values will be rounded to those
99 limits. The chip supports only a single register to configure the hysteresis,
100 which applies to all limits. This register can be written by writing into
101 temp1_crit_hyst. Other hysteresis attributes are read-only.
102
103 If the BIOS has configured the sensor for automatic temperature management, it
104 is likely that it has locked the registers, i.e., that the temperature limits
105 cannot be changed.
106
107 Sysfs entries
108 -------------
109
110 temp1_input             Temperature (RO)
111 temp1_min               Minimum temperature (RO or RW)
112 temp1_max               Maximum temperature (RO or RW)
113 temp1_crit              Critical high temperature (RO or RW)
114
115 temp1_crit_hyst         Critical hysteresis temperature (RO or RW)
116 temp1_max_hyst          Maximum hysteresis temperature (RO)
117
118 temp1_min_alarm         Temperature low alarm
119 temp1_max_alarm         Temperature high alarm
120 temp1_crit_alarm        Temperature critical alarm