ARM: tegra: swap cache-/interrupt-ctrlr nodes in DT
[pandora-kernel.git] / arch / arm / boot / dts / tegra20.dtsi
index b8effa1..c4c0bb7 100644 (file)
@@ -4,11 +4,20 @@
        compatible = "nvidia,tegra20";
        interrupt-parent = <&intc>;
 
+       aliases {
+               serial0 = &uarta;
+               serial1 = &uartb;
+               serial2 = &uartc;
+               serial3 = &uartd;
+               serial4 = &uarte;
+       };
+
        host1x {
                compatible = "nvidia,tegra20-host1x", "simple-bus";
                reg = <0x50000000 0x00024000>;
                interrupts = <0 65 0x04   /* mpcore syncpt */
                              0 67 0x04>; /* mpcore general */
+               clocks = <&tegra_car 28>;
 
                #address-cells = <1>;
                #size-cells = <1>;
                        compatible = "nvidia,tegra20-mpe";
                        reg = <0x54040000 0x00040000>;
                        interrupts = <0 68 0x04>;
+                       clocks = <&tegra_car 60>;
                };
 
                vi {
                        compatible = "nvidia,tegra20-vi";
                        reg = <0x54080000 0x00040000>;
                        interrupts = <0 69 0x04>;
+                       clocks = <&tegra_car 100>;
                };
 
                epp {
                        compatible = "nvidia,tegra20-epp";
                        reg = <0x540c0000 0x00040000>;
                        interrupts = <0 70 0x04>;
+                       clocks = <&tegra_car 19>;
                };
 
                isp {
                        compatible = "nvidia,tegra20-isp";
                        reg = <0x54100000 0x00040000>;
                        interrupts = <0 71 0x04>;
+                       clocks = <&tegra_car 23>;
                };
 
                gr2d {
                        compatible = "nvidia,tegra20-gr2d";
                        reg = <0x54140000 0x00040000>;
                        interrupts = <0 72 0x04>;
+                       clocks = <&tegra_car 21>;
                };
 
                gr3d {
                        compatible = "nvidia,tegra20-gr3d";
                        reg = <0x54180000 0x00040000>;
+                       clocks = <&tegra_car 24>;
                };
 
                dc@54200000 {
                        compatible = "nvidia,tegra20-dc";
                        reg = <0x54200000 0x00040000>;
                        interrupts = <0 73 0x04>;
+                       clocks = <&tegra_car 27>, <&tegra_car 121>;
+                       clock-names = "disp1", "parent";
 
                        rgb {
                                status = "disabled";
@@ -64,6 +81,8 @@
                        compatible = "nvidia,tegra20-dc";
                        reg = <0x54240000 0x00040000>;
                        interrupts = <0 74 0x04>;
+                       clocks = <&tegra_car 26>, <&tegra_car 121>;
+                       clock-names = "disp2", "parent";
 
                        rgb {
                                status = "disabled";
@@ -74,6 +93,8 @@
                        compatible = "nvidia,tegra20-hdmi";
                        reg = <0x54280000 0x00040000>;
                        interrupts = <0 75 0x04>;
+                       clocks = <&tegra_car 51>, <&tegra_car 117>;
+                       clock-names = "hdmi", "parent";
                        status = "disabled";
                };
 
                        compatible = "nvidia,tegra20-tvo";
                        reg = <0x542c0000 0x00040000>;
                        interrupts = <0 76 0x04>;
+                       clocks = <&tegra_car 102>;
                        status = "disabled";
                };
 
                dsi {
                        compatible = "nvidia,tegra20-dsi";
                        reg = <0x54300000 0x00040000>;
+                       clocks = <&tegra_car 48>;
                        status = "disabled";
                };
        };
                interrupts = <1 13 0x304>;
        };
 
-       cache-controller@50043000 {
-               compatible = "arm,pl310-cache";
-               reg = <0x50043000 0x1000>;
-               arm,data-latency = <5 5 2>;
-               arm,tag-latency = <4 4 2>;
-               cache-unified;
-               cache-level = <2>;
-       };
-
        intc: interrupt-controller {
                compatible = "arm,cortex-a9-gic";
                reg = <0x50041000 0x1000
                #interrupt-cells = <3>;
        };
 
+       cache-controller {
+               compatible = "arm,pl310-cache";
+               reg = <0x50043000 0x1000>;
+               arm,data-latency = <5 5 2>;
+               arm,tag-latency = <4 4 2>;
+               cache-unified;
+               cache-level = <2>;
+       };
+
        timer@60005000 {
                compatible = "nvidia,tegra20-timer";
                reg = <0x60005000 0x60>;
                              0 42 0x04>;
        };
 
+       tegra_car: clock {
+               compatible = "nvidia,tegra20-car";
+               reg = <0x60006000 0x1000>;
+               #clock-cells = <1>;
+       };
+
        apbdma: dma {
                compatible = "nvidia,tegra20-apbdma";
                reg = <0x6000a000 0x1200>;
                              0 117 0x04
                              0 118 0x04
                              0 119 0x04>;
+               clocks = <&tegra_car 34>;
        };
 
        ahb {
                compatible = "nvidia,tegra20-das";
                reg = <0x70000c00 0x80>;
        };
+       
+       tegra_ac97: ac97 {
+               compatible = "nvidia,tegra20-ac97";
+               reg = <0x70002000 0x200>;
+               interrupts = <0 81 0x04>;
+               nvidia,dma-request-selector = <&apbdma 12>;
+               clocks = <&tegra_car 3>;
+               status = "disabled";
+       };
 
        tegra_i2s1: i2s@70002800 {
                compatible = "nvidia,tegra20-i2s";
                reg = <0x70002800 0x200>;
                interrupts = <0 13 0x04>;
                nvidia,dma-request-selector = <&apbdma 2>;
+               clocks = <&tegra_car 11>;
                status = "disabled";
        };
 
                reg = <0x70002a00 0x200>;
                interrupts = <0 3 0x04>;
                nvidia,dma-request-selector = <&apbdma 1>;
+               clocks = <&tegra_car 18>;
                status = "disabled";
        };
 
-       serial@70006000 {
+       /*
+        * There are two serial driver i.e. 8250 based simple serial
+        * driver and APB DMA based serial driver for higher baudrate
+        * and performace. To enable the 8250 based driver, the compatible
+        * is "nvidia,tegra20-uart" and to enable the APB DMA based serial
+        * driver, the comptible is "nvidia,tegra20-hsuart".
+        */
+       uarta: serial@70006000 {
                compatible = "nvidia,tegra20-uart";
                reg = <0x70006000 0x40>;
                reg-shift = <2>;
                interrupts = <0 36 0x04>;
+               nvidia,dma-request-selector = <&apbdma 8>;
+               clocks = <&tegra_car 6>;
                status = "disabled";
        };
 
-       serial@70006040 {
+       uartb: serial@70006040 {
                compatible = "nvidia,tegra20-uart";
                reg = <0x70006040 0x40>;
                reg-shift = <2>;
                interrupts = <0 37 0x04>;
+               nvidia,dma-request-selector = <&apbdma 9>;
+               clocks = <&tegra_car 96>;
                status = "disabled";
        };
 
-       serial@70006200 {
+       uartc: serial@70006200 {
                compatible = "nvidia,tegra20-uart";
                reg = <0x70006200 0x100>;
                reg-shift = <2>;
                interrupts = <0 46 0x04>;
+               nvidia,dma-request-selector = <&apbdma 10>;
+               clocks = <&tegra_car 55>;
                status = "disabled";
        };
 
-       serial@70006300 {
+       uartd: serial@70006300 {
                compatible = "nvidia,tegra20-uart";
                reg = <0x70006300 0x100>;
                reg-shift = <2>;
                interrupts = <0 90 0x04>;
+               nvidia,dma-request-selector = <&apbdma 19>;
+               clocks = <&tegra_car 65>;
                status = "disabled";
        };
 
-       serial@70006400 {
+       uarte: serial@70006400 {
                compatible = "nvidia,tegra20-uart";
                reg = <0x70006400 0x100>;
                reg-shift = <2>;
                interrupts = <0 91 0x04>;
+               nvidia,dma-request-selector = <&apbdma 20>;
+               clocks = <&tegra_car 66>;
                status = "disabled";
        };
 
                compatible = "nvidia,tegra20-pwm";
                reg = <0x7000a000 0x100>;
                #pwm-cells = <2>;
+               clocks = <&tegra_car 17>;
        };
 
        rtc {
                interrupts = <0 38 0x04>;
                #address-cells = <1>;
                #size-cells = <0>;
+               clocks = <&tegra_car 12>, <&tegra_car 124>;
+               clock-names = "div-clk", "fast-clk";
                status = "disabled";
        };
 
                nvidia,dma-request-selector = <&apbdma 11>;
                #address-cells = <1>;
                #size-cells = <0>;
+               clocks = <&tegra_car 43>;
                status = "disabled";
        };
 
                interrupts = <0 84 0x04>;
                #address-cells = <1>;
                #size-cells = <0>;
+               clocks = <&tegra_car 54>, <&tegra_car 124>;
+               clock-names = "div-clk", "fast-clk";
                status = "disabled";
        };
 
                interrupts = <0 92 0x04>;
                #address-cells = <1>;
                #size-cells = <0>;
+               clocks = <&tegra_car 67>, <&tegra_car 124>;
+               clock-names = "div-clk", "fast-clk";
                status = "disabled";
        };
 
                interrupts = <0 53 0x04>;
                #address-cells = <1>;
                #size-cells = <0>;
+               clocks = <&tegra_car 47>, <&tegra_car 124>;
+               clock-names = "div-clk", "fast-clk";
                status = "disabled";
        };
 
                nvidia,dma-request-selector = <&apbdma 15>;
                #address-cells = <1>;
                #size-cells = <0>;
+               clocks = <&tegra_car 41>;
                status = "disabled";
        };
 
                nvidia,dma-request-selector = <&apbdma 16>;
                #address-cells = <1>;
                #size-cells = <0>;
+               clocks = <&tegra_car 44>;
                status = "disabled";
        };
 
                nvidia,dma-request-selector = <&apbdma 17>;
                #address-cells = <1>;
                #size-cells = <0>;
+               clocks = <&tegra_car 46>;
                status = "disabled";
        };
 
                nvidia,dma-request-selector = <&apbdma 18>;
                #address-cells = <1>;
                #size-cells = <0>;
+               clocks = <&tegra_car 68>;
                status = "disabled";
        };
 
                #size-cells = <0>;
        };
 
+       phy1: usb-phy@c5000400 {
+               compatible = "nvidia,tegra20-usb-phy";
+               reg = <0xc5000400 0x3c00>;
+               phy_type = "utmi";
+               nvidia,has-legacy-mode;
+               clocks = <&tegra_car 22>, <&tegra_car 127>;
+               clock-names = "phy", "pll_u";
+       };
+
+       phy2: usb-phy@c5004400 {
+               compatible = "nvidia,tegra20-usb-phy";
+               reg = <0xc5004400 0x3c00>;
+               phy_type = "ulpi";
+               clocks = <&tegra_car 94>, <&tegra_car 127>;
+               clock-names = "phy", "pll_u";
+       };
+
+       phy3: usb-phy@c5008400 {
+               compatible = "nvidia,tegra20-usb-phy";
+               reg = <0xc5008400 0x3C00>;
+               phy_type = "utmi";
+               clocks = <&tegra_car 22>, <&tegra_car 127>;
+               clock-names = "phy", "pll_u";
+       };
+
        usb@c5000000 {
                compatible = "nvidia,tegra20-ehci", "usb-ehci";
                reg = <0xc5000000 0x4000>;
                interrupts = <0 20 0x04>;
                phy_type = "utmi";
                nvidia,has-legacy-mode;
+               clocks = <&tegra_car 22>;
+               nvidia,needs-double-reset;
+               nvidia,phy = <&phy1>;
                status = "disabled";
        };
 
                reg = <0xc5004000 0x4000>;
                interrupts = <0 21 0x04>;
                phy_type = "ulpi";
+               clocks = <&tegra_car 58>;
+               nvidia,phy = <&phy2>;
                status = "disabled";
        };
 
                reg = <0xc5008000 0x4000>;
                interrupts = <0 97 0x04>;
                phy_type = "utmi";
+               clocks = <&tegra_car 59>;
+               nvidia,phy = <&phy3>;
                status = "disabled";
        };
 
                compatible = "nvidia,tegra20-sdhci";
                reg = <0xc8000000 0x200>;
                interrupts = <0 14 0x04>;
+               clocks = <&tegra_car 14>;
                status = "disabled";
        };
 
                compatible = "nvidia,tegra20-sdhci";
                reg = <0xc8000200 0x200>;
                interrupts = <0 15 0x04>;
+               clocks = <&tegra_car 9>;
                status = "disabled";
        };
 
                compatible = "nvidia,tegra20-sdhci";
                reg = <0xc8000400 0x200>;
                interrupts = <0 19 0x04>;
+               clocks = <&tegra_car 69>;
                status = "disabled";
        };
 
                compatible = "nvidia,tegra20-sdhci";
                reg = <0xc8000600 0x200>;
                interrupts = <0 31 0x04>;
+               clocks = <&tegra_car 15>;
                status = "disabled";
        };
 
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               cpu@0 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a9";
+                       reg = <0>;
+               };
+
+               cpu@1 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a9";
+                       reg = <1>;
+               };
+       };
+
        pmu {
                compatible = "arm,cortex-a9-pmu";
                interrupts = <0 56 0x04