drivers/gpu/drm/radeon/radeon_kms.c

   1 /*
   2  * Copyright 2008 Advanced Micro Devices, Inc.
   3  * Copyright 2008 Red Hat Inc.
   4  * Copyright 2009 Jerome Glisse.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors: Dave Airlie
  25  *          Alex Deucher
  26  *          Jerome Glisse
  27  */
  28 #include "drmP.h"
  29 #include "drm_sarea.h"
  30 #include "radeon.h"
  31 #include "radeon_drm.h"
  32
  33 #include <linux/vga_switcheroo.h>
  34 #include <linux/slab.h>
  35
  36 /**
  37  * radeon_driver_unload_kms - Main unload function for KMS.
  38  *
  39  * @dev: drm dev pointer
  40  *
  41  * This is the main unload function for KMS (all asics).
  42  * It calls radeon_modeset_fini() to tear down the
  43  * displays, and radeon_device_fini() to tear down
  44  * the rest of the device (CP, writeback, etc.).
  45  * Returns 0 on success.
  46  */
  47 int radeon_driver_unload_kms(struct drm_device *dev)
  48 {
  49         struct radeon_device *rdev = dev->dev_private;
  50
  51         if (rdev == NULL)
  52                 return 0;
  53         radeon_modeset_fini(rdev);
  54         radeon_device_fini(rdev);
  55         kfree(rdev);
  56         dev->dev_private = NULL;
  57         return 0;
  58 }
  59
  60 /**
  61  * radeon_driver_load_kms - Main load function for KMS.
  62  *
  63  * @dev: drm dev pointer
  64  * @flags: device flags
  65  *
  66  * This is the main load function for KMS (all asics).
  67  * It calls radeon_device_init() to set up the non-display
  68  * parts of the chip (asic init, CP, writeback, etc.), and
  69  * radeon_modeset_init() to set up the display parts
  70  * (crtcs, encoders, hotplug detect, etc.).
  71  * Returns 0 on success, error on failure.
  72  */
  73 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags)
  74 {
  75         struct radeon_device *rdev;
  76         int r, acpi_status;
  77
  78         rdev = kzalloc(sizeof(struct radeon_device), GFP_KERNEL);
  79         if (rdev == NULL) {
  80                 return -ENOMEM;
  81         }
  82         dev->dev_private = (void *)rdev;
  83
  84         /* update BUS flag */
  85         if (drm_pci_device_is_agp(dev)) {
  86                 flags |= RADEON_IS_AGP;
  87         } else if (pci_is_pcie(dev->pdev)) {
  88                 flags |= RADEON_IS_PCIE;
  89         } else {
  90                 flags |= RADEON_IS_PCI;
  91         }
  92
  93         /* radeon_device_init should report only fatal error
  94          * like memory allocation failure or iomapping failure,
  95          * or memory manager initialization failure, it must
  96          * properly initialize the GPU MC controller and permit
  97          * VRAM allocation
  98          */
  99         r = radeon_device_init(rdev, dev, dev->pdev, flags);
 100         if (r) {
 101                 dev_err(&dev->pdev->dev, "Fatal error during GPU init\n");
 102                 goto out;
 103         }
 104
 105         /* Call ACPI methods */
 106         acpi_status = radeon_acpi_init(rdev);
 107         if (acpi_status)
 108                 dev_dbg(&dev->pdev->dev, "Error during ACPI methods call\n");
 109
 110         /* Again modeset_init should fail only on fatal error
 111          * otherwise it should provide enough functionalities
 112          * for shadowfb to run
 113          */
 114         r = radeon_modeset_init(rdev);
 115         if (r)
 116                 dev_err(&dev->pdev->dev, "Fatal error during modeset init\n");
 117 out:
 118         if (r)
 119                 radeon_driver_unload_kms(dev);
 120         return r;
 121 }
 122
 123 /**
 124  * radeon_set_filp_rights - Set filp right.
 125  *
 126  * @dev: drm dev pointer
 127  * @owner: drm file
 128  * @applier: drm file
 129  * @value: value
 130  *
 131  * Sets the filp rights for the device (all asics).
 132  */
 133 static void radeon_set_filp_rights(struct drm_device *dev,
 134                                    struct drm_file **owner,
 135                                    struct drm_file *applier,
 136                                    uint32_t *value)
 137 {
 138         mutex_lock(&dev->struct_mutex);
 139         if (*value == 1) {
 140                 /* wants rights */
 141                 if (!*owner)
 142                         *owner = applier;
 143         } else if (*value == 0) {
 144                 /* revokes rights */
 145                 if (*owner == applier)
 146                         *owner = NULL;
 147         }
 148         *value = *owner == applier ? 1 : 0;
 149         mutex_unlock(&dev->struct_mutex);
 150 }
 151
 152 /*
 153  * Userspace get information ioctl
 154  */
 155 /**
 156  * radeon_info_ioctl - answer a device specific request.
 157  *
 158  * @rdev: radeon device pointer
 159  * @data: request object
 160  * @filp: drm filp
 161  *
 162  * This function is used to pass device specific parameters to the userspace
 163  * drivers.  Examples include: pci device id, pipeline parms, tiling params,
 164  * etc. (all asics).
 165  * Returns 0 on success, -EINVAL on failure.
 166  */
 167 int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
 168 {
 169         struct radeon_device *rdev = dev->dev_private;
 170         struct drm_radeon_info *info;
 171         struct radeon_mode_info *minfo = &rdev->mode_info;
 172         uint32_t *value_ptr;
 173         uint32_t value;
 174         struct drm_crtc *crtc;
 175         int i, found;
 176
 177         info = data;
 178         value_ptr = (uint32_t *)((unsigned long)info->value);
 179         if (DRM_COPY_FROM_USER(&value, value_ptr, sizeof(value)))
 180                 return -EFAULT;
 181
 182         switch (info->request) {
 183         case RADEON_INFO_DEVICE_ID:
 184                 value = dev->pci_device;
 185                 break;
 186         case RADEON_INFO_NUM_GB_PIPES:
 187                 value = rdev->num_gb_pipes;
 188                 break;
 189         case RADEON_INFO_NUM_Z_PIPES:
 190                 value = rdev->num_z_pipes;
 191                 break;
 192         case RADEON_INFO_ACCEL_WORKING:
 193                 /* xf86-video-ati 6.13.0 relies on this being false for evergreen */
 194                 if ((rdev->family >= CHIP_CEDAR) && (rdev->family <= CHIP_HEMLOCK))
 195                         value = false;
 196                 else
 197                         value = rdev->accel_working;
 198                 break;
 199         case RADEON_INFO_CRTC_FROM_ID:
 200                 for (i = 0, found = 0; i < rdev->num_crtc; i++) {
 201                         crtc = (struct drm_crtc *)minfo->crtcs[i];
 202                         if (crtc && crtc->base.id == value) {
 203                                 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
 204                                 value = radeon_crtc->crtc_id;
 205                                 found = 1;
 206                                 break;
 207                         }
 208                 }
 209                 if (!found) {
 210                         DRM_DEBUG_KMS("unknown crtc id %d\n", value);
 211                         return -EINVAL;
 212                 }
 213                 break;
 214         case RADEON_INFO_ACCEL_WORKING2:
 215                 value = rdev->accel_working;
 216                 break;
 217         case RADEON_INFO_TILING_CONFIG:
 218                 if (rdev->family >= CHIP_TAHITI)
 219                         value = rdev->config.si.tile_config;
 220                 else if (rdev->family >= CHIP_CAYMAN)
 221                         value = rdev->config.cayman.tile_config;
 222                 else if (rdev->family >= CHIP_CEDAR)
 223                         value = rdev->config.evergreen.tile_config;
 224                 else if (rdev->family >= CHIP_RV770)
 225                         value = rdev->config.rv770.tile_config;
 226                 else if (rdev->family >= CHIP_R600)
 227                         value = rdev->config.r600.tile_config;
 228                 else {
 229                         DRM_DEBUG_KMS("tiling config is r6xx+ only!\n");
 230                         return -EINVAL;
 231                 }
 232                 break;
 233         case RADEON_INFO_WANT_HYPERZ:
 234                 /* The "value" here is both an input and output parameter.
 235                  * If the input value is 1, filp requests hyper-z access.
 236                  * If the input value is 0, filp revokes its hyper-z access.
 237                  *
 238                  * When returning, the value is 1 if filp owns hyper-z access,
 239                  * 0 otherwise. */
 240                 if (value >= 2) {
 241                         DRM_DEBUG_KMS("WANT_HYPERZ: invalid value %d\n", value);
 242                         return -EINVAL;
 243                 }
 244                 radeon_set_filp_rights(dev, &rdev->hyperz_filp, filp, &value);
 245                 break;
 246         case RADEON_INFO_WANT_CMASK:
 247                 /* The same logic as Hyper-Z. */
 248                 if (value >= 2) {
 249                         DRM_DEBUG_KMS("WANT_CMASK: invalid value %d\n", value);
 250                         return -EINVAL;
 251                 }
 252                 radeon_set_filp_rights(dev, &rdev->cmask_filp, filp, &value);
 253                 break;
 254         case RADEON_INFO_CLOCK_CRYSTAL_FREQ:
 255                 /* return clock value in KHz */
 256                 value = rdev->clock.spll.reference_freq * 10;
 257                 break;
 258         case RADEON_INFO_NUM_BACKENDS:
 259                 if (rdev->family >= CHIP_TAHITI)
 260                         value = rdev->config.si.max_backends_per_se *
 261                                 rdev->config.si.max_shader_engines;
 262                 else if (rdev->family >= CHIP_CAYMAN)
 263                         value = rdev->config.cayman.max_backends_per_se *
 264                                 rdev->config.cayman.max_shader_engines;
 265                 else if (rdev->family >= CHIP_CEDAR)
 266                         value = rdev->config.evergreen.max_backends;
 267                 else if (rdev->family >= CHIP_RV770)
 268                         value = rdev->config.rv770.max_backends;
 269                 else if (rdev->family >= CHIP_R600)
 270                         value = rdev->config.r600.max_backends;
 271                 else {
 272                         return -EINVAL;
 273                 }
 274                 break;
 275         case RADEON_INFO_NUM_TILE_PIPES:
 276                 if (rdev->family >= CHIP_TAHITI)
 277                         value = rdev->config.si.max_tile_pipes;
 278                 else if (rdev->family >= CHIP_CAYMAN)
 279                         value = rdev->config.cayman.max_tile_pipes;
 280                 else if (rdev->family >= CHIP_CEDAR)
 281                         value = rdev->config.evergreen.max_tile_pipes;
 282                 else if (rdev->family >= CHIP_RV770)
 283                         value = rdev->config.rv770.max_tile_pipes;
 284                 else if (rdev->family >= CHIP_R600)
 285                         value = rdev->config.r600.max_tile_pipes;
 286                 else {
 287                         return -EINVAL;
 288                 }
 289                 break;
 290         case RADEON_INFO_FUSION_GART_WORKING:
 291                 value = 1;
 292                 break;
 293         case RADEON_INFO_BACKEND_MAP:
 294                 if (rdev->family >= CHIP_TAHITI)
 295                         value = rdev->config.si.backend_map;
 296                 else if (rdev->family >= CHIP_CAYMAN)
 297                         value = rdev->config.cayman.backend_map;
 298                 else if (rdev->family >= CHIP_CEDAR)
 299                         value = rdev->config.evergreen.backend_map;
 300                 else if (rdev->family >= CHIP_RV770)
 301                         value = rdev->config.rv770.backend_map;
 302                 else if (rdev->family >= CHIP_R600)
 303                         value = rdev->config.r600.backend_map;
 304                 else {
 305                         return -EINVAL;
 306                 }
 307                 break;
 308         case RADEON_INFO_VA_START:
 309                 /* this is where we report if vm is supported or not */
 310                 if (rdev->family < CHIP_CAYMAN)
 311                         return -EINVAL;
 312                 value = RADEON_VA_RESERVED_SIZE;
 313                 break;
 314         case RADEON_INFO_IB_VM_MAX_SIZE:
 315                 /* this is where we report if vm is supported or not */
 316                 if (rdev->family < CHIP_CAYMAN)
 317                         return -EINVAL;
 318                 value = RADEON_IB_VM_MAX_SIZE;
 319                 break;
 320         case RADEON_INFO_MAX_PIPES:
 321                 if (rdev->family >= CHIP_TAHITI)
 322                         value = rdev->config.si.max_cu_per_sh;
 323                 else if (rdev->family >= CHIP_CAYMAN)
 324                         value = rdev->config.cayman.max_pipes_per_simd;
 325                 else if (rdev->family >= CHIP_CEDAR)
 326                         value = rdev->config.evergreen.max_pipes;
 327                 else if (rdev->family >= CHIP_RV770)
 328                         value = rdev->config.rv770.max_pipes;
 329                 else if (rdev->family >= CHIP_R600)
 330                         value = rdev->config.r600.max_pipes;
 331                 else {
 332                         return -EINVAL;
 333                 }
 334                 break;
 335         default:
 336                 DRM_DEBUG_KMS("Invalid request %d\n", info->request);
 337                 return -EINVAL;
 338         }
 339         if (DRM_COPY_TO_USER(value_ptr, &value, sizeof(uint32_t))) {
 340                 DRM_ERROR("copy_to_user\n");
 341                 return -EFAULT;
 342         }
 343         return 0;
 344 }
 345
 346
 347 /*
 348  * Outdated mess for old drm with Xorg being in charge (void function now).
 349  */
 350 /**
 351  * radeon_driver_firstopen_kms - drm callback for first open
 352  *
 353  * @dev: drm dev pointer
 354  *
 355  * Nothing to be done for KMS (all asics).
 356  * Returns 0 on success.
 357  */
 358 int radeon_driver_firstopen_kms(struct drm_device *dev)
 359 {
 360         return 0;
 361 }
 362
 363 /**
 364  * radeon_driver_firstopen_kms - drm callback for last close
 365  *
 366  * @dev: drm dev pointer
 367  *
 368  * Switch vga switcheroo state after last close (all asics).
 369  */
 370 void radeon_driver_lastclose_kms(struct drm_device *dev)
 371 {
 372         vga_switcheroo_process_delayed_switch();
 373 }
 374
 375 /**
 376  * radeon_driver_open_kms - drm callback for open
 377  *
 378  * @dev: drm dev pointer
 379  * @file_priv: drm file
 380  *
 381  * On device open, init vm on cayman+ (all asics).
 382  * Returns 0 on success, error on failure.
 383  */
 384 int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv)
 385 {
 386         struct radeon_device *rdev = dev->dev_private;
 387
 388         file_priv->driver_priv = NULL;
 389
 390         /* new gpu have virtual address space support */
 391         if (rdev->family >= CHIP_CAYMAN) {
 392                 struct radeon_fpriv *fpriv;
 393                 int r;
 394
 395                 fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
 396                 if (unlikely(!fpriv)) {
 397                         return -ENOMEM;
 398                 }
 399
 400                 r = radeon_vm_init(rdev, &fpriv->vm);
 401                 if (r) {
 402                         radeon_vm_fini(rdev, &fpriv->vm);
 403                         kfree(fpriv);
 404                         return r;
 405                 }
 406
 407                 file_priv->driver_priv = fpriv;
 408         }
 409         return 0;
 410 }
 411
 412 /**
 413  * radeon_driver_postclose_kms - drm callback for post close
 414  *
 415  * @dev: drm dev pointer
 416  * @file_priv: drm file
 417  *
 418  * On device post close, tear down vm on cayman+ (all asics).
 419  */
 420 void radeon_driver_postclose_kms(struct drm_device *dev,
 421                                  struct drm_file *file_priv)
 422 {
 423         struct radeon_device *rdev = dev->dev_private;
 424
 425         /* new gpu have virtual address space support */
 426         if (rdev->family >= CHIP_CAYMAN && file_priv->driver_priv) {
 427                 struct radeon_fpriv *fpriv = file_priv->driver_priv;
 428
 429                 radeon_vm_fini(rdev, &fpriv->vm);
 430                 kfree(fpriv);
 431                 file_priv->driver_priv = NULL;
 432         }
 433 }
 434
 435 /**
 436  * radeon_driver_preclose_kms - drm callback for pre close
 437  *
 438  * @dev: drm dev pointer
 439  * @file_priv: drm file
 440  *
 441  * On device pre close, tear down hyperz and cmask filps on r1xx-r5xx
 442  * (all asics).
 443  */
 444 void radeon_driver_preclose_kms(struct drm_device *dev,
 445                                 struct drm_file *file_priv)
 446 {
 447         struct radeon_device *rdev = dev->dev_private;
 448         if (rdev->hyperz_filp == file_priv)
 449                 rdev->hyperz_filp = NULL;
 450         if (rdev->cmask_filp == file_priv)
 451                 rdev->cmask_filp = NULL;
 452 }
 453
 454 /*
 455  * VBlank related functions.
 456  */
 457 /**
 458  * radeon_get_vblank_counter_kms - get frame count
 459  *
 460  * @dev: drm dev pointer
 461  * @crtc: crtc to get the frame count from
 462  *
 463  * Gets the frame count on the requested crtc (all asics).
 464  * Returns frame count on success, -EINVAL on failure.
 465  */
 466 u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc)
 467 {
 468         struct radeon_device *rdev = dev->dev_private;
 469
 470         if (crtc < 0 || crtc >= rdev->num_crtc) {
 471                 DRM_ERROR("Invalid crtc %d\n", crtc);
 472                 return -EINVAL;
 473         }
 474
 475         return radeon_get_vblank_counter(rdev, crtc);
 476 }
 477
 478 /**
 479  * radeon_enable_vblank_kms - enable vblank interrupt
 480  *
 481  * @dev: drm dev pointer
 482  * @crtc: crtc to enable vblank interrupt for
 483  *
 484  * Enable the interrupt on the requested crtc (all asics).
 485  * Returns 0 on success, -EINVAL on failure.
 486  */
 487 int radeon_enable_vblank_kms(struct drm_device *dev, int crtc)
 488 {
 489         struct radeon_device *rdev = dev->dev_private;
 490         unsigned long irqflags;
 491         int r;
 492
 493         if (crtc < 0 || crtc >= rdev->num_crtc) {
 494                 DRM_ERROR("Invalid crtc %d\n", crtc);
 495                 return -EINVAL;
 496         }
 497
 498         spin_lock_irqsave(&rdev->irq.lock, irqflags);
 499         rdev->irq.crtc_vblank_int[crtc] = true;
 500         r = radeon_irq_set(rdev);
 501         spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 502         return r;
 503 }
 504
 505 /**
 506  * radeon_disable_vblank_kms - disable vblank interrupt
 507  *
 508  * @dev: drm dev pointer
 509  * @crtc: crtc to disable vblank interrupt for
 510  *
 511  * Disable the interrupt on the requested crtc (all asics).
 512  */
 513 void radeon_disable_vblank_kms(struct drm_device *dev, int crtc)
 514 {
 515         struct radeon_device *rdev = dev->dev_private;
 516         unsigned long irqflags;
 517
 518         if (crtc < 0 || crtc >= rdev->num_crtc) {
 519                 DRM_ERROR("Invalid crtc %d\n", crtc);
 520                 return;
 521         }
 522
 523         spin_lock_irqsave(&rdev->irq.lock, irqflags);
 524         rdev->irq.crtc_vblank_int[crtc] = false;
 525         radeon_irq_set(rdev);
 526         spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 527 }
 528
 529 /**
 530  * radeon_get_vblank_timestamp_kms - get vblank timestamp
 531  *
 532  * @dev: drm dev pointer
 533  * @crtc: crtc to get the timestamp for
 534  * @max_error: max error
 535  * @vblank_time: time value
 536  * @flags: flags passed to the driver
 537  *
 538  * Gets the timestamp on the requested crtc based on the
 539  * scanout position.  (all asics).
 540  * Returns postive status flags on success, negative error on failure.
 541  */
 542 int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc,
 543                                     int *max_error,
 544                                     struct timeval *vblank_time,
 545                                     unsigned flags)
 546 {
 547         struct drm_crtc *drmcrtc;
 548         struct radeon_device *rdev = dev->dev_private;
 549
 550         if (crtc < 0 || crtc >= dev->num_crtcs) {
 551                 DRM_ERROR("Invalid crtc %d\n", crtc);
 552                 return -EINVAL;
 553         }
 554
 555         /* Get associated drm_crtc: */
 556         drmcrtc = &rdev->mode_info.crtcs[crtc]->base;
 557
 558         /* Helper routine in DRM core does all the work: */
 559         return drm_calc_vbltimestamp_from_scanoutpos(dev, crtc, max_error,
 560                                                      vblank_time, flags,
 561                                                      drmcrtc);
 562 }
 563
 564 /*
 565  * IOCTL.
 566  */
 567 int radeon_dma_ioctl_kms(struct drm_device *dev, void *data,
 568                          struct drm_file *file_priv)
 569 {
 570         /* Not valid in KMS. */
 571         return -EINVAL;
 572 }
 573
 574 #define KMS_INVALID_IOCTL(name)                                         \
 575 int name(struct drm_device *dev, void *data, struct drm_file *file_priv)\
 576 {                                                                       \
 577         DRM_ERROR("invalid ioctl with kms %s\n", __func__);             \
 578         return -EINVAL;                                                 \
 579 }
 580
 581 /*
 582  * All these ioctls are invalid in kms world.
 583  */
 584 KMS_INVALID_IOCTL(radeon_cp_init_kms)
 585 KMS_INVALID_IOCTL(radeon_cp_start_kms)
 586 KMS_INVALID_IOCTL(radeon_cp_stop_kms)
 587 KMS_INVALID_IOCTL(radeon_cp_reset_kms)
 588 KMS_INVALID_IOCTL(radeon_cp_idle_kms)
 589 KMS_INVALID_IOCTL(radeon_cp_resume_kms)
 590 KMS_INVALID_IOCTL(radeon_engine_reset_kms)
 591 KMS_INVALID_IOCTL(radeon_fullscreen_kms)
 592 KMS_INVALID_IOCTL(radeon_cp_swap_kms)
 593 KMS_INVALID_IOCTL(radeon_cp_clear_kms)
 594 KMS_INVALID_IOCTL(radeon_cp_vertex_kms)
 595 KMS_INVALID_IOCTL(radeon_cp_indices_kms)
 596 KMS_INVALID_IOCTL(radeon_cp_texture_kms)
 597 KMS_INVALID_IOCTL(radeon_cp_stipple_kms)
 598 KMS_INVALID_IOCTL(radeon_cp_indirect_kms)
 599 KMS_INVALID_IOCTL(radeon_cp_vertex2_kms)
 600 KMS_INVALID_IOCTL(radeon_cp_cmdbuf_kms)
 601 KMS_INVALID_IOCTL(radeon_cp_getparam_kms)
 602 KMS_INVALID_IOCTL(radeon_cp_flip_kms)
 603 KMS_INVALID_IOCTL(radeon_mem_alloc_kms)
 604 KMS_INVALID_IOCTL(radeon_mem_free_kms)
 605 KMS_INVALID_IOCTL(radeon_mem_init_heap_kms)
 606 KMS_INVALID_IOCTL(radeon_irq_emit_kms)
 607 KMS_INVALID_IOCTL(radeon_irq_wait_kms)
 608 KMS_INVALID_IOCTL(radeon_cp_setparam_kms)
 609 KMS_INVALID_IOCTL(radeon_surface_alloc_kms)
 610 KMS_INVALID_IOCTL(radeon_surface_free_kms)
 611
 612
 613 struct drm_ioctl_desc radeon_ioctls_kms[] = {
 614         DRM_IOCTL_DEF_DRV(RADEON_CP_INIT, radeon_cp_init_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
 615         DRM_IOCTL_DEF_DRV(RADEON_CP_START, radeon_cp_start_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
 616         DRM_IOCTL_DEF_DRV(RADEON_CP_STOP, radeon_cp_stop_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
 617         DRM_IOCTL_DEF_DRV(RADEON_CP_RESET, radeon_cp_reset_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
 618         DRM_IOCTL_DEF_DRV(RADEON_CP_IDLE, radeon_cp_idle_kms, DRM_AUTH),
 619         DRM_IOCTL_DEF_DRV(RADEON_CP_RESUME, radeon_cp_resume_kms, DRM_AUTH),
 620         DRM_IOCTL_DEF_DRV(RADEON_RESET, radeon_engine_reset_kms, DRM_AUTH),
 621         DRM_IOCTL_DEF_DRV(RADEON_FULLSCREEN, radeon_fullscreen_kms, DRM_AUTH),
 622         DRM_IOCTL_DEF_DRV(RADEON_SWAP, radeon_cp_swap_kms, DRM_AUTH),
 623         DRM_IOCTL_DEF_DRV(RADEON_CLEAR, radeon_cp_clear_kms, DRM_AUTH),
 624         DRM_IOCTL_DEF_DRV(RADEON_VERTEX, radeon_cp_vertex_kms, DRM_AUTH),
 625         DRM_IOCTL_DEF_DRV(RADEON_INDICES, radeon_cp_indices_kms, DRM_AUTH),
 626         DRM_IOCTL_DEF_DRV(RADEON_TEXTURE, radeon_cp_texture_kms, DRM_AUTH),
 627         DRM_IOCTL_DEF_DRV(RADEON_STIPPLE, radeon_cp_stipple_kms, DRM_AUTH),
 628         DRM_IOCTL_DEF_DRV(RADEON_INDIRECT, radeon_cp_indirect_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
 629         DRM_IOCTL_DEF_DRV(RADEON_VERTEX2, radeon_cp_vertex2_kms, DRM_AUTH),
 630         DRM_IOCTL_DEF_DRV(RADEON_CMDBUF, radeon_cp_cmdbuf_kms, DRM_AUTH),
 631         DRM_IOCTL_DEF_DRV(RADEON_GETPARAM, radeon_cp_getparam_kms, DRM_AUTH),
 632         DRM_IOCTL_DEF_DRV(RADEON_FLIP, radeon_cp_flip_kms, DRM_AUTH),
 633         DRM_IOCTL_DEF_DRV(RADEON_ALLOC, radeon_mem_alloc_kms, DRM_AUTH),
 634         DRM_IOCTL_DEF_DRV(RADEON_FREE, radeon_mem_free_kms, DRM_AUTH),
 635         DRM_IOCTL_DEF_DRV(RADEON_INIT_HEAP, radeon_mem_init_heap_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
 636         DRM_IOCTL_DEF_DRV(RADEON_IRQ_EMIT, radeon_irq_emit_kms, DRM_AUTH),
 637         DRM_IOCTL_DEF_DRV(RADEON_IRQ_WAIT, radeon_irq_wait_kms, DRM_AUTH),
 638         DRM_IOCTL_DEF_DRV(RADEON_SETPARAM, radeon_cp_setparam_kms, DRM_AUTH),
 639         DRM_IOCTL_DEF_DRV(RADEON_SURF_ALLOC, radeon_surface_alloc_kms, DRM_AUTH),
 640         DRM_IOCTL_DEF_DRV(RADEON_SURF_FREE, radeon_surface_free_kms, DRM_AUTH),
 641         /* KMS */
 642         DRM_IOCTL_DEF_DRV(RADEON_GEM_INFO, radeon_gem_info_ioctl, DRM_AUTH|DRM_UNLOCKED),
 643         DRM_IOCTL_DEF_DRV(RADEON_GEM_CREATE, radeon_gem_create_ioctl, DRM_AUTH|DRM_UNLOCKED),
 644         DRM_IOCTL_DEF_DRV(RADEON_GEM_MMAP, radeon_gem_mmap_ioctl, DRM_AUTH|DRM_UNLOCKED),
 645         DRM_IOCTL_DEF_DRV(RADEON_GEM_SET_DOMAIN, radeon_gem_set_domain_ioctl, DRM_AUTH|DRM_UNLOCKED),
 646         DRM_IOCTL_DEF_DRV(RADEON_GEM_PREAD, radeon_gem_pread_ioctl, DRM_AUTH|DRM_UNLOCKED),
 647         DRM_IOCTL_DEF_DRV(RADEON_GEM_PWRITE, radeon_gem_pwrite_ioctl, DRM_AUTH|DRM_UNLOCKED),
 648         DRM_IOCTL_DEF_DRV(RADEON_GEM_WAIT_IDLE, radeon_gem_wait_idle_ioctl, DRM_AUTH|DRM_UNLOCKED),
 649         DRM_IOCTL_DEF_DRV(RADEON_CS, radeon_cs_ioctl, DRM_AUTH|DRM_UNLOCKED),
 650         DRM_IOCTL_DEF_DRV(RADEON_INFO, radeon_info_ioctl, DRM_AUTH|DRM_UNLOCKED),
 651         DRM_IOCTL_DEF_DRV(RADEON_GEM_SET_TILING, radeon_gem_set_tiling_ioctl, DRM_AUTH|DRM_UNLOCKED),
 652         DRM_IOCTL_DEF_DRV(RADEON_GEM_GET_TILING, radeon_gem_get_tiling_ioctl, DRM_AUTH|DRM_UNLOCKED),
 653         DRM_IOCTL_DEF_DRV(RADEON_GEM_BUSY, radeon_gem_busy_ioctl, DRM_AUTH|DRM_UNLOCKED),
 654         DRM_IOCTL_DEF_DRV(RADEON_GEM_VA, radeon_gem_va_ioctl, DRM_AUTH|DRM_UNLOCKED),
 655 };
 656 int radeon_max_kms_ioctl = DRM_ARRAY_SIZE(radeon_ioctls_kms);