drivers/gpu/drm/i915/intel_lvds.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  *      Dave Airlie <airlied@linux.ie>
  27  *      Jesse Barnes <jesse.barnes@intel.com>
  28  */
  29
  30 #include <acpi/button.h>
  31 #include <linux/dmi.h>
  32 #include <linux/i2c.h>
  33 #include "drmP.h"
  34 #include "drm.h"
  35 #include "drm_crtc.h"
  36 #include "drm_edid.h"
  37 #include "intel_drv.h"
  38 #include "i915_drm.h"
  39 #include "i915_drv.h"
  40 #include <linux/acpi.h>
  41
  42 /* Private structure for the integrated LVDS support */
  43 struct intel_lvds_priv {
  44         int fitting_mode;
  45         u32 pfit_control;
  46         u32 pfit_pgm_ratios;
  47 };
  48
  49 /**
  50  * Sets the backlight level.
  51  *
  52  * \param level backlight level, from 0 to intel_lvds_get_max_backlight().
  53  */
  54 static void intel_lvds_set_backlight(struct drm_device *dev, int level)
  55 {
  56         struct drm_i915_private *dev_priv = dev->dev_private;
  57         u32 blc_pwm_ctl, reg;
  58
  59         if (IS_IRONLAKE(dev))
  60                 reg = BLC_PWM_CPU_CTL;
  61         else
  62                 reg = BLC_PWM_CTL;
  63
  64         blc_pwm_ctl = I915_READ(reg) & ~BACKLIGHT_DUTY_CYCLE_MASK;
  65         I915_WRITE(reg, (blc_pwm_ctl |
  66                                  (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
  67 }
  68
  69 /**
  70  * Returns the maximum level of the backlight duty cycle field.
  71  */
  72 static u32 intel_lvds_get_max_backlight(struct drm_device *dev)
  73 {
  74         struct drm_i915_private *dev_priv = dev->dev_private;
  75         u32 reg;
  76
  77         if (IS_IRONLAKE(dev))
  78                 reg = BLC_PWM_PCH_CTL2;
  79         else
  80                 reg = BLC_PWM_CTL;
  81
  82         return ((I915_READ(reg) & BACKLIGHT_MODULATION_FREQ_MASK) >>
  83                 BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
  84 }
  85
  86 /**
  87  * Sets the power state for the panel.
  88  */
  89 static void intel_lvds_set_power(struct drm_device *dev, bool on)
  90 {
  91         struct drm_i915_private *dev_priv = dev->dev_private;
  92         u32 pp_status, ctl_reg, status_reg;
  93
  94         if (IS_IRONLAKE(dev)) {
  95                 ctl_reg = PCH_PP_CONTROL;
  96                 status_reg = PCH_PP_STATUS;
  97         } else {
  98                 ctl_reg = PP_CONTROL;
  99                 status_reg = PP_STATUS;
 100         }
 101
 102         if (on) {
 103                 I915_WRITE(ctl_reg, I915_READ(ctl_reg) |
 104                            POWER_TARGET_ON);
 105                 do {
 106                         pp_status = I915_READ(status_reg);
 107                 } while ((pp_status & PP_ON) == 0);
 108
 109                 intel_lvds_set_backlight(dev, dev_priv->backlight_duty_cycle);
 110         } else {
 111                 intel_lvds_set_backlight(dev, 0);
 112
 113                 I915_WRITE(ctl_reg, I915_READ(ctl_reg) &
 114                            ~POWER_TARGET_ON);
 115                 do {
 116                         pp_status = I915_READ(status_reg);
 117                 } while (pp_status & PP_ON);
 118         }
 119 }
 120
 121 static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
 122 {
 123         struct drm_device *dev = encoder->dev;
 124
 125         if (mode == DRM_MODE_DPMS_ON)
 126                 intel_lvds_set_power(dev, true);
 127         else
 128                 intel_lvds_set_power(dev, false);
 129
 130         /* XXX: We never power down the LVDS pairs. */
 131 }
 132
 133 static void intel_lvds_save(struct drm_connector *connector)
 134 {
 135         struct drm_device *dev = connector->dev;
 136         struct drm_i915_private *dev_priv = dev->dev_private;
 137         u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg;
 138         u32 pwm_ctl_reg;
 139
 140         if (IS_IRONLAKE(dev)) {
 141                 pp_on_reg = PCH_PP_ON_DELAYS;
 142                 pp_off_reg = PCH_PP_OFF_DELAYS;
 143                 pp_ctl_reg = PCH_PP_CONTROL;
 144                 pp_div_reg = PCH_PP_DIVISOR;
 145                 pwm_ctl_reg = BLC_PWM_CPU_CTL;
 146         } else {
 147                 pp_on_reg = PP_ON_DELAYS;
 148                 pp_off_reg = PP_OFF_DELAYS;
 149                 pp_ctl_reg = PP_CONTROL;
 150                 pp_div_reg = PP_DIVISOR;
 151                 pwm_ctl_reg = BLC_PWM_CTL;
 152         }
 153
 154         dev_priv->savePP_ON = I915_READ(pp_on_reg);
 155         dev_priv->savePP_OFF = I915_READ(pp_off_reg);
 156         dev_priv->savePP_CONTROL = I915_READ(pp_ctl_reg);
 157         dev_priv->savePP_DIVISOR = I915_READ(pp_div_reg);
 158         dev_priv->saveBLC_PWM_CTL = I915_READ(pwm_ctl_reg);
 159         dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL &
 160                                        BACKLIGHT_DUTY_CYCLE_MASK);
 161
 162         /*
 163          * If the light is off at server startup, just make it full brightness
 164          */
 165         if (dev_priv->backlight_duty_cycle == 0)
 166                 dev_priv->backlight_duty_cycle =
 167                         intel_lvds_get_max_backlight(dev);
 168 }
 169
 170 static void intel_lvds_restore(struct drm_connector *connector)
 171 {
 172         struct drm_device *dev = connector->dev;
 173         struct drm_i915_private *dev_priv = dev->dev_private;
 174         u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg;
 175         u32 pwm_ctl_reg;
 176
 177         if (IS_IRONLAKE(dev)) {
 178                 pp_on_reg = PCH_PP_ON_DELAYS;
 179                 pp_off_reg = PCH_PP_OFF_DELAYS;
 180                 pp_ctl_reg = PCH_PP_CONTROL;
 181                 pp_div_reg = PCH_PP_DIVISOR;
 182                 pwm_ctl_reg = BLC_PWM_CPU_CTL;
 183         } else {
 184                 pp_on_reg = PP_ON_DELAYS;
 185                 pp_off_reg = PP_OFF_DELAYS;
 186                 pp_ctl_reg = PP_CONTROL;
 187                 pp_div_reg = PP_DIVISOR;
 188                 pwm_ctl_reg = BLC_PWM_CTL;
 189         }
 190
 191         I915_WRITE(pwm_ctl_reg, dev_priv->saveBLC_PWM_CTL);
 192         I915_WRITE(pp_on_reg, dev_priv->savePP_ON);
 193         I915_WRITE(pp_off_reg, dev_priv->savePP_OFF);
 194         I915_WRITE(pp_div_reg, dev_priv->savePP_DIVISOR);
 195         I915_WRITE(pp_ctl_reg, dev_priv->savePP_CONTROL);
 196         if (dev_priv->savePP_CONTROL & POWER_TARGET_ON)
 197                 intel_lvds_set_power(dev, true);
 198         else
 199                 intel_lvds_set_power(dev, false);
 200 }
 201
 202 static int intel_lvds_mode_valid(struct drm_connector *connector,
 203                                  struct drm_display_mode *mode)
 204 {
 205         struct drm_device *dev = connector->dev;
 206         struct drm_i915_private *dev_priv = dev->dev_private;
 207         struct drm_display_mode *fixed_mode = dev_priv->panel_fixed_mode;
 208
 209         if (fixed_mode) {
 210                 if (mode->hdisplay > fixed_mode->hdisplay)
 211                         return MODE_PANEL;
 212                 if (mode->vdisplay > fixed_mode->vdisplay)
 213                         return MODE_PANEL;
 214         }
 215
 216         return MODE_OK;
 217 }
 218
 219 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
 220                                   struct drm_display_mode *mode,
 221                                   struct drm_display_mode *adjusted_mode)
 222 {
 223         /*
 224          * float point operation is not supported . So the PANEL_RATIO_FACTOR
 225          * is defined, which can avoid the float point computation when
 226          * calculating the panel ratio.
 227          */
 228 #define PANEL_RATIO_FACTOR 8192
 229         struct drm_device *dev = encoder->dev;
 230         struct drm_i915_private *dev_priv = dev->dev_private;
 231         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
 232         struct drm_encoder *tmp_encoder;
 233         struct intel_output *intel_output = enc_to_intel_output(encoder);
 234         struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
 235         u32 pfit_control = 0, pfit_pgm_ratios = 0;
 236         int left_border = 0, right_border = 0, top_border = 0;
 237         int bottom_border = 0;
 238         bool border = 0;
 239         int panel_ratio, desired_ratio, vert_scale, horiz_scale;
 240         int horiz_ratio, vert_ratio;
 241         u32 hsync_width, vsync_width;
 242         u32 hblank_width, vblank_width;
 243         u32 hsync_pos, vsync_pos;
 244
 245         /* Should never happen!! */
 246         if (!IS_I965G(dev) && intel_crtc->pipe == 0) {
 247                 DRM_ERROR("Can't support LVDS on pipe A\n");
 248                 return false;
 249         }
 250
 251         /* Should never happen!! */
 252         list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
 253                 if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
 254                         DRM_ERROR("Can't enable LVDS and another "
 255                                "encoder on the same pipe\n");
 256                         return false;
 257                 }
 258         }
 259         /* If we don't have a panel mode, there is nothing we can do */
 260         if (dev_priv->panel_fixed_mode == NULL)
 261                 return true;
 262         /*
 263          * If we have timings from the BIOS for the panel, put them in
 264          * to the adjusted mode.  The CRTC will be set up for this mode,
 265          * with the panel scaling set up to source from the H/VDisplay
 266          * of the original mode.
 267          */
 268         if (dev_priv->panel_fixed_mode != NULL) {
 269                 adjusted_mode->hdisplay = dev_priv->panel_fixed_mode->hdisplay;
 270                 adjusted_mode->hsync_start =
 271                         dev_priv->panel_fixed_mode->hsync_start;
 272                 adjusted_mode->hsync_end =
 273                         dev_priv->panel_fixed_mode->hsync_end;
 274                 adjusted_mode->htotal = dev_priv->panel_fixed_mode->htotal;
 275                 adjusted_mode->vdisplay = dev_priv->panel_fixed_mode->vdisplay;
 276                 adjusted_mode->vsync_start =
 277                         dev_priv->panel_fixed_mode->vsync_start;
 278                 adjusted_mode->vsync_end =
 279                         dev_priv->panel_fixed_mode->vsync_end;
 280                 adjusted_mode->vtotal = dev_priv->panel_fixed_mode->vtotal;
 281                 adjusted_mode->clock = dev_priv->panel_fixed_mode->clock;
 282                 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
 283         }
 284
 285         /* Make sure pre-965s set dither correctly */
 286         if (!IS_I965G(dev)) {
 287                 if (dev_priv->panel_wants_dither || dev_priv->lvds_dither)
 288                         pfit_control |= PANEL_8TO6_DITHER_ENABLE;
 289         }
 290
 291         /* Native modes don't need fitting */
 292         if (adjusted_mode->hdisplay == mode->hdisplay &&
 293                         adjusted_mode->vdisplay == mode->vdisplay) {
 294                 pfit_pgm_ratios = 0;
 295                 border = 0;
 296                 goto out;
 297         }
 298
 299         /* full screen scale for now */
 300         if (IS_IRONLAKE(dev))
 301                 goto out;
 302
 303         /* 965+ wants fuzzy fitting */
 304         if (IS_I965G(dev))
 305                 pfit_control |= (intel_crtc->pipe << PFIT_PIPE_SHIFT) |
 306                                         PFIT_FILTER_FUZZY;
 307
 308         hsync_width = adjusted_mode->crtc_hsync_end -
 309                                         adjusted_mode->crtc_hsync_start;
 310         vsync_width = adjusted_mode->crtc_vsync_end -
 311                                         adjusted_mode->crtc_vsync_start;
 312         hblank_width = adjusted_mode->crtc_hblank_end -
 313                                         adjusted_mode->crtc_hblank_start;
 314         vblank_width = adjusted_mode->crtc_vblank_end -
 315                                         adjusted_mode->crtc_vblank_start;
 316         /*
 317          * Deal with panel fitting options. Figure out how to stretch the
 318          * image based on its aspect ratio & the current panel fitting mode.
 319          */
 320         panel_ratio = adjusted_mode->hdisplay * PANEL_RATIO_FACTOR /
 321                                 adjusted_mode->vdisplay;
 322         desired_ratio = mode->hdisplay * PANEL_RATIO_FACTOR /
 323                                 mode->vdisplay;
 324         /*
 325          * Enable automatic panel scaling for non-native modes so that they fill
 326          * the screen.  Should be enabled before the pipe is enabled, according
 327          * to register description and PRM.
 328          * Change the value here to see the borders for debugging
 329          */
 330         if (!IS_IRONLAKE(dev)) {
 331                 I915_WRITE(BCLRPAT_A, 0);
 332                 I915_WRITE(BCLRPAT_B, 0);
 333         }
 334
 335         switch (lvds_priv->fitting_mode) {
 336         case DRM_MODE_SCALE_CENTER:
 337                 /*
 338                  * For centered modes, we have to calculate border widths &
 339                  * heights and modify the values programmed into the CRTC.
 340                  */
 341                 left_border = (adjusted_mode->hdisplay - mode->hdisplay) / 2;
 342                 right_border = left_border;
 343                 if (mode->hdisplay & 1)
 344                         right_border++;
 345                 top_border = (adjusted_mode->vdisplay - mode->vdisplay) / 2;
 346                 bottom_border = top_border;
 347                 if (mode->vdisplay & 1)
 348                         bottom_border++;
 349                 /* Set active & border values */
 350                 adjusted_mode->crtc_hdisplay = mode->hdisplay;
 351                 /* Keep the boder be even */
 352                 if (right_border & 1)
 353                         right_border++;
 354                 /* use the border directly instead of border minuse one */
 355                 adjusted_mode->crtc_hblank_start = mode->hdisplay +
 356                                                 right_border;
 357                 /* keep the blank width constant */
 358                 adjusted_mode->crtc_hblank_end =
 359                         adjusted_mode->crtc_hblank_start + hblank_width;
 360                 /* get the hsync pos relative to hblank start */
 361                 hsync_pos = (hblank_width - hsync_width) / 2;
 362                 /* keep the hsync pos be even */
 363                 if (hsync_pos & 1)
 364                         hsync_pos++;
 365                 adjusted_mode->crtc_hsync_start =
 366                                 adjusted_mode->crtc_hblank_start + hsync_pos;
 367                 /* keep the hsync width constant */
 368                 adjusted_mode->crtc_hsync_end =
 369                                 adjusted_mode->crtc_hsync_start + hsync_width;
 370                 adjusted_mode->crtc_vdisplay = mode->vdisplay;
 371                 /* use the border instead of border minus one */
 372                 adjusted_mode->crtc_vblank_start = mode->vdisplay +
 373                                                 bottom_border;
 374                 /* keep the vblank width constant */
 375                 adjusted_mode->crtc_vblank_end =
 376                                 adjusted_mode->crtc_vblank_start + vblank_width;
 377                 /* get the vsync start postion relative to vblank start */
 378                 vsync_pos = (vblank_width - vsync_width) / 2;
 379                 adjusted_mode->crtc_vsync_start =
 380                                 adjusted_mode->crtc_vblank_start + vsync_pos;
 381                 /* keep the vsync width constant */
 382                 adjusted_mode->crtc_vsync_end =
 383                                 adjusted_mode->crtc_vsync_start + vsync_width;
 384                 border = 1;
 385                 break;
 386         case DRM_MODE_SCALE_ASPECT:
 387                 /* Scale but preserve the spect ratio */
 388                 pfit_control |= PFIT_ENABLE;
 389                 if (IS_I965G(dev)) {
 390                         /* 965+ is easy, it does everything in hw */
 391                         if (panel_ratio > desired_ratio)
 392                                 pfit_control |= PFIT_SCALING_PILLAR;
 393                         else if (panel_ratio < desired_ratio)
 394                                 pfit_control |= PFIT_SCALING_LETTER;
 395                         else
 396                                 pfit_control |= PFIT_SCALING_AUTO;
 397                 } else {
 398                         /*
 399                          * For earlier chips we have to calculate the scaling
 400                          * ratio by hand and program it into the
 401                          * PFIT_PGM_RATIO register
 402                          */
 403                         u32 horiz_bits, vert_bits, bits = 12;
 404                         horiz_ratio = mode->hdisplay * PANEL_RATIO_FACTOR/
 405                                                 adjusted_mode->hdisplay;
 406                         vert_ratio = mode->vdisplay * PANEL_RATIO_FACTOR/
 407                                                 adjusted_mode->vdisplay;
 408                         horiz_scale = adjusted_mode->hdisplay *
 409                                         PANEL_RATIO_FACTOR / mode->hdisplay;
 410                         vert_scale = adjusted_mode->vdisplay *
 411                                         PANEL_RATIO_FACTOR / mode->vdisplay;
 412
 413                         /* retain aspect ratio */
 414                         if (panel_ratio > desired_ratio) { /* Pillar */
 415                                 u32 scaled_width;
 416                                 scaled_width = mode->hdisplay * vert_scale /
 417                                                 PANEL_RATIO_FACTOR;
 418                                 horiz_ratio = vert_ratio;
 419                                 pfit_control |= (VERT_AUTO_SCALE |
 420                                                  VERT_INTERP_BILINEAR |
 421                                                  HORIZ_INTERP_BILINEAR);
 422                                 /* Pillar will have left/right borders */
 423                                 left_border = (adjusted_mode->hdisplay -
 424                                                 scaled_width) / 2;
 425                                 right_border = left_border;
 426                                 if (mode->hdisplay & 1) /* odd resolutions */
 427                                         right_border++;
 428                                 /* keep the border be even */
 429                                 if (right_border & 1)
 430                                         right_border++;
 431                                 adjusted_mode->crtc_hdisplay = scaled_width;
 432                                 /* use border instead of border minus one */
 433                                 adjusted_mode->crtc_hblank_start =
 434                                         scaled_width + right_border;
 435                                 /* keep the hblank width constant */
 436                                 adjusted_mode->crtc_hblank_end =
 437                                         adjusted_mode->crtc_hblank_start +
 438                                                         hblank_width;
 439                                 /*
 440                                  * get the hsync start pos relative to
 441                                  * hblank start
 442                                  */
 443                                 hsync_pos = (hblank_width - hsync_width) / 2;
 444                                 /* keep the hsync_pos be even */
 445                                 if (hsync_pos & 1)
 446                                         hsync_pos++;
 447                                 adjusted_mode->crtc_hsync_start =
 448                                         adjusted_mode->crtc_hblank_start +
 449                                                         hsync_pos;
 450                                 /* keept hsync width constant */
 451                                 adjusted_mode->crtc_hsync_end =
 452                                         adjusted_mode->crtc_hsync_start +
 453                                                         hsync_width;
 454                                 border = 1;
 455                         } else if (panel_ratio < desired_ratio) { /* letter */
 456                                 u32 scaled_height = mode->vdisplay *
 457                                         horiz_scale / PANEL_RATIO_FACTOR;
 458                                 vert_ratio = horiz_ratio;
 459                                 pfit_control |= (HORIZ_AUTO_SCALE |
 460                                                  VERT_INTERP_BILINEAR |
 461                                                  HORIZ_INTERP_BILINEAR);
 462                                 /* Letterbox will have top/bottom border */
 463                                 top_border = (adjusted_mode->vdisplay -
 464                                         scaled_height) / 2;
 465                                 bottom_border = top_border;
 466                                 if (mode->vdisplay & 1)
 467                                         bottom_border++;
 468                                 adjusted_mode->crtc_vdisplay = scaled_height;
 469                                 /* use border instead of border minus one */
 470                                 adjusted_mode->crtc_vblank_start =
 471                                         scaled_height + bottom_border;
 472                                 /* keep the vblank width constant */
 473                                 adjusted_mode->crtc_vblank_end =
 474                                         adjusted_mode->crtc_vblank_start +
 475                                                         vblank_width;
 476                                 /*
 477                                  * get the vsync start pos relative to
 478                                  * vblank start
 479                                  */
 480                                 vsync_pos = (vblank_width - vsync_width) / 2;
 481                                 adjusted_mode->crtc_vsync_start =
 482                                         adjusted_mode->crtc_vblank_start +
 483                                                         vsync_pos;
 484                                 /* keep the vsync width constant */
 485                                 adjusted_mode->crtc_vsync_end =
 486                                         adjusted_mode->crtc_vsync_start +
 487                                                         vsync_width;
 488                                 border = 1;
 489                         } else {
 490                         /* Aspects match, Let hw scale both directions */
 491                                 pfit_control |= (VERT_AUTO_SCALE |
 492                                                  HORIZ_AUTO_SCALE |
 493                                                  VERT_INTERP_BILINEAR |
 494                                                  HORIZ_INTERP_BILINEAR);
 495                         }
 496                         horiz_bits = (1 << bits) * horiz_ratio /
 497                                         PANEL_RATIO_FACTOR;
 498                         vert_bits = (1 << bits) * vert_ratio /
 499                                         PANEL_RATIO_FACTOR;
 500                         pfit_pgm_ratios =
 501                                 ((vert_bits << PFIT_VERT_SCALE_SHIFT) &
 502                                                 PFIT_VERT_SCALE_MASK) |
 503                                 ((horiz_bits << PFIT_HORIZ_SCALE_SHIFT) &
 504                                                 PFIT_HORIZ_SCALE_MASK);
 505                 }
 506                 break;
 507
 508         case DRM_MODE_SCALE_FULLSCREEN:
 509                 /*
 510                  * Full scaling, even if it changes the aspect ratio.
 511                  * Fortunately this is all done for us in hw.
 512                  */
 513                 pfit_control |= PFIT_ENABLE;
 514                 if (IS_I965G(dev))
 515                         pfit_control |= PFIT_SCALING_AUTO;
 516                 else
 517                         pfit_control |= (VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
 518                                          VERT_INTERP_BILINEAR |
 519                                          HORIZ_INTERP_BILINEAR);
 520                 break;
 521         default:
 522                 break;
 523         }
 524
 525 out:
 526         lvds_priv->pfit_control = pfit_control;
 527         lvds_priv->pfit_pgm_ratios = pfit_pgm_ratios;
 528         /*
 529          * When there exists the border, it means that the LVDS_BORDR
 530          * should be enabled.
 531          */
 532         if (border)
 533                 dev_priv->lvds_border_bits |= LVDS_BORDER_ENABLE;
 534         else
 535                 dev_priv->lvds_border_bits &= ~(LVDS_BORDER_ENABLE);
 536         /*
 537          * XXX: It would be nice to support lower refresh rates on the
 538          * panels to reduce power consumption, and perhaps match the
 539          * user's requested refresh rate.
 540          */
 541
 542         return true;
 543 }
 544
 545 static void intel_lvds_prepare(struct drm_encoder *encoder)
 546 {
 547         struct drm_device *dev = encoder->dev;
 548         struct drm_i915_private *dev_priv = dev->dev_private;
 549         u32 reg;
 550
 551         if (IS_IRONLAKE(dev))
 552                 reg = BLC_PWM_CPU_CTL;
 553         else
 554                 reg = BLC_PWM_CTL;
 555
 556         dev_priv->saveBLC_PWM_CTL = I915_READ(reg);
 557         dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL &
 558                                        BACKLIGHT_DUTY_CYCLE_MASK);
 559
 560         intel_lvds_set_power(dev, false);
 561 }
 562
 563 static void intel_lvds_commit( struct drm_encoder *encoder)
 564 {
 565         struct drm_device *dev = encoder->dev;
 566         struct drm_i915_private *dev_priv = dev->dev_private;
 567
 568         if (dev_priv->backlight_duty_cycle == 0)
 569                 dev_priv->backlight_duty_cycle =
 570                         intel_lvds_get_max_backlight(dev);
 571
 572         intel_lvds_set_power(dev, true);
 573 }
 574
 575 static void intel_lvds_mode_set(struct drm_encoder *encoder,
 576                                 struct drm_display_mode *mode,
 577                                 struct drm_display_mode *adjusted_mode)
 578 {
 579         struct drm_device *dev = encoder->dev;
 580         struct drm_i915_private *dev_priv = dev->dev_private;
 581         struct intel_output *intel_output = enc_to_intel_output(encoder);
 582         struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
 583
 584         /*
 585          * The LVDS pin pair will already have been turned on in the
 586          * intel_crtc_mode_set since it has a large impact on the DPLL
 587          * settings.
 588          */
 589
 590         if (IS_IRONLAKE(dev))
 591                 return;
 592
 593         /*
 594          * Enable automatic panel scaling so that non-native modes fill the
 595          * screen.  Should be enabled before the pipe is enabled, according to
 596          * register description and PRM.
 597          */
 598         I915_WRITE(PFIT_PGM_RATIOS, lvds_priv->pfit_pgm_ratios);
 599         I915_WRITE(PFIT_CONTROL, lvds_priv->pfit_control);
 600 }
 601
 602 /* Some lid devices report incorrect lid status, assume they're connected */
 603 static const struct dmi_system_id bad_lid_status[] = {
 604         {
 605                 .ident = "Compaq nx9020",
 606                 .matches = {
 607                         DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
 608                         DMI_MATCH(DMI_BOARD_NAME, "3084"),
 609                 },
 610         },
 611         {
 612                 .ident = "Samsung SX20S",
 613                 .matches = {
 614                         DMI_MATCH(DMI_SYS_VENDOR, "Samsung Electronics"),
 615                         DMI_MATCH(DMI_BOARD_NAME, "SX20S"),
 616                 },
 617         },
 618         {
 619                 .ident = "Aspire One",
 620                 .matches = {
 621                         DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
 622                         DMI_MATCH(DMI_PRODUCT_NAME, "Aspire one"),
 623                 },
 624         },
 625         {
 626                 .ident = "Aspire 1810T",
 627                 .matches = {
 628                         DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
 629                         DMI_MATCH(DMI_PRODUCT_NAME, "Aspire 1810T"),
 630                 },
 631         },
 632         {
 633                 .ident = "PC-81005",
 634                 .matches = {
 635                         DMI_MATCH(DMI_SYS_VENDOR, "MALATA"),
 636                         DMI_MATCH(DMI_PRODUCT_NAME, "PC-81005"),
 637                 },
 638         },
 639         {
 640                 .ident = "Clevo M5x0N",
 641                 .matches = {
 642                         DMI_MATCH(DMI_SYS_VENDOR, "CLEVO Co."),
 643                         DMI_MATCH(DMI_BOARD_NAME, "M5x0N"),
 644                 },
 645         },
 646         { }
 647 };
 648
 649 /**
 650  * Detect the LVDS connection.
 651  *
 652  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
 653  * connected and closed means disconnected.  We also send hotplug events as
 654  * needed, using lid status notification from the input layer.
 655  */
 656 static enum drm_connector_status intel_lvds_detect(struct drm_connector *connector)
 657 {
 658         enum drm_connector_status status = connector_status_connected;
 659
 660         if (!dmi_check_system(bad_lid_status) && !acpi_lid_open())
 661                 status = connector_status_disconnected;
 662
 663         return status;
 664 }
 665
 666 /**
 667  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
 668  */
 669 static int intel_lvds_get_modes(struct drm_connector *connector)
 670 {
 671         struct drm_device *dev = connector->dev;
 672         struct intel_output *intel_output = to_intel_output(connector);
 673         struct drm_i915_private *dev_priv = dev->dev_private;
 674         int ret = 0;
 675
 676         ret = intel_ddc_get_modes(intel_output);
 677
 678         if (ret)
 679                 return ret;
 680
 681         /* Didn't get an EDID, so
 682          * Set wide sync ranges so we get all modes
 683          * handed to valid_mode for checking
 684          */
 685         connector->display_info.min_vfreq = 0;
 686         connector->display_info.max_vfreq = 200;
 687         connector->display_info.min_hfreq = 0;
 688         connector->display_info.max_hfreq = 200;
 689
 690         if (dev_priv->panel_fixed_mode != NULL) {
 691                 struct drm_display_mode *mode;
 692
 693                 mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode);
 694                 drm_mode_probed_add(connector, mode);
 695
 696                 return 1;
 697         }
 698
 699         return 0;
 700 }
 701
 702 /*
 703  * Lid events. Note the use of 'modeset_on_lid':
 704  *  - we set it on lid close, and reset it on open
 705  *  - we use it as a "only once" bit (ie we ignore
 706  *    duplicate events where it was already properly
 707  *    set/reset)
 708  *  - the suspend/resume paths will also set it to
 709  *    zero, since they restore the mode ("lid open").
 710  */
 711 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
 712                             void *unused)
 713 {
 714         struct drm_i915_private *dev_priv =
 715                 container_of(nb, struct drm_i915_private, lid_notifier);
 716         struct drm_device *dev = dev_priv->dev;
 717         struct drm_connector *connector = dev_priv->int_lvds_connector;
 718
 719         /*
 720          * check and update the status of LVDS connector after receiving
 721          * the LID nofication event.
 722          */
 723         if (connector)
 724                 connector->status = connector->funcs->detect(connector);
 725         if (!acpi_lid_open()) {
 726                 dev_priv->modeset_on_lid = 1;
 727                 return NOTIFY_OK;
 728         }
 729
 730         if (!dev_priv->modeset_on_lid)
 731                 return NOTIFY_OK;
 732
 733         dev_priv->modeset_on_lid = 0;
 734
 735         mutex_lock(&dev->mode_config.mutex);
 736         drm_helper_resume_force_mode(dev);
 737         mutex_unlock(&dev->mode_config.mutex);
 738
 739         return NOTIFY_OK;
 740 }
 741
 742 /**
 743  * intel_lvds_destroy - unregister and free LVDS structures
 744  * @connector: connector to free
 745  *
 746  * Unregister the DDC bus for this connector then free the driver private
 747  * structure.
 748  */
 749 static void intel_lvds_destroy(struct drm_connector *connector)
 750 {
 751         struct drm_device *dev = connector->dev;
 752         struct intel_output *intel_output = to_intel_output(connector);
 753         struct drm_i915_private *dev_priv = dev->dev_private;
 754
 755         if (intel_output->ddc_bus)
 756                 intel_i2c_destroy(intel_output->ddc_bus);
 757         if (dev_priv->lid_notifier.notifier_call)
 758                 acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
 759         drm_sysfs_connector_remove(connector);
 760         drm_connector_cleanup(connector);
 761         kfree(connector);
 762 }
 763
 764 static int intel_lvds_set_property(struct drm_connector *connector,
 765                                    struct drm_property *property,
 766                                    uint64_t value)
 767 {
 768         struct drm_device *dev = connector->dev;
 769         struct intel_output *intel_output =
 770                         to_intel_output(connector);
 771
 772         if (property == dev->mode_config.scaling_mode_property &&
 773                                 connector->encoder) {
 774                 struct drm_crtc *crtc = connector->encoder->crtc;
 775                 struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
 776                 if (value == DRM_MODE_SCALE_NONE) {
 777                         DRM_DEBUG_KMS("no scaling not supported\n");
 778                         return 0;
 779                 }
 780                 if (lvds_priv->fitting_mode == value) {
 781                         /* the LVDS scaling property is not changed */
 782                         return 0;
 783                 }
 784                 lvds_priv->fitting_mode = value;
 785                 if (crtc && crtc->enabled) {
 786                         /*
 787                          * If the CRTC is enabled, the display will be changed
 788                          * according to the new panel fitting mode.
 789                          */
 790                         drm_crtc_helper_set_mode(crtc, &crtc->mode,
 791                                 crtc->x, crtc->y, crtc->fb);
 792                 }
 793         }
 794
 795         return 0;
 796 }
 797
 798 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
 799         .dpms = intel_lvds_dpms,
 800         .mode_fixup = intel_lvds_mode_fixup,
 801         .prepare = intel_lvds_prepare,
 802         .mode_set = intel_lvds_mode_set,
 803         .commit = intel_lvds_commit,
 804 };
 805
 806 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
 807         .get_modes = intel_lvds_get_modes,
 808         .mode_valid = intel_lvds_mode_valid,
 809         .best_encoder = intel_best_encoder,
 810 };
 811
 812 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
 813         .dpms = drm_helper_connector_dpms,
 814         .save = intel_lvds_save,
 815         .restore = intel_lvds_restore,
 816         .detect = intel_lvds_detect,
 817         .fill_modes = drm_helper_probe_single_connector_modes,
 818         .set_property = intel_lvds_set_property,
 819         .destroy = intel_lvds_destroy,
 820 };
 821
 822
 823 static void intel_lvds_enc_destroy(struct drm_encoder *encoder)
 824 {
 825         drm_encoder_cleanup(encoder);
 826 }
 827
 828 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
 829         .destroy = intel_lvds_enc_destroy,
 830 };
 831
 832 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
 833 {
 834         DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
 835         return 1;
 836 }
 837
 838 /* These systems claim to have LVDS, but really don't */
 839 static const struct dmi_system_id intel_no_lvds[] = {
 840         {
 841                 .callback = intel_no_lvds_dmi_callback,
 842                 .ident = "Apple Mac Mini (Core series)",
 843                 .matches = {
 844                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 845                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
 846                 },
 847         },
 848         {
 849                 .callback = intel_no_lvds_dmi_callback,
 850                 .ident = "Apple Mac Mini (Core 2 series)",
 851                 .matches = {
 852                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 853                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
 854                 },
 855         },
 856         {
 857                 .callback = intel_no_lvds_dmi_callback,
 858                 .ident = "MSI IM-945GSE-A",
 859                 .matches = {
 860                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
 861                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
 862                 },
 863         },
 864         {
 865                 .callback = intel_no_lvds_dmi_callback,
 866                 .ident = "Dell Studio Hybrid",
 867                 .matches = {
 868                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 869                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
 870                 },
 871         },
 872         {
 873                 .callback = intel_no_lvds_dmi_callback,
 874                 .ident = "AOpen Mini PC",
 875                 .matches = {
 876                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
 877                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
 878                 },
 879         },
 880         {
 881                 .callback = intel_no_lvds_dmi_callback,
 882                 .ident = "AOpen Mini PC MP915",
 883                 .matches = {
 884                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 885                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
 886                 },
 887         },
 888         {
 889                 .callback = intel_no_lvds_dmi_callback,
 890                 .ident = "Aopen i945GTt-VFA",
 891                 .matches = {
 892                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
 893                 },
 894         },
 895
 896         { }     /* terminating entry */
 897 };
 898
 899 /**
 900  * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
 901  * @dev: drm device
 902  * @connector: LVDS connector
 903  *
 904  * Find the reduced downclock for LVDS in EDID.
 905  */
 906 static void intel_find_lvds_downclock(struct drm_device *dev,
 907                                 struct drm_connector *connector)
 908 {
 909         struct drm_i915_private *dev_priv = dev->dev_private;
 910         struct drm_display_mode *scan, *panel_fixed_mode;
 911         int temp_downclock;
 912
 913         panel_fixed_mode = dev_priv->panel_fixed_mode;
 914         temp_downclock = panel_fixed_mode->clock;
 915
 916         mutex_lock(&dev->mode_config.mutex);
 917         list_for_each_entry(scan, &connector->probed_modes, head) {
 918                 /*
 919                  * If one mode has the same resolution with the fixed_panel
 920                  * mode while they have the different refresh rate, it means
 921                  * that the reduced downclock is found for the LVDS. In such
 922                  * case we can set the different FPx0/1 to dynamically select
 923                  * between low and high frequency.
 924                  */
 925                 if (scan->hdisplay == panel_fixed_mode->hdisplay &&
 926                         scan->hsync_start == panel_fixed_mode->hsync_start &&
 927                         scan->hsync_end == panel_fixed_mode->hsync_end &&
 928                         scan->htotal == panel_fixed_mode->htotal &&
 929                         scan->vdisplay == panel_fixed_mode->vdisplay &&
 930                         scan->vsync_start == panel_fixed_mode->vsync_start &&
 931                         scan->vsync_end == panel_fixed_mode->vsync_end &&
 932                         scan->vtotal == panel_fixed_mode->vtotal) {
 933                         if (scan->clock < temp_downclock) {
 934                                 /*
 935                                  * The downclock is already found. But we
 936                                  * expect to find the lower downclock.
 937                                  */
 938                                 temp_downclock = scan->clock;
 939                         }
 940                 }
 941         }
 942         mutex_unlock(&dev->mode_config.mutex);
 943         if (temp_downclock < panel_fixed_mode->clock &&
 944             i915_lvds_downclock) {
 945                 /* We found the downclock for LVDS. */
 946                 dev_priv->lvds_downclock_avail = 1;
 947                 dev_priv->lvds_downclock = temp_downclock;
 948                 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
 949                                 "Normal clock %dKhz, downclock %dKhz\n",
 950                                 panel_fixed_mode->clock, temp_downclock);
 951         }
 952         return;
 953 }
 954
 955 /*
 956  * Enumerate the child dev array parsed from VBT to check whether
 957  * the LVDS is present.
 958  * If it is present, return 1.
 959  * If it is not present, return false.
 960  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
 961  * Note: The addin_offset should also be checked for LVDS panel.
 962  * Only when it is non-zero, it is assumed that it is present.
 963  */
 964 static int lvds_is_present_in_vbt(struct drm_device *dev)
 965 {
 966         struct drm_i915_private *dev_priv = dev->dev_private;
 967         struct child_device_config *p_child;
 968         int i, ret;
 969
 970         if (!dev_priv->child_dev_num)
 971                 return 1;
 972
 973         ret = 0;
 974         for (i = 0; i < dev_priv->child_dev_num; i++) {
 975                 p_child = dev_priv->child_dev + i;
 976                 /*
 977                  * If the device type is not LFP, continue.
 978                  * If the device type is 0x22, it is also regarded as LFP.
 979                  */
 980                 if (p_child->device_type != DEVICE_TYPE_INT_LFP &&
 981                         p_child->device_type != DEVICE_TYPE_LFP)
 982                         continue;
 983
 984                 /* The addin_offset should be checked. Only when it is
 985                  * non-zero, it is regarded as present.
 986                  */
 987                 if (p_child->addin_offset) {
 988                         ret = 1;
 989                         break;
 990                 }
 991         }
 992         return ret;
 993 }
 994
 995 /**
 996  * intel_lvds_init - setup LVDS connectors on this device
 997  * @dev: drm device
 998  *
 999  * Create the connector, register the LVDS DDC bus, and try to figure out what
1000  * modes we can display on the LVDS panel (if present).
1001  */
1002 void intel_lvds_init(struct drm_device *dev)
1003 {
1004         struct drm_i915_private *dev_priv = dev->dev_private;
1005         struct intel_output *intel_output;
1006         struct drm_connector *connector;
1007         struct drm_encoder *encoder;
1008         struct drm_display_mode *scan; /* *modes, *bios_mode; */
1009         struct drm_crtc *crtc;
1010         struct intel_lvds_priv *lvds_priv;
1011         u32 lvds;
1012         int pipe, gpio = GPIOC;
1013
1014         /* Skip init on machines we know falsely report LVDS */
1015         if (dmi_check_system(intel_no_lvds))
1016                 return;
1017
1018         if (!lvds_is_present_in_vbt(dev)) {
1019                 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
1020                 return;
1021         }
1022
1023         if (IS_IRONLAKE(dev)) {
1024                 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
1025                         return;
1026                 if (dev_priv->edp_support) {
1027                         DRM_DEBUG_KMS("disable LVDS for eDP support\n");
1028                         return;
1029                 }
1030                 gpio = PCH_GPIOC;
1031         }
1032
1033         intel_output = kzalloc(sizeof(struct intel_output) +
1034                                 sizeof(struct intel_lvds_priv), GFP_KERNEL);
1035         if (!intel_output) {
1036                 return;
1037         }
1038
1039         connector = &intel_output->base;
1040         encoder = &intel_output->enc;
1041         drm_connector_init(dev, &intel_output->base, &intel_lvds_connector_funcs,
1042                            DRM_MODE_CONNECTOR_LVDS);
1043
1044         drm_encoder_init(dev, &intel_output->enc, &intel_lvds_enc_funcs,
1045                          DRM_MODE_ENCODER_LVDS);
1046
1047         drm_mode_connector_attach_encoder(&intel_output->base, &intel_output->enc);
1048         intel_output->type = INTEL_OUTPUT_LVDS;
1049
1050         intel_output->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
1051         intel_output->crtc_mask = (1 << 1);
1052         drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
1053         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
1054         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
1055         connector->interlace_allowed = false;
1056         connector->doublescan_allowed = false;
1057
1058         lvds_priv = (struct intel_lvds_priv *)(intel_output + 1);
1059         intel_output->dev_priv = lvds_priv;
1060         /* create the scaling mode property */
1061         drm_mode_create_scaling_mode_property(dev);
1062         /*
1063          * the initial panel fitting mode will be FULL_SCREEN.
1064          */
1065
1066         drm_connector_attach_property(&intel_output->base,
1067                                       dev->mode_config.scaling_mode_property,
1068                                       DRM_MODE_SCALE_FULLSCREEN);
1069         lvds_priv->fitting_mode = DRM_MODE_SCALE_FULLSCREEN;
1070         /*
1071          * LVDS discovery:
1072          * 1) check for EDID on DDC
1073          * 2) check for VBT data
1074          * 3) check to see if LVDS is already on
1075          *    if none of the above, no panel
1076          * 4) make sure lid is open
1077          *    if closed, act like it's not there for now
1078          */
1079
1080         /* Set up the DDC bus. */
1081         intel_output->ddc_bus = intel_i2c_create(dev, gpio, "LVDSDDC_C");
1082         if (!intel_output->ddc_bus) {
1083                 dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
1084                            "failed.\n");
1085                 goto failed;
1086         }
1087
1088         /*
1089          * Attempt to get the fixed panel mode from DDC.  Assume that the
1090          * preferred mode is the right one.
1091          */
1092         intel_ddc_get_modes(intel_output);
1093
1094         list_for_each_entry(scan, &connector->probed_modes, head) {
1095                 mutex_lock(&dev->mode_config.mutex);
1096                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1097                         dev_priv->panel_fixed_mode =
1098                                 drm_mode_duplicate(dev, scan);
1099                         mutex_unlock(&dev->mode_config.mutex);
1100                         intel_find_lvds_downclock(dev, connector);
1101                         goto out;
1102                 }
1103                 mutex_unlock(&dev->mode_config.mutex);
1104         }
1105
1106         /* Failed to get EDID, what about VBT? */
1107         if (dev_priv->lfp_lvds_vbt_mode) {
1108                 mutex_lock(&dev->mode_config.mutex);
1109                 dev_priv->panel_fixed_mode =
1110                         drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
1111                 mutex_unlock(&dev->mode_config.mutex);
1112                 if (dev_priv->panel_fixed_mode) {
1113                         dev_priv->panel_fixed_mode->type |=
1114                                 DRM_MODE_TYPE_PREFERRED;
1115                         goto out;
1116                 }
1117         }
1118
1119         /*
1120          * If we didn't get EDID, try checking if the panel is already turned
1121          * on.  If so, assume that whatever is currently programmed is the
1122          * correct mode.
1123          */
1124
1125         /* Ironlake: FIXME if still fail, not try pipe mode now */
1126         if (IS_IRONLAKE(dev))
1127                 goto failed;
1128
1129         lvds = I915_READ(LVDS);
1130         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1131         crtc = intel_get_crtc_from_pipe(dev, pipe);
1132
1133         if (crtc && (lvds & LVDS_PORT_EN)) {
1134                 dev_priv->panel_fixed_mode = intel_crtc_mode_get(dev, crtc);
1135                 if (dev_priv->panel_fixed_mode) {
1136                         dev_priv->panel_fixed_mode->type |=
1137                                 DRM_MODE_TYPE_PREFERRED;
1138                         goto out;
1139                 }
1140         }
1141
1142         /* If we still don't have a mode after all that, give up. */
1143         if (!dev_priv->panel_fixed_mode)
1144                 goto failed;
1145
1146 out:
1147         if (IS_IRONLAKE(dev)) {
1148                 u32 pwm;
1149                 /* make sure PWM is enabled */
1150                 pwm = I915_READ(BLC_PWM_CPU_CTL2);
1151                 pwm |= (PWM_ENABLE | PWM_PIPE_B);
1152                 I915_WRITE(BLC_PWM_CPU_CTL2, pwm);
1153
1154                 pwm = I915_READ(BLC_PWM_PCH_CTL1);
1155                 pwm |= PWM_PCH_ENABLE;
1156                 I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
1157         }
1158         dev_priv->lid_notifier.notifier_call = intel_lid_notify;
1159         if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
1160                 DRM_DEBUG_KMS("lid notifier registration failed\n");
1161                 dev_priv->lid_notifier.notifier_call = NULL;
1162         }
1163         /* keep the LVDS connector */
1164         dev_priv->int_lvds_connector = connector;
1165         drm_sysfs_connector_add(connector);
1166         return;
1167
1168 failed:
1169         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1170         if (intel_output->ddc_bus)
1171                 intel_i2c_destroy(intel_output->ddc_bus);
1172         drm_connector_cleanup(connector);
1173         drm_encoder_cleanup(encoder);
1174         kfree(intel_output);
1175 }