drivers/gpu/drm/i915/intel_lvds.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  *      Dave Airlie <airlied@linux.ie>
  27  *      Jesse Barnes <jesse.barnes@intel.com>
  28  */
  29
  30 #include <linux/dmi.h>
  31 #include <linux/i2c.h>
  32 #include "drmP.h"
  33 #include "drm.h"
  34 #include "drm_crtc.h"
  35 #include "drm_edid.h"
  36 #include "intel_drv.h"
  37 #include "i915_drm.h"
  38 #include "i915_drv.h"
  39 #include <linux/acpi.h>
  40
  41 /*
  42  * the following four scaling options are defined.
  43  * #define DRM_MODE_SCALE_NON_GPU       0
  44  * #define DRM_MODE_SCALE_FULLSCREEN    1
  45  * #define DRM_MODE_SCALE_NO_SCALE      2
  46  * #define DRM_MODE_SCALE_ASPECT        3
  47  */
  48
  49 /* Private structure for the integrated LVDS support */
  50 struct intel_lvds_priv {
  51         int fitting_mode;
  52         u32 pfit_control;
  53         u32 pfit_pgm_ratios;
  54 };
  55
  56 /**
  57  * Sets the backlight level.
  58  *
  59  * \param level backlight level, from 0 to intel_lvds_get_max_backlight().
  60  */
  61 static void intel_lvds_set_backlight(struct drm_device *dev, int level)
  62 {
  63         struct drm_i915_private *dev_priv = dev->dev_private;
  64         u32 blc_pwm_ctl, reg;
  65
  66         if (IS_IGDNG(dev))
  67                 reg = BLC_PWM_CPU_CTL;
  68         else
  69                 reg = BLC_PWM_CTL;
  70
  71         blc_pwm_ctl = I915_READ(reg) & ~BACKLIGHT_DUTY_CYCLE_MASK;
  72         I915_WRITE(reg, (blc_pwm_ctl |
  73                                  (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
  74 }
  75
  76 /**
  77  * Returns the maximum level of the backlight duty cycle field.
  78  */
  79 static u32 intel_lvds_get_max_backlight(struct drm_device *dev)
  80 {
  81         struct drm_i915_private *dev_priv = dev->dev_private;
  82         u32 reg;
  83
  84         if (IS_IGDNG(dev))
  85                 reg = BLC_PWM_PCH_CTL2;
  86         else
  87                 reg = BLC_PWM_CTL;
  88
  89         return ((I915_READ(reg) & BACKLIGHT_MODULATION_FREQ_MASK) >>
  90                 BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
  91 }
  92
  93 /**
  94  * Sets the power state for the panel.
  95  */
  96 static void intel_lvds_set_power(struct drm_device *dev, bool on)
  97 {
  98         struct drm_i915_private *dev_priv = dev->dev_private;
  99         u32 pp_status, ctl_reg, status_reg;
 100
 101         if (IS_IGDNG(dev)) {
 102                 ctl_reg = PCH_PP_CONTROL;
 103                 status_reg = PCH_PP_STATUS;
 104         } else {
 105                 ctl_reg = PP_CONTROL;
 106                 status_reg = PP_STATUS;
 107         }
 108
 109         if (on) {
 110                 I915_WRITE(ctl_reg, I915_READ(ctl_reg) |
 111                            POWER_TARGET_ON);
 112                 do {
 113                         pp_status = I915_READ(status_reg);
 114                 } while ((pp_status & PP_ON) == 0);
 115
 116                 intel_lvds_set_backlight(dev, dev_priv->backlight_duty_cycle);
 117         } else {
 118                 intel_lvds_set_backlight(dev, 0);
 119
 120                 I915_WRITE(ctl_reg, I915_READ(ctl_reg) &
 121                            ~POWER_TARGET_ON);
 122                 do {
 123                         pp_status = I915_READ(status_reg);
 124                 } while (pp_status & PP_ON);
 125         }
 126 }
 127
 128 static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
 129 {
 130         struct drm_device *dev = encoder->dev;
 131
 132         if (mode == DRM_MODE_DPMS_ON)
 133                 intel_lvds_set_power(dev, true);
 134         else
 135                 intel_lvds_set_power(dev, false);
 136
 137         /* XXX: We never power down the LVDS pairs. */
 138 }
 139
 140 static void intel_lvds_save(struct drm_connector *connector)
 141 {
 142         struct drm_device *dev = connector->dev;
 143         struct drm_i915_private *dev_priv = dev->dev_private;
 144         u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg;
 145         u32 pwm_ctl_reg;
 146
 147         if (IS_IGDNG(dev)) {
 148                 pp_on_reg = PCH_PP_ON_DELAYS;
 149                 pp_off_reg = PCH_PP_OFF_DELAYS;
 150                 pp_ctl_reg = PCH_PP_CONTROL;
 151                 pp_div_reg = PCH_PP_DIVISOR;
 152                 pwm_ctl_reg = BLC_PWM_CPU_CTL;
 153         } else {
 154                 pp_on_reg = PP_ON_DELAYS;
 155                 pp_off_reg = PP_OFF_DELAYS;
 156                 pp_ctl_reg = PP_CONTROL;
 157                 pp_div_reg = PP_DIVISOR;
 158                 pwm_ctl_reg = BLC_PWM_CTL;
 159         }
 160
 161         dev_priv->savePP_ON = I915_READ(pp_on_reg);
 162         dev_priv->savePP_OFF = I915_READ(pp_off_reg);
 163         dev_priv->savePP_CONTROL = I915_READ(pp_ctl_reg);
 164         dev_priv->savePP_DIVISOR = I915_READ(pp_div_reg);
 165         dev_priv->saveBLC_PWM_CTL = I915_READ(pwm_ctl_reg);
 166         dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL &
 167                                        BACKLIGHT_DUTY_CYCLE_MASK);
 168
 169         /*
 170          * If the light is off at server startup, just make it full brightness
 171          */
 172         if (dev_priv->backlight_duty_cycle == 0)
 173                 dev_priv->backlight_duty_cycle =
 174                         intel_lvds_get_max_backlight(dev);
 175 }
 176
 177 static void intel_lvds_restore(struct drm_connector *connector)
 178 {
 179         struct drm_device *dev = connector->dev;
 180         struct drm_i915_private *dev_priv = dev->dev_private;
 181         u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg;
 182         u32 pwm_ctl_reg;
 183
 184         if (IS_IGDNG(dev)) {
 185                 pp_on_reg = PCH_PP_ON_DELAYS;
 186                 pp_off_reg = PCH_PP_OFF_DELAYS;
 187                 pp_ctl_reg = PCH_PP_CONTROL;
 188                 pp_div_reg = PCH_PP_DIVISOR;
 189                 pwm_ctl_reg = BLC_PWM_CPU_CTL;
 190         } else {
 191                 pp_on_reg = PP_ON_DELAYS;
 192                 pp_off_reg = PP_OFF_DELAYS;
 193                 pp_ctl_reg = PP_CONTROL;
 194                 pp_div_reg = PP_DIVISOR;
 195                 pwm_ctl_reg = BLC_PWM_CTL;
 196         }
 197
 198         I915_WRITE(pwm_ctl_reg, dev_priv->saveBLC_PWM_CTL);
 199         I915_WRITE(pp_on_reg, dev_priv->savePP_ON);
 200         I915_WRITE(pp_off_reg, dev_priv->savePP_OFF);
 201         I915_WRITE(pp_div_reg, dev_priv->savePP_DIVISOR);
 202         I915_WRITE(pp_ctl_reg, dev_priv->savePP_CONTROL);
 203         if (dev_priv->savePP_CONTROL & POWER_TARGET_ON)
 204                 intel_lvds_set_power(dev, true);
 205         else
 206                 intel_lvds_set_power(dev, false);
 207 }
 208
 209 static int intel_lvds_mode_valid(struct drm_connector *connector,
 210                                  struct drm_display_mode *mode)
 211 {
 212         struct drm_device *dev = connector->dev;
 213         struct drm_i915_private *dev_priv = dev->dev_private;
 214         struct drm_display_mode *fixed_mode = dev_priv->panel_fixed_mode;
 215
 216         if (fixed_mode) {
 217                 if (mode->hdisplay > fixed_mode->hdisplay)
 218                         return MODE_PANEL;
 219                 if (mode->vdisplay > fixed_mode->vdisplay)
 220                         return MODE_PANEL;
 221         }
 222
 223         return MODE_OK;
 224 }
 225
 226 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
 227                                   struct drm_display_mode *mode,
 228                                   struct drm_display_mode *adjusted_mode)
 229 {
 230         /*
 231          * float point operation is not supported . So the PANEL_RATIO_FACTOR
 232          * is defined, which can avoid the float point computation when
 233          * calculating the panel ratio.
 234          */
 235 #define PANEL_RATIO_FACTOR 8192
 236         struct drm_device *dev = encoder->dev;
 237         struct drm_i915_private *dev_priv = dev->dev_private;
 238         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
 239         struct drm_encoder *tmp_encoder;
 240         struct intel_output *intel_output = enc_to_intel_output(encoder);
 241         struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
 242         u32 pfit_control = 0, pfit_pgm_ratios = 0;
 243         int left_border = 0, right_border = 0, top_border = 0;
 244         int bottom_border = 0;
 245         bool border = 0;
 246         int panel_ratio, desired_ratio, vert_scale, horiz_scale;
 247         int horiz_ratio, vert_ratio;
 248         u32 hsync_width, vsync_width;
 249         u32 hblank_width, vblank_width;
 250         u32 hsync_pos, vsync_pos;
 251
 252         /* Should never happen!! */
 253         if (!IS_I965G(dev) && intel_crtc->pipe == 0) {
 254                 DRM_ERROR("Can't support LVDS on pipe A\n");
 255                 return false;
 256         }
 257
 258         /* Should never happen!! */
 259         list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
 260                 if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
 261                         DRM_ERROR("Can't enable LVDS and another "
 262                                "encoder on the same pipe\n");
 263                         return false;
 264                 }
 265         }
 266         /* If we don't have a panel mode, there is nothing we can do */
 267         if (dev_priv->panel_fixed_mode == NULL)
 268                 return true;
 269         /*
 270          * If we have timings from the BIOS for the panel, put them in
 271          * to the adjusted mode.  The CRTC will be set up for this mode,
 272          * with the panel scaling set up to source from the H/VDisplay
 273          * of the original mode.
 274          */
 275         if (dev_priv->panel_fixed_mode != NULL) {
 276                 adjusted_mode->hdisplay = dev_priv->panel_fixed_mode->hdisplay;
 277                 adjusted_mode->hsync_start =
 278                         dev_priv->panel_fixed_mode->hsync_start;
 279                 adjusted_mode->hsync_end =
 280                         dev_priv->panel_fixed_mode->hsync_end;
 281                 adjusted_mode->htotal = dev_priv->panel_fixed_mode->htotal;
 282                 adjusted_mode->vdisplay = dev_priv->panel_fixed_mode->vdisplay;
 283                 adjusted_mode->vsync_start =
 284                         dev_priv->panel_fixed_mode->vsync_start;
 285                 adjusted_mode->vsync_end =
 286                         dev_priv->panel_fixed_mode->vsync_end;
 287                 adjusted_mode->vtotal = dev_priv->panel_fixed_mode->vtotal;
 288                 adjusted_mode->clock = dev_priv->panel_fixed_mode->clock;
 289                 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
 290         }
 291
 292         /* Make sure pre-965s set dither correctly */
 293         if (!IS_I965G(dev)) {
 294                 if (dev_priv->panel_wants_dither || dev_priv->lvds_dither)
 295                         pfit_control |= PANEL_8TO6_DITHER_ENABLE;
 296         }
 297
 298         /* Native modes don't need fitting */
 299         if (adjusted_mode->hdisplay == mode->hdisplay &&
 300                         adjusted_mode->vdisplay == mode->vdisplay) {
 301                 pfit_pgm_ratios = 0;
 302                 border = 0;
 303                 goto out;
 304         }
 305
 306         /* 965+ wants fuzzy fitting */
 307         if (IS_I965G(dev))
 308                 pfit_control |= (intel_crtc->pipe << PFIT_PIPE_SHIFT) |
 309                                         PFIT_FILTER_FUZZY;
 310
 311         hsync_width = adjusted_mode->crtc_hsync_end -
 312                                         adjusted_mode->crtc_hsync_start;
 313         vsync_width = adjusted_mode->crtc_vsync_end -
 314                                         adjusted_mode->crtc_vsync_start;
 315         hblank_width = adjusted_mode->crtc_hblank_end -
 316                                         adjusted_mode->crtc_hblank_start;
 317         vblank_width = adjusted_mode->crtc_vblank_end -
 318                                         adjusted_mode->crtc_vblank_start;
 319         /*
 320          * Deal with panel fitting options. Figure out how to stretch the
 321          * image based on its aspect ratio & the current panel fitting mode.
 322          */
 323         panel_ratio = adjusted_mode->hdisplay * PANEL_RATIO_FACTOR /
 324                                 adjusted_mode->vdisplay;
 325         desired_ratio = mode->hdisplay * PANEL_RATIO_FACTOR /
 326                                 mode->vdisplay;
 327         /*
 328          * Enable automatic panel scaling for non-native modes so that they fill
 329          * the screen.  Should be enabled before the pipe is enabled, according
 330          * to register description and PRM.
 331          * Change the value here to see the borders for debugging
 332          */
 333         I915_WRITE(BCLRPAT_A, 0);
 334         I915_WRITE(BCLRPAT_B, 0);
 335
 336         switch (lvds_priv->fitting_mode) {
 337         case DRM_MODE_SCALE_NO_SCALE:
 338                 /*
 339                  * For centered modes, we have to calculate border widths &
 340                  * heights and modify the values programmed into the CRTC.
 341                  */
 342                 left_border = (adjusted_mode->hdisplay - mode->hdisplay) / 2;
 343                 right_border = left_border;
 344                 if (mode->hdisplay & 1)
 345                         right_border++;
 346                 top_border = (adjusted_mode->vdisplay - mode->vdisplay) / 2;
 347                 bottom_border = top_border;
 348                 if (mode->vdisplay & 1)
 349                         bottom_border++;
 350                 /* Set active & border values */
 351                 adjusted_mode->crtc_hdisplay = mode->hdisplay;
 352                 /* Keep the boder be even */
 353                 if (right_border & 1)
 354                         right_border++;
 355                 /* use the border directly instead of border minuse one */
 356                 adjusted_mode->crtc_hblank_start = mode->hdisplay +
 357                                                 right_border;
 358                 /* keep the blank width constant */
 359                 adjusted_mode->crtc_hblank_end =
 360                         adjusted_mode->crtc_hblank_start + hblank_width;
 361                 /* get the hsync pos relative to hblank start */
 362                 hsync_pos = (hblank_width - hsync_width) / 2;
 363                 /* keep the hsync pos be even */
 364                 if (hsync_pos & 1)
 365                         hsync_pos++;
 366                 adjusted_mode->crtc_hsync_start =
 367                                 adjusted_mode->crtc_hblank_start + hsync_pos;
 368                 /* keep the hsync width constant */
 369                 adjusted_mode->crtc_hsync_end =
 370                                 adjusted_mode->crtc_hsync_start + hsync_width;
 371                 adjusted_mode->crtc_vdisplay = mode->vdisplay;
 372                 /* use the border instead of border minus one */
 373                 adjusted_mode->crtc_vblank_start = mode->vdisplay +
 374                                                 bottom_border;
 375                 /* keep the vblank width constant */
 376                 adjusted_mode->crtc_vblank_end =
 377                                 adjusted_mode->crtc_vblank_start + vblank_width;
 378                 /* get the vsync start postion relative to vblank start */
 379                 vsync_pos = (vblank_width - vsync_width) / 2;
 380                 adjusted_mode->crtc_vsync_start =
 381                                 adjusted_mode->crtc_vblank_start + vsync_pos;
 382                 /* keep the vsync width constant */
 383                 adjusted_mode->crtc_vsync_end =
 384                                 adjusted_mode->crtc_vblank_start + vsync_width;
 385                 border = 1;
 386                 break;
 387         case DRM_MODE_SCALE_ASPECT:
 388                 /* Scale but preserve the spect ratio */
 389                 pfit_control |= PFIT_ENABLE;
 390                 if (IS_I965G(dev)) {
 391                         /* 965+ is easy, it does everything in hw */
 392                         if (panel_ratio > desired_ratio)
 393                                 pfit_control |= PFIT_SCALING_PILLAR;
 394                         else if (panel_ratio < desired_ratio)
 395                                 pfit_control |= PFIT_SCALING_LETTER;
 396                         else
 397                                 pfit_control |= PFIT_SCALING_AUTO;
 398                 } else {
 399                         /*
 400                          * For earlier chips we have to calculate the scaling
 401                          * ratio by hand and program it into the
 402                          * PFIT_PGM_RATIO register
 403                          */
 404                         u32 horiz_bits, vert_bits, bits = 12;
 405                         horiz_ratio = mode->hdisplay * PANEL_RATIO_FACTOR/
 406                                                 adjusted_mode->hdisplay;
 407                         vert_ratio = mode->vdisplay * PANEL_RATIO_FACTOR/
 408                                                 adjusted_mode->vdisplay;
 409                         horiz_scale = adjusted_mode->hdisplay *
 410                                         PANEL_RATIO_FACTOR / mode->hdisplay;
 411                         vert_scale = adjusted_mode->vdisplay *
 412                                         PANEL_RATIO_FACTOR / mode->vdisplay;
 413
 414                         /* retain aspect ratio */
 415                         if (panel_ratio > desired_ratio) { /* Pillar */
 416                                 u32 scaled_width;
 417                                 scaled_width = mode->hdisplay * vert_scale /
 418                                                 PANEL_RATIO_FACTOR;
 419                                 horiz_ratio = vert_ratio;
 420                                 pfit_control |= (VERT_AUTO_SCALE |
 421                                                  VERT_INTERP_BILINEAR |
 422                                                  HORIZ_INTERP_BILINEAR);
 423                                 /* Pillar will have left/right borders */
 424                                 left_border = (adjusted_mode->hdisplay -
 425                                                 scaled_width) / 2;
 426                                 right_border = left_border;
 427                                 if (mode->hdisplay & 1) /* odd resolutions */
 428                                         right_border++;
 429                                 /* keep the border be even */
 430                                 if (right_border & 1)
 431                                         right_border++;
 432                                 adjusted_mode->crtc_hdisplay = scaled_width;
 433                                 /* use border instead of border minus one */
 434                                 adjusted_mode->crtc_hblank_start =
 435                                         scaled_width + right_border;
 436                                 /* keep the hblank width constant */
 437                                 adjusted_mode->crtc_hblank_end =
 438                                         adjusted_mode->crtc_hblank_start +
 439                                                         hblank_width;
 440                                 /*
 441                                  * get the hsync start pos relative to
 442                                  * hblank start
 443                                  */
 444                                 hsync_pos = (hblank_width - hsync_width) / 2;
 445                                 /* keep the hsync_pos be even */
 446                                 if (hsync_pos & 1)
 447                                         hsync_pos++;
 448                                 adjusted_mode->crtc_hsync_start =
 449                                         adjusted_mode->crtc_hblank_start +
 450                                                         hsync_pos;
 451                                 /* keept hsync width constant */
 452                                 adjusted_mode->crtc_hsync_end =
 453                                         adjusted_mode->crtc_hsync_start +
 454                                                         hsync_width;
 455                                 border = 1;
 456                         } else if (panel_ratio < desired_ratio) { /* letter */
 457                                 u32 scaled_height = mode->vdisplay *
 458                                         horiz_scale / PANEL_RATIO_FACTOR;
 459                                 vert_ratio = horiz_ratio;
 460                                 pfit_control |= (HORIZ_AUTO_SCALE |
 461                                                  VERT_INTERP_BILINEAR |
 462                                                  HORIZ_INTERP_BILINEAR);
 463                                 /* Letterbox will have top/bottom border */
 464                                 top_border = (adjusted_mode->vdisplay -
 465                                         scaled_height) / 2;
 466                                 bottom_border = top_border;
 467                                 if (mode->vdisplay & 1)
 468                                         bottom_border++;
 469                                 adjusted_mode->crtc_vdisplay = scaled_height;
 470                                 /* use border instead of border minus one */
 471                                 adjusted_mode->crtc_vblank_start =
 472                                         scaled_height + bottom_border;
 473                                 /* keep the vblank width constant */
 474                                 adjusted_mode->crtc_vblank_end =
 475                                         adjusted_mode->crtc_vblank_start +
 476                                                         vblank_width;
 477                                 /*
 478                                  * get the vsync start pos relative to
 479                                  * vblank start
 480                                  */
 481                                 vsync_pos = (vblank_width - vsync_width) / 2;
 482                                 adjusted_mode->crtc_vsync_start =
 483                                         adjusted_mode->crtc_vblank_start +
 484                                                         vsync_pos;
 485                                 /* keep the vsync width constant */
 486                                 adjusted_mode->crtc_vsync_end =
 487                                         adjusted_mode->crtc_vsync_start +
 488                                                         vsync_width;
 489                                 border = 1;
 490                         } else {
 491                         /* Aspects match, Let hw scale both directions */
 492                                 pfit_control |= (VERT_AUTO_SCALE |
 493                                                  HORIZ_AUTO_SCALE |
 494                                                  VERT_INTERP_BILINEAR |
 495                                                  HORIZ_INTERP_BILINEAR);
 496                         }
 497                         horiz_bits = (1 << bits) * horiz_ratio /
 498                                         PANEL_RATIO_FACTOR;
 499                         vert_bits = (1 << bits) * vert_ratio /
 500                                         PANEL_RATIO_FACTOR;
 501                         pfit_pgm_ratios =
 502                                 ((vert_bits << PFIT_VERT_SCALE_SHIFT) &
 503                                                 PFIT_VERT_SCALE_MASK) |
 504                                 ((horiz_bits << PFIT_HORIZ_SCALE_SHIFT) &
 505                                                 PFIT_HORIZ_SCALE_MASK);
 506                 }
 507                 break;
 508
 509         case DRM_MODE_SCALE_FULLSCREEN:
 510                 /*
 511                  * Full scaling, even if it changes the aspect ratio.
 512                  * Fortunately this is all done for us in hw.
 513                  */
 514                 pfit_control |= PFIT_ENABLE;
 515                 if (IS_I965G(dev))
 516                         pfit_control |= PFIT_SCALING_AUTO;
 517                 else
 518                         pfit_control |= (VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
 519                                          VERT_INTERP_BILINEAR |
 520                                          HORIZ_INTERP_BILINEAR);
 521                 break;
 522         default:
 523                 break;
 524         }
 525
 526 out:
 527         lvds_priv->pfit_control = pfit_control;
 528         lvds_priv->pfit_pgm_ratios = pfit_pgm_ratios;
 529         /*
 530          * XXX: It would be nice to support lower refresh rates on the
 531          * panels to reduce power consumption, and perhaps match the
 532          * user's requested refresh rate.
 533          */
 534
 535         return true;
 536 }
 537
 538 static void intel_lvds_prepare(struct drm_encoder *encoder)
 539 {
 540         struct drm_device *dev = encoder->dev;
 541         struct drm_i915_private *dev_priv = dev->dev_private;
 542         u32 reg;
 543
 544         if (IS_IGDNG(dev))
 545                 reg = BLC_PWM_CPU_CTL;
 546         else
 547                 reg = BLC_PWM_CTL;
 548
 549         dev_priv->saveBLC_PWM_CTL = I915_READ(reg);
 550         dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL &
 551                                        BACKLIGHT_DUTY_CYCLE_MASK);
 552
 553         intel_lvds_set_power(dev, false);
 554 }
 555
 556 static void intel_lvds_commit( struct drm_encoder *encoder)
 557 {
 558         struct drm_device *dev = encoder->dev;
 559         struct drm_i915_private *dev_priv = dev->dev_private;
 560
 561         if (dev_priv->backlight_duty_cycle == 0)
 562                 dev_priv->backlight_duty_cycle =
 563                         intel_lvds_get_max_backlight(dev);
 564
 565         intel_lvds_set_power(dev, true);
 566 }
 567
 568 static void intel_lvds_mode_set(struct drm_encoder *encoder,
 569                                 struct drm_display_mode *mode,
 570                                 struct drm_display_mode *adjusted_mode)
 571 {
 572         struct drm_device *dev = encoder->dev;
 573         struct drm_i915_private *dev_priv = dev->dev_private;
 574         struct intel_output *intel_output = enc_to_intel_output(encoder);
 575         struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
 576
 577         /*
 578          * The LVDS pin pair will already have been turned on in the
 579          * intel_crtc_mode_set since it has a large impact on the DPLL
 580          * settings.
 581          */
 582
 583         /* No panel fitting yet, fixme */
 584         if (IS_IGDNG(dev))
 585                 return;
 586
 587         /*
 588          * Enable automatic panel scaling so that non-native modes fill the
 589          * screen.  Should be enabled before the pipe is enabled, according to
 590          * register description and PRM.
 591          */
 592         I915_WRITE(PFIT_PGM_RATIOS, lvds_priv->pfit_pgm_ratios);
 593         I915_WRITE(PFIT_CONTROL, lvds_priv->pfit_control);
 594 }
 595
 596 /**
 597  * Detect the LVDS connection.
 598  *
 599  * This always returns CONNECTOR_STATUS_CONNECTED.  This connector should only have
 600  * been set up if the LVDS was actually connected anyway.
 601  */
 602 static enum drm_connector_status intel_lvds_detect(struct drm_connector *connector)
 603 {
 604         return connector_status_connected;
 605 }
 606
 607 /**
 608  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
 609  */
 610 static int intel_lvds_get_modes(struct drm_connector *connector)
 611 {
 612         struct drm_device *dev = connector->dev;
 613         struct intel_output *intel_output = to_intel_output(connector);
 614         struct drm_i915_private *dev_priv = dev->dev_private;
 615         int ret = 0;
 616
 617         ret = intel_ddc_get_modes(intel_output);
 618
 619         if (ret)
 620                 return ret;
 621
 622         /* Didn't get an EDID, so
 623          * Set wide sync ranges so we get all modes
 624          * handed to valid_mode for checking
 625          */
 626         connector->display_info.min_vfreq = 0;
 627         connector->display_info.max_vfreq = 200;
 628         connector->display_info.min_hfreq = 0;
 629         connector->display_info.max_hfreq = 200;
 630
 631         if (dev_priv->panel_fixed_mode != NULL) {
 632                 struct drm_display_mode *mode;
 633
 634                 mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode);
 635                 drm_mode_probed_add(connector, mode);
 636
 637                 return 1;
 638         }
 639
 640         return 0;
 641 }
 642
 643 /**
 644  * intel_lvds_destroy - unregister and free LVDS structures
 645  * @connector: connector to free
 646  *
 647  * Unregister the DDC bus for this connector then free the driver private
 648  * structure.
 649  */
 650 static void intel_lvds_destroy(struct drm_connector *connector)
 651 {
 652         struct intel_output *intel_output = to_intel_output(connector);
 653
 654         if (intel_output->ddc_bus)
 655                 intel_i2c_destroy(intel_output->ddc_bus);
 656         drm_sysfs_connector_remove(connector);
 657         drm_connector_cleanup(connector);
 658         kfree(connector);
 659 }
 660
 661 static int intel_lvds_set_property(struct drm_connector *connector,
 662                                    struct drm_property *property,
 663                                    uint64_t value)
 664 {
 665         struct drm_device *dev = connector->dev;
 666         struct intel_output *intel_output =
 667                         to_intel_output(connector);
 668
 669         if (property == dev->mode_config.scaling_mode_property &&
 670                                 connector->encoder) {
 671                 struct drm_crtc *crtc = connector->encoder->crtc;
 672                 struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
 673                 if (value == DRM_MODE_SCALE_NON_GPU) {
 674                         DRM_DEBUG_KMS("non_GPU property is unsupported\n");
 675                         return 0;
 676                 }
 677                 if (lvds_priv->fitting_mode == value) {
 678                         /* the LVDS scaling property is not changed */
 679                         return 0;
 680                 }
 681                 lvds_priv->fitting_mode = value;
 682                 if (crtc && crtc->enabled) {
 683                         /*
 684                          * If the CRTC is enabled, the display will be changed
 685                          * according to the new panel fitting mode.
 686                          */
 687                         drm_crtc_helper_set_mode(crtc, &crtc->mode,
 688                                 crtc->x, crtc->y, crtc->fb);
 689                 }
 690         }
 691
 692         return 0;
 693 }
 694
 695 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
 696         .dpms = intel_lvds_dpms,
 697         .mode_fixup = intel_lvds_mode_fixup,
 698         .prepare = intel_lvds_prepare,
 699         .mode_set = intel_lvds_mode_set,
 700         .commit = intel_lvds_commit,
 701 };
 702
 703 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
 704         .get_modes = intel_lvds_get_modes,
 705         .mode_valid = intel_lvds_mode_valid,
 706         .best_encoder = intel_best_encoder,
 707 };
 708
 709 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
 710         .dpms = drm_helper_connector_dpms,
 711         .save = intel_lvds_save,
 712         .restore = intel_lvds_restore,
 713         .detect = intel_lvds_detect,
 714         .fill_modes = drm_helper_probe_single_connector_modes,
 715         .set_property = intel_lvds_set_property,
 716         .destroy = intel_lvds_destroy,
 717 };
 718
 719
 720 static void intel_lvds_enc_destroy(struct drm_encoder *encoder)
 721 {
 722         drm_encoder_cleanup(encoder);
 723 }
 724
 725 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
 726         .destroy = intel_lvds_enc_destroy,
 727 };
 728
 729 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
 730 {
 731         DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
 732         return 1;
 733 }
 734
 735 /* These systems claim to have LVDS, but really don't */
 736 static const struct dmi_system_id intel_no_lvds[] = {
 737         {
 738                 .callback = intel_no_lvds_dmi_callback,
 739                 .ident = "Apple Mac Mini (Core series)",
 740                 .matches = {
 741                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 742                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
 743                 },
 744         },
 745         {
 746                 .callback = intel_no_lvds_dmi_callback,
 747                 .ident = "Apple Mac Mini (Core 2 series)",
 748                 .matches = {
 749                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 750                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
 751                 },
 752         },
 753         {
 754                 .callback = intel_no_lvds_dmi_callback,
 755                 .ident = "MSI IM-945GSE-A",
 756                 .matches = {
 757                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
 758                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
 759                 },
 760         },
 761         {
 762                 .callback = intel_no_lvds_dmi_callback,
 763                 .ident = "Dell Studio Hybrid",
 764                 .matches = {
 765                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 766                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
 767                 },
 768         },
 769         {
 770                 .callback = intel_no_lvds_dmi_callback,
 771                 .ident = "AOpen Mini PC",
 772                 .matches = {
 773                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
 774                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
 775                 },
 776         },
 777         {
 778                 .callback = intel_no_lvds_dmi_callback,
 779                 .ident = "Aopen i945GTt-VFA",
 780                 .matches = {
 781                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
 782                 },
 783         },
 784
 785         { }     /* terminating entry */
 786 };
 787
 788 #ifdef CONFIG_ACPI
 789 /*
 790  * check_lid_device -- check whether @handle is an ACPI LID device.
 791  * @handle: ACPI device handle
 792  * @level : depth in the ACPI namespace tree
 793  * @context: the number of LID device when we find the device
 794  * @rv: a return value to fill if desired (Not use)
 795  */
 796 static acpi_status
 797 check_lid_device(acpi_handle handle, u32 level, void *context,
 798                         void **return_value)
 799 {
 800         struct acpi_device *acpi_dev;
 801         int *lid_present = context;
 802
 803         acpi_dev = NULL;
 804         /* Get the acpi device for device handle */
 805         if (acpi_bus_get_device(handle, &acpi_dev) || !acpi_dev) {
 806                 /* If there is no ACPI device for handle, return */
 807                 return AE_OK;
 808         }
 809
 810         if (!strncmp(acpi_device_hid(acpi_dev), "PNP0C0D", 7))
 811                 *lid_present = 1;
 812
 813         return AE_OK;
 814 }
 815
 816 /**
 817  * check whether there exists the ACPI LID device by enumerating the ACPI
 818  * device tree.
 819  */
 820 static int intel_lid_present(void)
 821 {
 822         int lid_present = 0;
 823
 824         if (acpi_disabled) {
 825                 /* If ACPI is disabled, there is no ACPI device tree to
 826                  * check, so assume the LID device would have been present.
 827                  */
 828                 return 1;
 829         }
 830
 831         acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT,
 832                                 ACPI_UINT32_MAX,
 833                                 check_lid_device, &lid_present, NULL);
 834
 835         return lid_present;
 836 }
 837 #else
 838 static int intel_lid_present(void)
 839 {
 840         /* In the absence of ACPI built in, assume that the LID device would
 841          * have been present.
 842          */
 843         return 1;
 844 }
 845 #endif
 846
 847 /**
 848  * intel_lvds_init - setup LVDS connectors on this device
 849  * @dev: drm device
 850  *
 851  * Create the connector, register the LVDS DDC bus, and try to figure out what
 852  * modes we can display on the LVDS panel (if present).
 853  */
 854 void intel_lvds_init(struct drm_device *dev)
 855 {
 856         struct drm_i915_private *dev_priv = dev->dev_private;
 857         struct intel_output *intel_output;
 858         struct drm_connector *connector;
 859         struct drm_encoder *encoder;
 860         struct drm_display_mode *scan; /* *modes, *bios_mode; */
 861         struct drm_crtc *crtc;
 862         struct intel_lvds_priv *lvds_priv;
 863         u32 lvds;
 864         int pipe, gpio = GPIOC;
 865
 866         /* Skip init on machines we know falsely report LVDS */
 867         if (dmi_check_system(intel_no_lvds))
 868                 return;
 869
 870         /* Assume that any device without an ACPI LID device also doesn't
 871          * have an integrated LVDS.  We would be better off parsing the BIOS
 872          * to get a reliable indicator, but that code isn't written yet.
 873          *
 874          * In the case of all-in-one desktops using LVDS that we've seen,
 875          * they're using SDVO LVDS.
 876          */
 877         if (!intel_lid_present())
 878                 return;
 879
 880         if (IS_IGDNG(dev)) {
 881                 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
 882                         return;
 883                 gpio = PCH_GPIOC;
 884         }
 885
 886         intel_output = kzalloc(sizeof(struct intel_output) +
 887                                 sizeof(struct intel_lvds_priv), GFP_KERNEL);
 888         if (!intel_output) {
 889                 return;
 890         }
 891
 892         connector = &intel_output->base;
 893         encoder = &intel_output->enc;
 894         drm_connector_init(dev, &intel_output->base, &intel_lvds_connector_funcs,
 895                            DRM_MODE_CONNECTOR_LVDS);
 896
 897         drm_encoder_init(dev, &intel_output->enc, &intel_lvds_enc_funcs,
 898                          DRM_MODE_ENCODER_LVDS);
 899
 900         drm_mode_connector_attach_encoder(&intel_output->base, &intel_output->enc);
 901         intel_output->type = INTEL_OUTPUT_LVDS;
 902
 903         drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
 904         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
 905         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
 906         connector->interlace_allowed = false;
 907         connector->doublescan_allowed = false;
 908
 909         lvds_priv = (struct intel_lvds_priv *)(intel_output + 1);
 910         intel_output->dev_priv = lvds_priv;
 911         /* create the scaling mode property */
 912         drm_mode_create_scaling_mode_property(dev);
 913         /*
 914          * the initial panel fitting mode will be FULL_SCREEN.
 915          */
 916
 917         drm_connector_attach_property(&intel_output->base,
 918                                       dev->mode_config.scaling_mode_property,
 919                                       DRM_MODE_SCALE_FULLSCREEN);
 920         lvds_priv->fitting_mode = DRM_MODE_SCALE_FULLSCREEN;
 921         /*
 922          * LVDS discovery:
 923          * 1) check for EDID on DDC
 924          * 2) check for VBT data
 925          * 3) check to see if LVDS is already on
 926          *    if none of the above, no panel
 927          * 4) make sure lid is open
 928          *    if closed, act like it's not there for now
 929          */
 930
 931         /* Set up the DDC bus. */
 932         intel_output->ddc_bus = intel_i2c_create(dev, gpio, "LVDSDDC_C");
 933         if (!intel_output->ddc_bus) {
 934                 dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
 935                            "failed.\n");
 936                 goto failed;
 937         }
 938
 939         /*
 940          * Attempt to get the fixed panel mode from DDC.  Assume that the
 941          * preferred mode is the right one.
 942          */
 943         intel_ddc_get_modes(intel_output);
 944
 945         list_for_each_entry(scan, &connector->probed_modes, head) {
 946                 mutex_lock(&dev->mode_config.mutex);
 947                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
 948                         dev_priv->panel_fixed_mode =
 949                                 drm_mode_duplicate(dev, scan);
 950                         mutex_unlock(&dev->mode_config.mutex);
 951                         goto out;
 952                 }
 953                 mutex_unlock(&dev->mode_config.mutex);
 954         }
 955
 956         /* Failed to get EDID, what about VBT? */
 957         if (dev_priv->lfp_lvds_vbt_mode) {
 958                 mutex_lock(&dev->mode_config.mutex);
 959                 dev_priv->panel_fixed_mode =
 960                         drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
 961                 mutex_unlock(&dev->mode_config.mutex);
 962                 if (dev_priv->panel_fixed_mode) {
 963                         dev_priv->panel_fixed_mode->type |=
 964                                 DRM_MODE_TYPE_PREFERRED;
 965                         goto out;
 966                 }
 967         }
 968
 969         /*
 970          * If we didn't get EDID, try checking if the panel is already turned
 971          * on.  If so, assume that whatever is currently programmed is the
 972          * correct mode.
 973          */
 974
 975         /* IGDNG: FIXME if still fail, not try pipe mode now */
 976         if (IS_IGDNG(dev))
 977                 goto failed;
 978
 979         lvds = I915_READ(LVDS);
 980         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
 981         crtc = intel_get_crtc_from_pipe(dev, pipe);
 982
 983         if (crtc && (lvds & LVDS_PORT_EN)) {
 984                 dev_priv->panel_fixed_mode = intel_crtc_mode_get(dev, crtc);
 985                 if (dev_priv->panel_fixed_mode) {
 986                         dev_priv->panel_fixed_mode->type |=
 987                                 DRM_MODE_TYPE_PREFERRED;
 988                         goto out;
 989                 }
 990         }
 991
 992         /* If we still don't have a mode after all that, give up. */
 993         if (!dev_priv->panel_fixed_mode)
 994                 goto failed;
 995
 996 out:
 997         if (IS_IGDNG(dev)) {
 998                 u32 pwm;
 999                 /* make sure PWM is enabled */
1000                 pwm = I915_READ(BLC_PWM_CPU_CTL2);
1001                 pwm |= (PWM_ENABLE | PWM_PIPE_B);
1002                 I915_WRITE(BLC_PWM_CPU_CTL2, pwm);
1003
1004                 pwm = I915_READ(BLC_PWM_PCH_CTL1);
1005                 pwm |= PWM_PCH_ENABLE;
1006                 I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
1007         }
1008         drm_sysfs_connector_add(connector);
1009         return;
1010
1011 failed:
1012         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1013         if (intel_output->ddc_bus)
1014                 intel_i2c_destroy(intel_output->ddc_bus);
1015         drm_connector_cleanup(connector);
1016         kfree(intel_output);
1017 }