arch/x86/kvm/mmu.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * This module enables machines with Intel VT-x extensions to run virtual
   5  * machines without emulation or binary translation.
   6  *
   7  * MMU support
   8  *
   9  * Copyright (C) 2006 Qumranet, Inc.
  10  * Copyright 2010 Red Hat, Inc. and/or its affilates.
  11  *
  12  * Authors:
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Avi Kivity   <avi@qumranet.com>
  15  *
  16  * This work is licensed under the terms of the GNU GPL, version 2.  See
  17  * the COPYING file in the top-level directory.
  18  *
  19  */
  20
  21 #include "mmu.h"
  22 #include "x86.h"
  23 #include "kvm_cache_regs.h"
  24
  25 #include <linux/kvm_host.h>
  26 #include <linux/types.h>
  27 #include <linux/string.h>
  28 #include <linux/mm.h>
  29 #include <linux/highmem.h>
  30 #include <linux/module.h>
  31 #include <linux/swap.h>
  32 #include <linux/hugetlb.h>
  33 #include <linux/compiler.h>
  34 #include <linux/srcu.h>
  35 #include <linux/slab.h>
  36 #include <linux/uaccess.h>
  37
  38 #include <asm/page.h>
  39 #include <asm/cmpxchg.h>
  40 #include <asm/io.h>
  41 #include <asm/vmx.h>
  42
  43 /*
  44  * When setting this variable to true it enables Two-Dimensional-Paging
  45  * where the hardware walks 2 page tables:
  46  * 1. the guest-virtual to guest-physical
  47  * 2. while doing 1. it walks guest-physical to host-physical
  48  * If the hardware supports that we don't need to do shadow paging.
  49  */
  50 bool tdp_enabled = false;
  51
  52 enum {
  53         AUDIT_PRE_PAGE_FAULT,
  54         AUDIT_POST_PAGE_FAULT,
  55         AUDIT_PRE_PTE_WRITE,
  56         AUDIT_POST_PTE_WRITE
  57 };
  58
  59 char *audit_point_name[] = {
  60         "pre page fault",
  61         "post page fault",
  62         "pre pte write",
  63         "post pte write"
  64 };
  65
  66 #undef MMU_DEBUG
  67
  68 #ifdef MMU_DEBUG
  69
  70 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
  71 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
  72
  73 #else
  74
  75 #define pgprintk(x...) do { } while (0)
  76 #define rmap_printk(x...) do { } while (0)
  77
  78 #endif
  79
  80 #ifdef MMU_DEBUG
  81 static int dbg = 0;
  82 module_param(dbg, bool, 0644);
  83 #endif
  84
  85 static int oos_shadow = 1;
  86 module_param(oos_shadow, bool, 0644);
  87
  88 #ifndef MMU_DEBUG
  89 #define ASSERT(x) do { } while (0)
  90 #else
  91 #define ASSERT(x)                                                       \
  92         if (!(x)) {                                                     \
  93                 printk(KERN_WARNING "assertion failed %s:%d: %s\n",     \
  94                        __FILE__, __LINE__, #x);                         \
  95         }
  96 #endif
  97
  98 #define PTE_PREFETCH_NUM                8
  99
 100 #define PT_FIRST_AVAIL_BITS_SHIFT 9
 101 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
 102
 103 #define PT64_LEVEL_BITS 9
 104
 105 #define PT64_LEVEL_SHIFT(level) \
 106                 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
 107
 108 #define PT64_LEVEL_MASK(level) \
 109                 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
 110
 111 #define PT64_INDEX(address, level)\
 112         (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
 113
 114
 115 #define PT32_LEVEL_BITS 10
 116
 117 #define PT32_LEVEL_SHIFT(level) \
 118                 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
 119
 120 #define PT32_LEVEL_MASK(level) \
 121                 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
 122 #define PT32_LVL_OFFSET_MASK(level) \
 123         (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
 124                                                 * PT32_LEVEL_BITS))) - 1))
 125
 126 #define PT32_INDEX(address, level)\
 127         (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
 128
 129
 130 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
 131 #define PT64_DIR_BASE_ADDR_MASK \
 132         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
 133 #define PT64_LVL_ADDR_MASK(level) \
 134         (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
 135                                                 * PT64_LEVEL_BITS))) - 1))
 136 #define PT64_LVL_OFFSET_MASK(level) \
 137         (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
 138                                                 * PT64_LEVEL_BITS))) - 1))
 139
 140 #define PT32_BASE_ADDR_MASK PAGE_MASK
 141 #define PT32_DIR_BASE_ADDR_MASK \
 142         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
 143 #define PT32_LVL_ADDR_MASK(level) \
 144         (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
 145                                             * PT32_LEVEL_BITS))) - 1))
 146
 147 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
 148                         | PT64_NX_MASK)
 149
 150 #define RMAP_EXT 4
 151
 152 #define ACC_EXEC_MASK    1
 153 #define ACC_WRITE_MASK   PT_WRITABLE_MASK
 154 #define ACC_USER_MASK    PT_USER_MASK
 155 #define ACC_ALL          (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
 156
 157 #include <trace/events/kvm.h>
 158
 159 #define CREATE_TRACE_POINTS
 160 #include "mmutrace.h"
 161
 162 #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
 163
 164 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
 165
 166 struct kvm_rmap_desc {
 167         u64 *sptes[RMAP_EXT];
 168         struct kvm_rmap_desc *more;
 169 };
 170
 171 struct kvm_shadow_walk_iterator {
 172         u64 addr;
 173         hpa_t shadow_addr;
 174         int level;
 175         u64 *sptep;
 176         unsigned index;
 177 };
 178
 179 #define for_each_shadow_entry(_vcpu, _addr, _walker)    \
 180         for (shadow_walk_init(&(_walker), _vcpu, _addr);        \
 181              shadow_walk_okay(&(_walker));                      \
 182              shadow_walk_next(&(_walker)))
 183
 184 typedef void (*mmu_parent_walk_fn) (struct kvm_mmu_page *sp, u64 *spte);
 185
 186 static struct kmem_cache *pte_chain_cache;
 187 static struct kmem_cache *rmap_desc_cache;
 188 static struct kmem_cache *mmu_page_header_cache;
 189 static struct percpu_counter kvm_total_used_mmu_pages;
 190
 191 static u64 __read_mostly shadow_trap_nonpresent_pte;
 192 static u64 __read_mostly shadow_notrap_nonpresent_pte;
 193 static u64 __read_mostly shadow_base_present_pte;
 194 static u64 __read_mostly shadow_nx_mask;
 195 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
 196 static u64 __read_mostly shadow_user_mask;
 197 static u64 __read_mostly shadow_accessed_mask;
 198 static u64 __read_mostly shadow_dirty_mask;
 199
 200 static inline u64 rsvd_bits(int s, int e)
 201 {
 202         return ((1ULL << (e - s + 1)) - 1) << s;
 203 }
 204
 205 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
 206 {
 207         shadow_trap_nonpresent_pte = trap_pte;
 208         shadow_notrap_nonpresent_pte = notrap_pte;
 209 }
 210 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
 211
 212 void kvm_mmu_set_base_ptes(u64 base_pte)
 213 {
 214         shadow_base_present_pte = base_pte;
 215 }
 216 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
 217
 218 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
 219                 u64 dirty_mask, u64 nx_mask, u64 x_mask)
 220 {
 221         shadow_user_mask = user_mask;
 222         shadow_accessed_mask = accessed_mask;
 223         shadow_dirty_mask = dirty_mask;
 224         shadow_nx_mask = nx_mask;
 225         shadow_x_mask = x_mask;
 226 }
 227 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
 228
 229 static bool is_write_protection(struct kvm_vcpu *vcpu)
 230 {
 231         return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
 232 }
 233
 234 static int is_cpuid_PSE36(void)
 235 {
 236         return 1;
 237 }
 238
 239 static int is_nx(struct kvm_vcpu *vcpu)
 240 {
 241         return vcpu->arch.efer & EFER_NX;
 242 }
 243
 244 static int is_shadow_present_pte(u64 pte)
 245 {
 246         return pte != shadow_trap_nonpresent_pte
 247                 && pte != shadow_notrap_nonpresent_pte;
 248 }
 249
 250 static int is_large_pte(u64 pte)
 251 {
 252         return pte & PT_PAGE_SIZE_MASK;
 253 }
 254
 255 static int is_writable_pte(unsigned long pte)
 256 {
 257         return pte & PT_WRITABLE_MASK;
 258 }
 259
 260 static int is_dirty_gpte(unsigned long pte)
 261 {
 262         return pte & PT_DIRTY_MASK;
 263 }
 264
 265 static int is_rmap_spte(u64 pte)
 266 {
 267         return is_shadow_present_pte(pte);
 268 }
 269
 270 static int is_last_spte(u64 pte, int level)
 271 {
 272         if (level == PT_PAGE_TABLE_LEVEL)
 273                 return 1;
 274         if (is_large_pte(pte))
 275                 return 1;
 276         return 0;
 277 }
 278
 279 static pfn_t spte_to_pfn(u64 pte)
 280 {
 281         return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
 282 }
 283
 284 static gfn_t pse36_gfn_delta(u32 gpte)
 285 {
 286         int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
 287
 288         return (gpte & PT32_DIR_PSE36_MASK) << shift;
 289 }
 290
 291 static void __set_spte(u64 *sptep, u64 spte)
 292 {
 293         set_64bit(sptep, spte);
 294 }
 295
 296 static u64 __xchg_spte(u64 *sptep, u64 new_spte)
 297 {
 298 #ifdef CONFIG_X86_64
 299         return xchg(sptep, new_spte);
 300 #else
 301         u64 old_spte;
 302
 303         do {
 304                 old_spte = *sptep;
 305         } while (cmpxchg64(sptep, old_spte, new_spte) != old_spte);
 306
 307         return old_spte;
 308 #endif
 309 }
 310
 311 static bool spte_has_volatile_bits(u64 spte)
 312 {
 313         if (!shadow_accessed_mask)
 314                 return false;
 315
 316         if (!is_shadow_present_pte(spte))
 317                 return false;
 318
 319         if ((spte & shadow_accessed_mask) &&
 320               (!is_writable_pte(spte) || (spte & shadow_dirty_mask)))
 321                 return false;
 322
 323         return true;
 324 }
 325
 326 static bool spte_is_bit_cleared(u64 old_spte, u64 new_spte, u64 bit_mask)
 327 {
 328         return (old_spte & bit_mask) && !(new_spte & bit_mask);
 329 }
 330
 331 static void update_spte(u64 *sptep, u64 new_spte)
 332 {
 333         u64 mask, old_spte = *sptep;
 334
 335         WARN_ON(!is_rmap_spte(new_spte));
 336
 337         new_spte |= old_spte & shadow_dirty_mask;
 338
 339         mask = shadow_accessed_mask;
 340         if (is_writable_pte(old_spte))
 341                 mask |= shadow_dirty_mask;
 342
 343         if (!spte_has_volatile_bits(old_spte) || (new_spte & mask) == mask)
 344                 __set_spte(sptep, new_spte);
 345         else
 346                 old_spte = __xchg_spte(sptep, new_spte);
 347
 348         if (!shadow_accessed_mask)
 349                 return;
 350
 351         if (spte_is_bit_cleared(old_spte, new_spte, shadow_accessed_mask))
 352                 kvm_set_pfn_accessed(spte_to_pfn(old_spte));
 353         if (spte_is_bit_cleared(old_spte, new_spte, shadow_dirty_mask))
 354                 kvm_set_pfn_dirty(spte_to_pfn(old_spte));
 355 }
 356
 357 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
 358                                   struct kmem_cache *base_cache, int min)
 359 {
 360         void *obj;
 361
 362         if (cache->nobjs >= min)
 363                 return 0;
 364         while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
 365                 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
 366                 if (!obj)
 367                         return -ENOMEM;
 368                 cache->objects[cache->nobjs++] = obj;
 369         }
 370         return 0;
 371 }
 372
 373 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc,
 374                                   struct kmem_cache *cache)
 375 {
 376         while (mc->nobjs)
 377                 kmem_cache_free(cache, mc->objects[--mc->nobjs]);
 378 }
 379
 380 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
 381                                        int min)
 382 {
 383         struct page *page;
 384
 385         if (cache->nobjs >= min)
 386                 return 0;
 387         while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
 388                 page = alloc_page(GFP_KERNEL);
 389                 if (!page)
 390                         return -ENOMEM;
 391                 cache->objects[cache->nobjs++] = page_address(page);
 392         }
 393         return 0;
 394 }
 395
 396 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
 397 {
 398         while (mc->nobjs)
 399                 free_page((unsigned long)mc->objects[--mc->nobjs]);
 400 }
 401
 402 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
 403 {
 404         int r;
 405
 406         r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
 407                                    pte_chain_cache, 4);
 408         if (r)
 409                 goto out;
 410         r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
 411                                    rmap_desc_cache, 4 + PTE_PREFETCH_NUM);
 412         if (r)
 413                 goto out;
 414         r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
 415         if (r)
 416                 goto out;
 417         r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
 418                                    mmu_page_header_cache, 4);
 419 out:
 420         return r;
 421 }
 422
 423 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
 424 {
 425         mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache, pte_chain_cache);
 426         mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache, rmap_desc_cache);
 427         mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
 428         mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache,
 429                                 mmu_page_header_cache);
 430 }
 431
 432 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
 433                                     size_t size)
 434 {
 435         void *p;
 436
 437         BUG_ON(!mc->nobjs);
 438         p = mc->objects[--mc->nobjs];
 439         return p;
 440 }
 441
 442 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
 443 {
 444         return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
 445                                       sizeof(struct kvm_pte_chain));
 446 }
 447
 448 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
 449 {
 450         kmem_cache_free(pte_chain_cache, pc);
 451 }
 452
 453 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
 454 {
 455         return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
 456                                       sizeof(struct kvm_rmap_desc));
 457 }
 458
 459 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
 460 {
 461         kmem_cache_free(rmap_desc_cache, rd);
 462 }
 463
 464 static gfn_t kvm_mmu_page_get_gfn(struct kvm_mmu_page *sp, int index)
 465 {
 466         if (!sp->role.direct)
 467                 return sp->gfns[index];
 468
 469         return sp->gfn + (index << ((sp->role.level - 1) * PT64_LEVEL_BITS));
 470 }
 471
 472 static void kvm_mmu_page_set_gfn(struct kvm_mmu_page *sp, int index, gfn_t gfn)
 473 {
 474         if (sp->role.direct)
 475                 BUG_ON(gfn != kvm_mmu_page_get_gfn(sp, index));
 476         else
 477                 sp->gfns[index] = gfn;
 478 }
 479
 480 /*
 481  * Return the pointer to the largepage write count for a given
 482  * gfn, handling slots that are not large page aligned.
 483  */
 484 static int *slot_largepage_idx(gfn_t gfn,
 485                                struct kvm_memory_slot *slot,
 486                                int level)
 487 {
 488         unsigned long idx;
 489
 490         idx = (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
 491               (slot->base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
 492         return &slot->lpage_info[level - 2][idx].write_count;
 493 }
 494
 495 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
 496 {
 497         struct kvm_memory_slot *slot;
 498         int *write_count;
 499         int i;
 500
 501         slot = gfn_to_memslot(kvm, gfn);
 502         for (i = PT_DIRECTORY_LEVEL;
 503              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
 504                 write_count   = slot_largepage_idx(gfn, slot, i);
 505                 *write_count += 1;
 506         }
 507 }
 508
 509 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
 510 {
 511         struct kvm_memory_slot *slot;
 512         int *write_count;
 513         int i;
 514
 515         slot = gfn_to_memslot(kvm, gfn);
 516         for (i = PT_DIRECTORY_LEVEL;
 517              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
 518                 write_count   = slot_largepage_idx(gfn, slot, i);
 519                 *write_count -= 1;
 520                 WARN_ON(*write_count < 0);
 521         }
 522 }
 523
 524 static int has_wrprotected_page(struct kvm *kvm,
 525                                 gfn_t gfn,
 526                                 int level)
 527 {
 528         struct kvm_memory_slot *slot;
 529         int *largepage_idx;
 530
 531         slot = gfn_to_memslot(kvm, gfn);
 532         if (slot) {
 533                 largepage_idx = slot_largepage_idx(gfn, slot, level);
 534                 return *largepage_idx;
 535         }
 536
 537         return 1;
 538 }
 539
 540 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
 541 {
 542         unsigned long page_size;
 543         int i, ret = 0;
 544
 545         page_size = kvm_host_page_size(kvm, gfn);
 546
 547         for (i = PT_PAGE_TABLE_LEVEL;
 548              i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
 549                 if (page_size >= KVM_HPAGE_SIZE(i))
 550                         ret = i;
 551                 else
 552                         break;
 553         }
 554
 555         return ret;
 556 }
 557
 558 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
 559 {
 560         struct kvm_memory_slot *slot;
 561         int host_level, level, max_level;
 562
 563         slot = gfn_to_memslot(vcpu->kvm, large_gfn);
 564         if (slot && slot->dirty_bitmap)
 565                 return PT_PAGE_TABLE_LEVEL;
 566
 567         host_level = host_mapping_level(vcpu->kvm, large_gfn);
 568
 569         if (host_level == PT_PAGE_TABLE_LEVEL)
 570                 return host_level;
 571
 572         max_level = kvm_x86_ops->get_lpage_level() < host_level ?
 573                 kvm_x86_ops->get_lpage_level() : host_level;
 574
 575         for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
 576                 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
 577                         break;
 578
 579         return level - 1;
 580 }
 581
 582 /*
 583  * Take gfn and return the reverse mapping to it.
 584  */
 585
 586 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
 587 {
 588         struct kvm_memory_slot *slot;
 589         unsigned long idx;
 590
 591         slot = gfn_to_memslot(kvm, gfn);
 592         if (likely(level == PT_PAGE_TABLE_LEVEL))
 593                 return &slot->rmap[gfn - slot->base_gfn];
 594
 595         idx = (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
 596                 (slot->base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
 597
 598         return &slot->lpage_info[level - 2][idx].rmap_pde;
 599 }
 600
 601 /*
 602  * Reverse mapping data structures:
 603  *
 604  * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
 605  * that points to page_address(page).
 606  *
 607  * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
 608  * containing more mappings.
 609  *
 610  * Returns the number of rmap entries before the spte was added or zero if
 611  * the spte was not added.
 612  *
 613  */
 614 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
 615 {
 616         struct kvm_mmu_page *sp;
 617         struct kvm_rmap_desc *desc;
 618         unsigned long *rmapp;
 619         int i, count = 0;
 620
 621         if (!is_rmap_spte(*spte))
 622                 return count;
 623         sp = page_header(__pa(spte));
 624         kvm_mmu_page_set_gfn(sp, spte - sp->spt, gfn);
 625         rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
 626         if (!*rmapp) {
 627                 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
 628                 *rmapp = (unsigned long)spte;
 629         } else if (!(*rmapp & 1)) {
 630                 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
 631                 desc = mmu_alloc_rmap_desc(vcpu);
 632                 desc->sptes[0] = (u64 *)*rmapp;
 633                 desc->sptes[1] = spte;
 634                 *rmapp = (unsigned long)desc | 1;
 635         } else {
 636                 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
 637                 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
 638                 while (desc->sptes[RMAP_EXT-1] && desc->more) {
 639                         desc = desc->more;
 640                         count += RMAP_EXT;
 641                 }
 642                 if (desc->sptes[RMAP_EXT-1]) {
 643                         desc->more = mmu_alloc_rmap_desc(vcpu);
 644                         desc = desc->more;
 645                 }
 646                 for (i = 0; desc->sptes[i]; ++i)
 647                         ;
 648                 desc->sptes[i] = spte;
 649         }
 650         return count;
 651 }
 652
 653 static void rmap_desc_remove_entry(unsigned long *rmapp,
 654                                    struct kvm_rmap_desc *desc,
 655                                    int i,
 656                                    struct kvm_rmap_desc *prev_desc)
 657 {
 658         int j;
 659
 660         for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
 661                 ;
 662         desc->sptes[i] = desc->sptes[j];
 663         desc->sptes[j] = NULL;
 664         if (j != 0)
 665                 return;
 666         if (!prev_desc && !desc->more)
 667                 *rmapp = (unsigned long)desc->sptes[0];
 668         else
 669                 if (prev_desc)
 670                         prev_desc->more = desc->more;
 671                 else
 672                         *rmapp = (unsigned long)desc->more | 1;
 673         mmu_free_rmap_desc(desc);
 674 }
 675
 676 static void rmap_remove(struct kvm *kvm, u64 *spte)
 677 {
 678         struct kvm_rmap_desc *desc;
 679         struct kvm_rmap_desc *prev_desc;
 680         struct kvm_mmu_page *sp;
 681         gfn_t gfn;
 682         unsigned long *rmapp;
 683         int i;
 684
 685         sp = page_header(__pa(spte));
 686         gfn = kvm_mmu_page_get_gfn(sp, spte - sp->spt);
 687         rmapp = gfn_to_rmap(kvm, gfn, sp->role.level);
 688         if (!*rmapp) {
 689                 printk(KERN_ERR "rmap_remove: %p 0->BUG\n", spte);
 690                 BUG();
 691         } else if (!(*rmapp & 1)) {
 692                 rmap_printk("rmap_remove:  %p 1->0\n", spte);
 693                 if ((u64 *)*rmapp != spte) {
 694                         printk(KERN_ERR "rmap_remove:  %p 1->BUG\n", spte);
 695                         BUG();
 696                 }
 697                 *rmapp = 0;
 698         } else {
 699                 rmap_printk("rmap_remove:  %p many->many\n", spte);
 700                 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
 701                 prev_desc = NULL;
 702                 while (desc) {
 703                         for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
 704                                 if (desc->sptes[i] == spte) {
 705                                         rmap_desc_remove_entry(rmapp,
 706                                                                desc, i,
 707                                                                prev_desc);
 708                                         return;
 709                                 }
 710                         prev_desc = desc;
 711                         desc = desc->more;
 712                 }
 713                 pr_err("rmap_remove: %p many->many\n", spte);
 714                 BUG();
 715         }
 716 }
 717
 718 static void set_spte_track_bits(u64 *sptep, u64 new_spte)
 719 {
 720         pfn_t pfn;
 721         u64 old_spte = *sptep;
 722
 723         if (!spte_has_volatile_bits(old_spte))
 724                 __set_spte(sptep, new_spte);
 725         else
 726                 old_spte = __xchg_spte(sptep, new_spte);
 727
 728         if (!is_rmap_spte(old_spte))
 729                 return;
 730
 731         pfn = spte_to_pfn(old_spte);
 732         if (!shadow_accessed_mask || old_spte & shadow_accessed_mask)
 733                 kvm_set_pfn_accessed(pfn);
 734         if (!shadow_dirty_mask || (old_spte & shadow_dirty_mask))
 735                 kvm_set_pfn_dirty(pfn);
 736 }
 737
 738 static void drop_spte(struct kvm *kvm, u64 *sptep, u64 new_spte)
 739 {
 740         set_spte_track_bits(sptep, new_spte);
 741         rmap_remove(kvm, sptep);
 742 }
 743
 744 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
 745 {
 746         struct kvm_rmap_desc *desc;
 747         u64 *prev_spte;
 748         int i;
 749
 750         if (!*rmapp)
 751                 return NULL;
 752         else if (!(*rmapp & 1)) {
 753                 if (!spte)
 754                         return (u64 *)*rmapp;
 755                 return NULL;
 756         }
 757         desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
 758         prev_spte = NULL;
 759         while (desc) {
 760                 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
 761                         if (prev_spte == spte)
 762                                 return desc->sptes[i];
 763                         prev_spte = desc->sptes[i];
 764                 }
 765                 desc = desc->more;
 766         }
 767         return NULL;
 768 }
 769
 770 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
 771 {
 772         unsigned long *rmapp;
 773         u64 *spte;
 774         int i, write_protected = 0;
 775
 776         rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
 777
 778         spte = rmap_next(kvm, rmapp, NULL);
 779         while (spte) {
 780                 BUG_ON(!spte);
 781                 BUG_ON(!(*spte & PT_PRESENT_MASK));
 782                 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
 783                 if (is_writable_pte(*spte)) {
 784                         update_spte(spte, *spte & ~PT_WRITABLE_MASK);
 785                         write_protected = 1;
 786                 }
 787                 spte = rmap_next(kvm, rmapp, spte);
 788         }
 789
 790         /* check for huge page mappings */
 791         for (i = PT_DIRECTORY_LEVEL;
 792              i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
 793                 rmapp = gfn_to_rmap(kvm, gfn, i);
 794                 spte = rmap_next(kvm, rmapp, NULL);
 795                 while (spte) {
 796                         BUG_ON(!spte);
 797                         BUG_ON(!(*spte & PT_PRESENT_MASK));
 798                         BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
 799                         pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
 800                         if (is_writable_pte(*spte)) {
 801                                 drop_spte(kvm, spte,
 802                                           shadow_trap_nonpresent_pte);
 803                                 --kvm->stat.lpages;
 804                                 spte = NULL;
 805                                 write_protected = 1;
 806                         }
 807                         spte = rmap_next(kvm, rmapp, spte);
 808                 }
 809         }
 810
 811         return write_protected;
 812 }
 813
 814 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
 815                            unsigned long data)
 816 {
 817         u64 *spte;
 818         int need_tlb_flush = 0;
 819
 820         while ((spte = rmap_next(kvm, rmapp, NULL))) {
 821                 BUG_ON(!(*spte & PT_PRESENT_MASK));
 822                 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
 823                 drop_spte(kvm, spte, shadow_trap_nonpresent_pte);
 824                 need_tlb_flush = 1;
 825         }
 826         return need_tlb_flush;
 827 }
 828
 829 static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
 830                              unsigned long data)
 831 {
 832         int need_flush = 0;
 833         u64 *spte, new_spte;
 834         pte_t *ptep = (pte_t *)data;
 835         pfn_t new_pfn;
 836
 837         WARN_ON(pte_huge(*ptep));
 838         new_pfn = pte_pfn(*ptep);
 839         spte = rmap_next(kvm, rmapp, NULL);
 840         while (spte) {
 841                 BUG_ON(!is_shadow_present_pte(*spte));
 842                 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
 843                 need_flush = 1;
 844                 if (pte_write(*ptep)) {
 845                         drop_spte(kvm, spte, shadow_trap_nonpresent_pte);
 846                         spte = rmap_next(kvm, rmapp, NULL);
 847                 } else {
 848                         new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
 849                         new_spte |= (u64)new_pfn << PAGE_SHIFT;
 850
 851                         new_spte &= ~PT_WRITABLE_MASK;
 852                         new_spte &= ~SPTE_HOST_WRITEABLE;
 853                         new_spte &= ~shadow_accessed_mask;
 854                         set_spte_track_bits(spte, new_spte);
 855                         spte = rmap_next(kvm, rmapp, spte);
 856                 }
 857         }
 858         if (need_flush)
 859                 kvm_flush_remote_tlbs(kvm);
 860
 861         return 0;
 862 }
 863
 864 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
 865                           unsigned long data,
 866                           int (*handler)(struct kvm *kvm, unsigned long *rmapp,
 867                                          unsigned long data))
 868 {
 869         int i, j;
 870         int ret;
 871         int retval = 0;
 872         struct kvm_memslots *slots;
 873
 874         slots = kvm_memslots(kvm);
 875
 876         for (i = 0; i < slots->nmemslots; i++) {
 877                 struct kvm_memory_slot *memslot = &slots->memslots[i];
 878                 unsigned long start = memslot->userspace_addr;
 879                 unsigned long end;
 880
 881                 end = start + (memslot->npages << PAGE_SHIFT);
 882                 if (hva >= start && hva < end) {
 883                         gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
 884
 885                         ret = handler(kvm, &memslot->rmap[gfn_offset], data);
 886
 887                         for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
 888                                 unsigned long idx;
 889                                 int sh;
 890
 891                                 sh = KVM_HPAGE_GFN_SHIFT(PT_DIRECTORY_LEVEL+j);
 892                                 idx = ((memslot->base_gfn+gfn_offset) >> sh) -
 893                                         (memslot->base_gfn >> sh);
 894                                 ret |= handler(kvm,
 895                                         &memslot->lpage_info[j][idx].rmap_pde,
 896                                         data);
 897                         }
 898                         trace_kvm_age_page(hva, memslot, ret);
 899                         retval |= ret;
 900                 }
 901         }
 902
 903         return retval;
 904 }
 905
 906 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
 907 {
 908         return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
 909 }
 910
 911 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
 912 {
 913         kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
 914 }
 915
 916 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
 917                          unsigned long data)
 918 {
 919         u64 *spte;
 920         int young = 0;
 921
 922         /*
 923          * Emulate the accessed bit for EPT, by checking if this page has
 924          * an EPT mapping, and clearing it if it does. On the next access,
 925          * a new EPT mapping will be established.
 926          * This has some overhead, but not as much as the cost of swapping
 927          * out actively used pages or breaking up actively used hugepages.
 928          */
 929         if (!shadow_accessed_mask)
 930                 return kvm_unmap_rmapp(kvm, rmapp, data);
 931
 932         spte = rmap_next(kvm, rmapp, NULL);
 933         while (spte) {
 934                 int _young;
 935                 u64 _spte = *spte;
 936                 BUG_ON(!(_spte & PT_PRESENT_MASK));
 937                 _young = _spte & PT_ACCESSED_MASK;
 938                 if (_young) {
 939                         young = 1;
 940                         clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
 941                 }
 942                 spte = rmap_next(kvm, rmapp, spte);
 943         }
 944         return young;
 945 }
 946
 947 #define RMAP_RECYCLE_THRESHOLD 1000
 948
 949 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
 950 {
 951         unsigned long *rmapp;
 952         struct kvm_mmu_page *sp;
 953
 954         sp = page_header(__pa(spte));
 955
 956         rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
 957
 958         kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
 959         kvm_flush_remote_tlbs(vcpu->kvm);
 960 }
 961
 962 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
 963 {
 964         return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
 965 }
 966
 967 #ifdef MMU_DEBUG
 968 static int is_empty_shadow_page(u64 *spt)
 969 {
 970         u64 *pos;
 971         u64 *end;
 972
 973         for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
 974                 if (is_shadow_present_pte(*pos)) {
 975                         printk(KERN_ERR "%s: %p %llx\n", __func__,
 976                                pos, *pos);
 977                         return 0;
 978                 }
 979         return 1;
 980 }
 981 #endif
 982
 983 /*
 984  * This value is the sum of all of the kvm instances's
 985  * kvm->arch.n_used_mmu_pages values.  We need a global,
 986  * aggregate version in order to make the slab shrinker
 987  * faster
 988  */
 989 static inline void kvm_mod_used_mmu_pages(struct kvm *kvm, int nr)
 990 {
 991         kvm->arch.n_used_mmu_pages += nr;
 992         percpu_counter_add(&kvm_total_used_mmu_pages, nr);
 993 }
 994
 995 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
 996 {
 997         ASSERT(is_empty_shadow_page(sp->spt));
 998         hlist_del(&sp->hash_link);
 999         list_del(&sp->link);
1000         __free_page(virt_to_page(sp->spt));
1001         if (!sp->role.direct)
1002                 __free_page(virt_to_page(sp->gfns));
1003         kmem_cache_free(mmu_page_header_cache, sp);
1004         kvm_mod_used_mmu_pages(kvm, -1);
1005 }
1006
1007 static unsigned kvm_page_table_hashfn(gfn_t gfn)
1008 {
1009         return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
1010 }
1011
1012 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
1013                                                u64 *parent_pte, int direct)
1014 {
1015         struct kvm_mmu_page *sp;
1016
1017         sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
1018         sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
1019         if (!direct)
1020                 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache,
1021                                                   PAGE_SIZE);
1022         set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
1023         list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
1024         bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
1025         sp->multimapped = 0;
1026         sp->parent_pte = parent_pte;
1027         kvm_mod_used_mmu_pages(vcpu->kvm, +1);
1028         return sp;
1029 }
1030
1031 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
1032                                     struct kvm_mmu_page *sp, u64 *parent_pte)
1033 {
1034         struct kvm_pte_chain *pte_chain;
1035         struct hlist_node *node;
1036         int i;
1037
1038         if (!parent_pte)
1039                 return;
1040         if (!sp->multimapped) {
1041                 u64 *old = sp->parent_pte;
1042
1043                 if (!old) {
1044                         sp->parent_pte = parent_pte;
1045                         return;
1046                 }
1047                 sp->multimapped = 1;
1048                 pte_chain = mmu_alloc_pte_chain(vcpu);
1049                 INIT_HLIST_HEAD(&sp->parent_ptes);
1050                 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
1051                 pte_chain->parent_ptes[0] = old;
1052         }
1053         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
1054                 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
1055                         continue;
1056                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
1057                         if (!pte_chain->parent_ptes[i]) {
1058                                 pte_chain->parent_ptes[i] = parent_pte;
1059                                 return;
1060                         }
1061         }
1062         pte_chain = mmu_alloc_pte_chain(vcpu);
1063         BUG_ON(!pte_chain);
1064         hlist_add_head(&pte_chain->link, &sp->parent_ptes);
1065         pte_chain->parent_ptes[0] = parent_pte;
1066 }
1067
1068 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
1069                                        u64 *parent_pte)
1070 {
1071         struct kvm_pte_chain *pte_chain;
1072         struct hlist_node *node;
1073         int i;
1074
1075         if (!sp->multimapped) {
1076                 BUG_ON(sp->parent_pte != parent_pte);
1077                 sp->parent_pte = NULL;
1078                 return;
1079         }
1080         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1081                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1082                         if (!pte_chain->parent_ptes[i])
1083                                 break;
1084                         if (pte_chain->parent_ptes[i] != parent_pte)
1085                                 continue;
1086                         while (i + 1 < NR_PTE_CHAIN_ENTRIES
1087                                 && pte_chain->parent_ptes[i + 1]) {
1088                                 pte_chain->parent_ptes[i]
1089                                         = pte_chain->parent_ptes[i + 1];
1090                                 ++i;
1091                         }
1092                         pte_chain->parent_ptes[i] = NULL;
1093                         if (i == 0) {
1094                                 hlist_del(&pte_chain->link);
1095                                 mmu_free_pte_chain(pte_chain);
1096                                 if (hlist_empty(&sp->parent_ptes)) {
1097                                         sp->multimapped = 0;
1098                                         sp->parent_pte = NULL;
1099                                 }
1100                         }
1101                         return;
1102                 }
1103         BUG();
1104 }
1105
1106 static void mmu_parent_walk(struct kvm_mmu_page *sp, mmu_parent_walk_fn fn)
1107 {
1108         struct kvm_pte_chain *pte_chain;
1109         struct hlist_node *node;
1110         struct kvm_mmu_page *parent_sp;
1111         int i;
1112
1113         if (!sp->multimapped && sp->parent_pte) {
1114                 parent_sp = page_header(__pa(sp->parent_pte));
1115                 fn(parent_sp, sp->parent_pte);
1116                 return;
1117         }
1118
1119         hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1120                 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1121                         u64 *spte = pte_chain->parent_ptes[i];
1122
1123                         if (!spte)
1124                                 break;
1125                         parent_sp = page_header(__pa(spte));
1126                         fn(parent_sp, spte);
1127                 }
1128 }
1129
1130 static void mark_unsync(struct kvm_mmu_page *sp, u64 *spte);
1131 static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1132 {
1133         mmu_parent_walk(sp, mark_unsync);
1134 }
1135
1136 static void mark_unsync(struct kvm_mmu_page *sp, u64 *spte)
1137 {
1138         unsigned int index;
1139
1140         index = spte - sp->spt;
1141         if (__test_and_set_bit(index, sp->unsync_child_bitmap))
1142                 return;
1143         if (sp->unsync_children++)
1144                 return;
1145         kvm_mmu_mark_parents_unsync(sp);
1146 }
1147
1148 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1149                                     struct kvm_mmu_page *sp)
1150 {
1151         int i;
1152
1153         for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1154                 sp->spt[i] = shadow_trap_nonpresent_pte;
1155 }
1156
1157 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1158                                struct kvm_mmu_page *sp, bool clear_unsync)
1159 {
1160         return 1;
1161 }
1162
1163 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1164 {
1165 }
1166
1167 #define KVM_PAGE_ARRAY_NR 16
1168
1169 struct kvm_mmu_pages {
1170         struct mmu_page_and_offset {
1171                 struct kvm_mmu_page *sp;
1172                 unsigned int idx;
1173         } page[KVM_PAGE_ARRAY_NR];
1174         unsigned int nr;
1175 };
1176
1177 #define for_each_unsync_children(bitmap, idx)           \
1178         for (idx = find_first_bit(bitmap, 512);         \
1179              idx < 512;                                 \
1180              idx = find_next_bit(bitmap, 512, idx+1))
1181
1182 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1183                          int idx)
1184 {
1185         int i;
1186
1187         if (sp->unsync)
1188                 for (i=0; i < pvec->nr; i++)
1189                         if (pvec->page[i].sp == sp)
1190                                 return 0;
1191
1192         pvec->page[pvec->nr].sp = sp;
1193         pvec->page[pvec->nr].idx = idx;
1194         pvec->nr++;
1195         return (pvec->nr == KVM_PAGE_ARRAY_NR);
1196 }
1197
1198 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1199                            struct kvm_mmu_pages *pvec)
1200 {
1201         int i, ret, nr_unsync_leaf = 0;
1202
1203         for_each_unsync_children(sp->unsync_child_bitmap, i) {
1204                 struct kvm_mmu_page *child;
1205                 u64 ent = sp->spt[i];
1206
1207                 if (!is_shadow_present_pte(ent) || is_large_pte(ent))
1208                         goto clear_child_bitmap;
1209
1210                 child = page_header(ent & PT64_BASE_ADDR_MASK);
1211
1212                 if (child->unsync_children) {
1213                         if (mmu_pages_add(pvec, child, i))
1214                                 return -ENOSPC;
1215
1216                         ret = __mmu_unsync_walk(child, pvec);
1217                         if (!ret)
1218                                 goto clear_child_bitmap;
1219                         else if (ret > 0)
1220                                 nr_unsync_leaf += ret;
1221                         else
1222                                 return ret;
1223                 } else if (child->unsync) {
1224                         nr_unsync_leaf++;
1225                         if (mmu_pages_add(pvec, child, i))
1226                                 return -ENOSPC;
1227                 } else
1228                          goto clear_child_bitmap;
1229
1230                 continue;
1231
1232 clear_child_bitmap:
1233                 __clear_bit(i, sp->unsync_child_bitmap);
1234                 sp->unsync_children--;
1235                 WARN_ON((int)sp->unsync_children < 0);
1236         }
1237
1238
1239         return nr_unsync_leaf;
1240 }
1241
1242 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1243                            struct kvm_mmu_pages *pvec)
1244 {
1245         if (!sp->unsync_children)
1246                 return 0;
1247
1248         mmu_pages_add(pvec, sp, 0);
1249         return __mmu_unsync_walk(sp, pvec);
1250 }
1251
1252 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1253 {
1254         WARN_ON(!sp->unsync);
1255         trace_kvm_mmu_sync_page(sp);
1256         sp->unsync = 0;
1257         --kvm->stat.mmu_unsync;
1258 }
1259
1260 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1261                                     struct list_head *invalid_list);
1262 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1263                                     struct list_head *invalid_list);
1264
1265 #define for_each_gfn_sp(kvm, sp, gfn, pos)                              \
1266   hlist_for_each_entry(sp, pos,                                         \
1267    &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link)   \
1268         if ((sp)->gfn != (gfn)) {} else
1269
1270 #define for_each_gfn_indirect_valid_sp(kvm, sp, gfn, pos)               \
1271   hlist_for_each_entry(sp, pos,                                         \
1272    &(kvm)->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)], hash_link)   \
1273                 if ((sp)->gfn != (gfn) || (sp)->role.direct ||          \
1274                         (sp)->role.invalid) {} else
1275
1276 /* @sp->gfn should be write-protected at the call site */
1277 static int __kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1278                            struct list_head *invalid_list, bool clear_unsync)
1279 {
1280         if (sp->role.cr4_pae != !!is_pae(vcpu)) {
1281                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1282                 return 1;
1283         }
1284
1285         if (clear_unsync)
1286                 kvm_unlink_unsync_page(vcpu->kvm, sp);
1287
1288         if (vcpu->arch.mmu.sync_page(vcpu, sp, clear_unsync)) {
1289                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, invalid_list);
1290                 return 1;
1291         }
1292
1293         kvm_mmu_flush_tlb(vcpu);
1294         return 0;
1295 }
1296
1297 static int kvm_sync_page_transient(struct kvm_vcpu *vcpu,
1298                                    struct kvm_mmu_page *sp)
1299 {
1300         LIST_HEAD(invalid_list);
1301         int ret;
1302
1303         ret = __kvm_sync_page(vcpu, sp, &invalid_list, false);
1304         if (ret)
1305                 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1306
1307         return ret;
1308 }
1309
1310 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1311                          struct list_head *invalid_list)
1312 {
1313         return __kvm_sync_page(vcpu, sp, invalid_list, true);
1314 }
1315
1316 /* @gfn should be write-protected at the call site */
1317 static void kvm_sync_pages(struct kvm_vcpu *vcpu,  gfn_t gfn)
1318 {
1319         struct kvm_mmu_page *s;
1320         struct hlist_node *node;
1321         LIST_HEAD(invalid_list);
1322         bool flush = false;
1323
1324         for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1325                 if (!s->unsync)
1326                         continue;
1327
1328                 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1329                 if ((s->role.cr4_pae != !!is_pae(vcpu)) ||
1330                         (vcpu->arch.mmu.sync_page(vcpu, s, true))) {
1331                         kvm_mmu_prepare_zap_page(vcpu->kvm, s, &invalid_list);
1332                         continue;
1333                 }
1334                 kvm_unlink_unsync_page(vcpu->kvm, s);
1335                 flush = true;
1336         }
1337
1338         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1339         if (flush)
1340                 kvm_mmu_flush_tlb(vcpu);
1341 }
1342
1343 struct mmu_page_path {
1344         struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1345         unsigned int idx[PT64_ROOT_LEVEL-1];
1346 };
1347
1348 #define for_each_sp(pvec, sp, parents, i)                       \
1349                 for (i = mmu_pages_next(&pvec, &parents, -1),   \
1350                         sp = pvec.page[i].sp;                   \
1351                         i < pvec.nr && ({ sp = pvec.page[i].sp; 1;});   \
1352                         i = mmu_pages_next(&pvec, &parents, i))
1353
1354 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1355                           struct mmu_page_path *parents,
1356                           int i)
1357 {
1358         int n;
1359
1360         for (n = i+1; n < pvec->nr; n++) {
1361                 struct kvm_mmu_page *sp = pvec->page[n].sp;
1362
1363                 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1364                         parents->idx[0] = pvec->page[n].idx;
1365                         return n;
1366                 }
1367
1368                 parents->parent[sp->role.level-2] = sp;
1369                 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1370         }
1371
1372         return n;
1373 }
1374
1375 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1376 {
1377         struct kvm_mmu_page *sp;
1378         unsigned int level = 0;
1379
1380         do {
1381                 unsigned int idx = parents->idx[level];
1382
1383                 sp = parents->parent[level];
1384                 if (!sp)
1385                         return;
1386
1387                 --sp->unsync_children;
1388                 WARN_ON((int)sp->unsync_children < 0);
1389                 __clear_bit(idx, sp->unsync_child_bitmap);
1390                 level++;
1391         } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1392 }
1393
1394 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1395                                struct mmu_page_path *parents,
1396                                struct kvm_mmu_pages *pvec)
1397 {
1398         parents->parent[parent->role.level-1] = NULL;
1399         pvec->nr = 0;
1400 }
1401
1402 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1403                               struct kvm_mmu_page *parent)
1404 {
1405         int i;
1406         struct kvm_mmu_page *sp;
1407         struct mmu_page_path parents;
1408         struct kvm_mmu_pages pages;
1409         LIST_HEAD(invalid_list);
1410
1411         kvm_mmu_pages_init(parent, &parents, &pages);
1412         while (mmu_unsync_walk(parent, &pages)) {
1413                 int protected = 0;
1414
1415                 for_each_sp(pages, sp, parents, i)
1416                         protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1417
1418                 if (protected)
1419                         kvm_flush_remote_tlbs(vcpu->kvm);
1420
1421                 for_each_sp(pages, sp, parents, i) {
1422                         kvm_sync_page(vcpu, sp, &invalid_list);
1423                         mmu_pages_clear_parents(&parents);
1424                 }
1425                 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
1426                 cond_resched_lock(&vcpu->kvm->mmu_lock);
1427                 kvm_mmu_pages_init(parent, &parents, &pages);
1428         }
1429 }
1430
1431 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1432                                              gfn_t gfn,
1433                                              gva_t gaddr,
1434                                              unsigned level,
1435                                              int direct,
1436                                              unsigned access,
1437                                              u64 *parent_pte)
1438 {
1439         union kvm_mmu_page_role role;
1440         unsigned quadrant;
1441         struct kvm_mmu_page *sp;
1442         struct hlist_node *node;
1443         bool need_sync = false;
1444
1445         role = vcpu->arch.mmu.base_role;
1446         role.level = level;
1447         role.direct = direct;
1448         if (role.direct)
1449                 role.cr4_pae = 0;
1450         role.access = access;
1451         if (!vcpu->arch.mmu.direct_map
1452             && vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1453                 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1454                 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1455                 role.quadrant = quadrant;
1456         }
1457         for_each_gfn_sp(vcpu->kvm, sp, gfn, node) {
1458                 if (!need_sync && sp->unsync)
1459                         need_sync = true;
1460
1461                 if (sp->role.word != role.word)
1462                         continue;
1463
1464                 if (sp->unsync && kvm_sync_page_transient(vcpu, sp))
1465                         break;
1466
1467                 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1468                 if (sp->unsync_children) {
1469                         kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1470                         kvm_mmu_mark_parents_unsync(sp);
1471                 } else if (sp->unsync)
1472                         kvm_mmu_mark_parents_unsync(sp);
1473
1474                 trace_kvm_mmu_get_page(sp, false);
1475                 return sp;
1476         }
1477         ++vcpu->kvm->stat.mmu_cache_miss;
1478         sp = kvm_mmu_alloc_page(vcpu, parent_pte, direct);
1479         if (!sp)
1480                 return sp;
1481         sp->gfn = gfn;
1482         sp->role = role;
1483         hlist_add_head(&sp->hash_link,
1484                 &vcpu->kvm->arch.mmu_page_hash[kvm_page_table_hashfn(gfn)]);
1485         if (!direct) {
1486                 if (rmap_write_protect(vcpu->kvm, gfn))
1487                         kvm_flush_remote_tlbs(vcpu->kvm);
1488                 if (level > PT_PAGE_TABLE_LEVEL && need_sync)
1489                         kvm_sync_pages(vcpu, gfn);
1490
1491                 account_shadowed(vcpu->kvm, gfn);
1492         }
1493         if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1494                 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1495         else
1496                 nonpaging_prefetch_page(vcpu, sp);
1497         trace_kvm_mmu_get_page(sp, true);
1498         return sp;
1499 }
1500
1501 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1502                              struct kvm_vcpu *vcpu, u64 addr)
1503 {
1504         iterator->addr = addr;
1505         iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1506         iterator->level = vcpu->arch.mmu.shadow_root_level;
1507
1508         if (iterator->level == PT64_ROOT_LEVEL &&
1509             vcpu->arch.mmu.root_level < PT64_ROOT_LEVEL &&
1510             !vcpu->arch.mmu.direct_map)
1511                 --iterator->level;
1512
1513         if (iterator->level == PT32E_ROOT_LEVEL) {
1514                 iterator->shadow_addr
1515                         = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1516                 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1517                 --iterator->level;
1518                 if (!iterator->shadow_addr)
1519                         iterator->level = 0;
1520         }
1521 }
1522
1523 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1524 {
1525         if (iterator->level < PT_PAGE_TABLE_LEVEL)
1526                 return false;
1527
1528         if (iterator->level == PT_PAGE_TABLE_LEVEL)
1529                 if (is_large_pte(*iterator->sptep))
1530                         return false;
1531
1532         iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1533         iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1534         return true;
1535 }
1536
1537 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1538 {
1539         iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1540         --iterator->level;
1541 }
1542
1543 static void link_shadow_page(u64 *sptep, struct kvm_mmu_page *sp)
1544 {
1545         u64 spte;
1546
1547         spte = __pa(sp->spt)
1548                 | PT_PRESENT_MASK | PT_ACCESSED_MASK
1549                 | PT_WRITABLE_MASK | PT_USER_MASK;
1550         __set_spte(sptep, spte);
1551 }
1552
1553 static void drop_large_spte(struct kvm_vcpu *vcpu, u64 *sptep)
1554 {
1555         if (is_large_pte(*sptep)) {
1556                 drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
1557                 kvm_flush_remote_tlbs(vcpu->kvm);
1558         }
1559 }
1560
1561 static void validate_direct_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1562                                    unsigned direct_access)
1563 {
1564         if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep)) {
1565                 struct kvm_mmu_page *child;
1566
1567                 /*
1568                  * For the direct sp, if the guest pte's dirty bit
1569                  * changed form clean to dirty, it will corrupt the
1570                  * sp's access: allow writable in the read-only sp,
1571                  * so we should update the spte at this point to get
1572                  * a new sp with the correct access.
1573                  */
1574                 child = page_header(*sptep & PT64_BASE_ADDR_MASK);
1575                 if (child->role.access == direct_access)
1576                         return;
1577
1578                 mmu_page_remove_parent_pte(child, sptep);
1579                 __set_spte(sptep, shadow_trap_nonpresent_pte);
1580                 kvm_flush_remote_tlbs(vcpu->kvm);
1581         }
1582 }
1583
1584 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1585                                          struct kvm_mmu_page *sp)
1586 {
1587         unsigned i;
1588         u64 *pt;
1589         u64 ent;
1590
1591         pt = sp->spt;
1592
1593         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1594                 ent = pt[i];
1595
1596                 if (is_shadow_present_pte(ent)) {
1597                         if (!is_last_spte(ent, sp->role.level)) {
1598                                 ent &= PT64_BASE_ADDR_MASK;
1599                                 mmu_page_remove_parent_pte(page_header(ent),
1600                                                            &pt[i]);
1601                         } else {
1602                                 if (is_large_pte(ent))
1603                                         --kvm->stat.lpages;
1604                                 drop_spte(kvm, &pt[i],
1605                                           shadow_trap_nonpresent_pte);
1606                         }
1607                 }
1608                 pt[i] = shadow_trap_nonpresent_pte;
1609         }
1610 }
1611
1612 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1613 {
1614         mmu_page_remove_parent_pte(sp, parent_pte);
1615 }
1616
1617 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1618 {
1619         int i;
1620         struct kvm_vcpu *vcpu;
1621
1622         kvm_for_each_vcpu(i, vcpu, kvm)
1623                 vcpu->arch.last_pte_updated = NULL;
1624 }
1625
1626 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1627 {
1628         u64 *parent_pte;
1629
1630         while (sp->multimapped || sp->parent_pte) {
1631                 if (!sp->multimapped)
1632                         parent_pte = sp->parent_pte;
1633                 else {
1634                         struct kvm_pte_chain *chain;
1635
1636                         chain = container_of(sp->parent_ptes.first,
1637                                              struct kvm_pte_chain, link);
1638                         parent_pte = chain->parent_ptes[0];
1639                 }
1640                 BUG_ON(!parent_pte);
1641                 kvm_mmu_put_page(sp, parent_pte);
1642                 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1643         }
1644 }
1645
1646 static int mmu_zap_unsync_children(struct kvm *kvm,
1647                                    struct kvm_mmu_page *parent,
1648                                    struct list_head *invalid_list)
1649 {
1650         int i, zapped = 0;
1651         struct mmu_page_path parents;
1652         struct kvm_mmu_pages pages;
1653
1654         if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1655                 return 0;
1656
1657         kvm_mmu_pages_init(parent, &parents, &pages);
1658         while (mmu_unsync_walk(parent, &pages)) {
1659                 struct kvm_mmu_page *sp;
1660
1661                 for_each_sp(pages, sp, parents, i) {
1662                         kvm_mmu_prepare_zap_page(kvm, sp, invalid_list);
1663                         mmu_pages_clear_parents(&parents);
1664                         zapped++;
1665                 }
1666                 kvm_mmu_pages_init(parent, &parents, &pages);
1667         }
1668
1669         return zapped;
1670 }
1671
1672 static int kvm_mmu_prepare_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp,
1673                                     struct list_head *invalid_list)
1674 {
1675         int ret;
1676
1677         trace_kvm_mmu_prepare_zap_page(sp);
1678         ++kvm->stat.mmu_shadow_zapped;
1679         ret = mmu_zap_unsync_children(kvm, sp, invalid_list);
1680         kvm_mmu_page_unlink_children(kvm, sp);
1681         kvm_mmu_unlink_parents(kvm, sp);
1682         if (!sp->role.invalid && !sp->role.direct)
1683                 unaccount_shadowed(kvm, sp->gfn);
1684         if (sp->unsync)
1685                 kvm_unlink_unsync_page(kvm, sp);
1686         if (!sp->root_count) {
1687                 /* Count self */
1688                 ret++;
1689                 list_move(&sp->link, invalid_list);
1690         } else {
1691                 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1692                 kvm_reload_remote_mmus(kvm);
1693         }
1694
1695         sp->role.invalid = 1;
1696         kvm_mmu_reset_last_pte_updated(kvm);
1697         return ret;
1698 }
1699
1700 static void kvm_mmu_commit_zap_page(struct kvm *kvm,
1701                                     struct list_head *invalid_list)
1702 {
1703         struct kvm_mmu_page *sp;
1704
1705         if (list_empty(invalid_list))
1706                 return;
1707
1708         kvm_flush_remote_tlbs(kvm);
1709
1710         do {
1711                 sp = list_first_entry(invalid_list, struct kvm_mmu_page, link);
1712                 WARN_ON(!sp->role.invalid || sp->root_count);
1713                 kvm_mmu_free_page(kvm, sp);
1714         } while (!list_empty(invalid_list));
1715
1716 }
1717
1718 /*
1719  * Changing the number of mmu pages allocated to the vm
1720  * Note: if goal_nr_mmu_pages is too small, you will get dead lock
1721  */
1722 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int goal_nr_mmu_pages)
1723 {
1724         LIST_HEAD(invalid_list);
1725         /*
1726          * If we set the number of mmu pages to be smaller be than the
1727          * number of actived pages , we must to free some mmu pages before we
1728          * change the value
1729          */
1730
1731         if (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages) {
1732                 while (kvm->arch.n_used_mmu_pages > goal_nr_mmu_pages &&
1733                         !list_empty(&kvm->arch.active_mmu_pages)) {
1734                         struct kvm_mmu_page *page;
1735
1736                         page = container_of(kvm->arch.active_mmu_pages.prev,
1737                                             struct kvm_mmu_page, link);
1738                         kvm_mmu_prepare_zap_page(kvm, page, &invalid_list);
1739                         kvm_mmu_commit_zap_page(kvm, &invalid_list);
1740                 }
1741                 goal_nr_mmu_pages = kvm->arch.n_used_mmu_pages;
1742         }
1743
1744         kvm->arch.n_max_mmu_pages = goal_nr_mmu_pages;
1745 }
1746
1747 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1748 {
1749         struct kvm_mmu_page *sp;
1750         struct hlist_node *node;
1751         LIST_HEAD(invalid_list);
1752         int r;
1753
1754         pgprintk("%s: looking for gfn %llx\n", __func__, gfn);
1755         r = 0;
1756
1757         for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1758                 pgprintk("%s: gfn %llx role %x\n", __func__, gfn,
1759                          sp->role.word);
1760                 r = 1;
1761                 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1762         }
1763         kvm_mmu_commit_zap_page(kvm, &invalid_list);
1764         return r;
1765 }
1766
1767 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1768 {
1769         struct kvm_mmu_page *sp;
1770         struct hlist_node *node;
1771         LIST_HEAD(invalid_list);
1772
1773         for_each_gfn_indirect_valid_sp(kvm, sp, gfn, node) {
1774                 pgprintk("%s: zap %llx %x\n",
1775                          __func__, gfn, sp->role.word);
1776                 kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list);
1777         }
1778         kvm_mmu_commit_zap_page(kvm, &invalid_list);
1779 }
1780
1781 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1782 {
1783         int slot = memslot_id(kvm, gfn);
1784         struct kvm_mmu_page *sp = page_header(__pa(pte));
1785
1786         __set_bit(slot, sp->slot_bitmap);
1787 }
1788
1789 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1790 {
1791         int i;
1792         u64 *pt = sp->spt;
1793
1794         if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1795                 return;
1796
1797         for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1798                 if (pt[i] == shadow_notrap_nonpresent_pte)
1799                         __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1800         }
1801 }
1802
1803 /*
1804  * The function is based on mtrr_type_lookup() in
1805  * arch/x86/kernel/cpu/mtrr/generic.c
1806  */
1807 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1808                          u64 start, u64 end)
1809 {
1810         int i;
1811         u64 base, mask;
1812         u8 prev_match, curr_match;
1813         int num_var_ranges = KVM_NR_VAR_MTRR;
1814
1815         if (!mtrr_state->enabled)
1816                 return 0xFF;
1817
1818         /* Make end inclusive end, instead of exclusive */
1819         end--;
1820
1821         /* Look in fixed ranges. Just return the type as per start */
1822         if (mtrr_state->have_fixed && (start < 0x100000)) {
1823                 int idx;
1824
1825                 if (start < 0x80000) {
1826                         idx = 0;
1827                         idx += (start >> 16);
1828                         return mtrr_state->fixed_ranges[idx];
1829                 } else if (start < 0xC0000) {
1830                         idx = 1 * 8;
1831                         idx += ((start - 0x80000) >> 14);
1832                         return mtrr_state->fixed_ranges[idx];
1833                 } else if (start < 0x1000000) {
1834                         idx = 3 * 8;
1835                         idx += ((start - 0xC0000) >> 12);
1836                         return mtrr_state->fixed_ranges[idx];
1837                 }
1838         }
1839
1840         /*
1841          * Look in variable ranges
1842          * Look of multiple ranges matching this address and pick type
1843          * as per MTRR precedence
1844          */
1845         if (!(mtrr_state->enabled & 2))
1846                 return mtrr_state->def_type;
1847
1848         prev_match = 0xFF;
1849         for (i = 0; i < num_var_ranges; ++i) {
1850                 unsigned short start_state, end_state;
1851
1852                 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1853                         continue;
1854
1855                 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1856                        (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1857                 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1858                        (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1859
1860                 start_state = ((start & mask) == (base & mask));
1861                 end_state = ((end & mask) == (base & mask));
1862                 if (start_state != end_state)
1863                         return 0xFE;
1864
1865                 if ((start & mask) != (base & mask))
1866                         continue;
1867
1868                 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1869                 if (prev_match == 0xFF) {
1870                         prev_match = curr_match;
1871                         continue;
1872                 }
1873
1874                 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1875                     curr_match == MTRR_TYPE_UNCACHABLE)
1876                         return MTRR_TYPE_UNCACHABLE;
1877
1878                 if ((prev_match == MTRR_TYPE_WRBACK &&
1879                      curr_match == MTRR_TYPE_WRTHROUGH) ||
1880                     (prev_match == MTRR_TYPE_WRTHROUGH &&
1881                      curr_match == MTRR_TYPE_WRBACK)) {
1882                         prev_match = MTRR_TYPE_WRTHROUGH;
1883                         curr_match = MTRR_TYPE_WRTHROUGH;
1884                 }
1885
1886                 if (prev_match != curr_match)
1887                         return MTRR_TYPE_UNCACHABLE;
1888         }
1889
1890         if (prev_match != 0xFF)
1891                 return prev_match;
1892
1893         return mtrr_state->def_type;
1894 }
1895
1896 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1897 {
1898         u8 mtrr;
1899
1900         mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1901                              (gfn << PAGE_SHIFT) + PAGE_SIZE);
1902         if (mtrr == 0xfe || mtrr == 0xff)
1903                 mtrr = MTRR_TYPE_WRBACK;
1904         return mtrr;
1905 }
1906 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1907
1908 static void __kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1909 {
1910         trace_kvm_mmu_unsync_page(sp);
1911         ++vcpu->kvm->stat.mmu_unsync;
1912         sp->unsync = 1;
1913
1914         kvm_mmu_mark_parents_unsync(sp);
1915         mmu_convert_notrap(sp);
1916 }
1917
1918 static void kvm_unsync_pages(struct kvm_vcpu *vcpu,  gfn_t gfn)
1919 {
1920         struct kvm_mmu_page *s;
1921         struct hlist_node *node;
1922
1923         for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1924                 if (s->unsync)
1925                         continue;
1926                 WARN_ON(s->role.level != PT_PAGE_TABLE_LEVEL);
1927                 __kvm_unsync_page(vcpu, s);
1928         }
1929 }
1930
1931 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1932                                   bool can_unsync)
1933 {
1934         struct kvm_mmu_page *s;
1935         struct hlist_node *node;
1936         bool need_unsync = false;
1937
1938         for_each_gfn_indirect_valid_sp(vcpu->kvm, s, gfn, node) {
1939                 if (!can_unsync)
1940                         return 1;
1941
1942                 if (s->role.level != PT_PAGE_TABLE_LEVEL)
1943                         return 1;
1944
1945                 if (!need_unsync && !s->unsync) {
1946                         if (!oos_shadow)
1947                                 return 1;
1948                         need_unsync = true;
1949                 }
1950         }
1951         if (need_unsync)
1952                 kvm_unsync_pages(vcpu, gfn);
1953         return 0;
1954 }
1955
1956 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1957                     unsigned pte_access, int user_fault,
1958                     int write_fault, int dirty, int level,
1959                     gfn_t gfn, pfn_t pfn, bool speculative,
1960                     bool can_unsync, bool reset_host_protection)
1961 {
1962         u64 spte;
1963         int ret = 0;
1964
1965         /*
1966          * We don't set the accessed bit, since we sometimes want to see
1967          * whether the guest actually used the pte (in order to detect
1968          * demand paging).
1969          */
1970         spte = shadow_base_present_pte;
1971         if (!speculative)
1972                 spte |= shadow_accessed_mask;
1973         if (!dirty)
1974                 pte_access &= ~ACC_WRITE_MASK;
1975         if (pte_access & ACC_EXEC_MASK)
1976                 spte |= shadow_x_mask;
1977         else
1978                 spte |= shadow_nx_mask;
1979         if (pte_access & ACC_USER_MASK)
1980                 spte |= shadow_user_mask;
1981         if (level > PT_PAGE_TABLE_LEVEL)
1982                 spte |= PT_PAGE_SIZE_MASK;
1983         if (tdp_enabled)
1984                 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1985                         kvm_is_mmio_pfn(pfn));
1986
1987         if (reset_host_protection)
1988                 spte |= SPTE_HOST_WRITEABLE;
1989
1990         spte |= (u64)pfn << PAGE_SHIFT;
1991
1992         if ((pte_access & ACC_WRITE_MASK)
1993             || (!vcpu->arch.mmu.direct_map && write_fault
1994                 && !is_write_protection(vcpu) && !user_fault)) {
1995
1996                 if (level > PT_PAGE_TABLE_LEVEL &&
1997                     has_wrprotected_page(vcpu->kvm, gfn, level)) {
1998                         ret = 1;
1999                         drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
2000                         goto done;
2001                 }
2002
2003                 spte |= PT_WRITABLE_MASK;
2004
2005                 if (!vcpu->arch.mmu.direct_map
2006                     && !(pte_access & ACC_WRITE_MASK))
2007                         spte &= ~PT_USER_MASK;
2008
2009                 /*
2010                  * Optimization: for pte sync, if spte was writable the hash
2011                  * lookup is unnecessary (and expensive). Write protection
2012                  * is responsibility of mmu_get_page / kvm_sync_page.
2013                  * Same reasoning can be applied to dirty page accounting.
2014                  */
2015                 if (!can_unsync && is_writable_pte(*sptep))
2016                         goto set_pte;
2017
2018                 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
2019                         pgprintk("%s: found shadow page for %llx, marking ro\n",
2020                                  __func__, gfn);
2021                         ret = 1;
2022                         pte_access &= ~ACC_WRITE_MASK;
2023                         if (is_writable_pte(spte))
2024                                 spte &= ~PT_WRITABLE_MASK;
2025                 }
2026         }
2027
2028         if (pte_access & ACC_WRITE_MASK)
2029                 mark_page_dirty(vcpu->kvm, gfn);
2030
2031 set_pte:
2032         update_spte(sptep, spte);
2033 done:
2034         return ret;
2035 }
2036
2037 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
2038                          unsigned pt_access, unsigned pte_access,
2039                          int user_fault, int write_fault, int dirty,
2040                          int *ptwrite, int level, gfn_t gfn,
2041                          pfn_t pfn, bool speculative,
2042                          bool reset_host_protection)
2043 {
2044         int was_rmapped = 0;
2045         int rmap_count;
2046
2047         pgprintk("%s: spte %llx access %x write_fault %d"
2048                  " user_fault %d gfn %llx\n",
2049                  __func__, *sptep, pt_access,
2050                  write_fault, user_fault, gfn);
2051
2052         if (is_rmap_spte(*sptep)) {
2053                 /*
2054                  * If we overwrite a PTE page pointer with a 2MB PMD, unlink
2055                  * the parent of the now unreachable PTE.
2056                  */
2057                 if (level > PT_PAGE_TABLE_LEVEL &&
2058                     !is_large_pte(*sptep)) {
2059                         struct kvm_mmu_page *child;
2060                         u64 pte = *sptep;
2061
2062                         child = page_header(pte & PT64_BASE_ADDR_MASK);
2063                         mmu_page_remove_parent_pte(child, sptep);
2064                         __set_spte(sptep, shadow_trap_nonpresent_pte);
2065                         kvm_flush_remote_tlbs(vcpu->kvm);
2066                 } else if (pfn != spte_to_pfn(*sptep)) {
2067                         pgprintk("hfn old %llx new %llx\n",
2068                                  spte_to_pfn(*sptep), pfn);
2069                         drop_spte(vcpu->kvm, sptep, shadow_trap_nonpresent_pte);
2070                         kvm_flush_remote_tlbs(vcpu->kvm);
2071                 } else
2072                         was_rmapped = 1;
2073         }
2074
2075         if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
2076                       dirty, level, gfn, pfn, speculative, true,
2077                       reset_host_protection)) {
2078                 if (write_fault)
2079                         *ptwrite = 1;
2080                 kvm_mmu_flush_tlb(vcpu);
2081         }
2082
2083         pgprintk("%s: setting spte %llx\n", __func__, *sptep);
2084         pgprintk("instantiating %s PTE (%s) at %llx (%llx) addr %p\n",
2085                  is_large_pte(*sptep)? "2MB" : "4kB",
2086                  *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
2087                  *sptep, sptep);
2088         if (!was_rmapped && is_large_pte(*sptep))
2089                 ++vcpu->kvm->stat.lpages;
2090
2091         page_header_update_slot(vcpu->kvm, sptep, gfn);
2092         if (!was_rmapped) {
2093                 rmap_count = rmap_add(vcpu, sptep, gfn);
2094                 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
2095                         rmap_recycle(vcpu, sptep, gfn);
2096         }
2097         kvm_release_pfn_clean(pfn);
2098         if (speculative) {
2099                 vcpu->arch.last_pte_updated = sptep;
2100                 vcpu->arch.last_pte_gfn = gfn;
2101         }
2102 }
2103
2104 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
2105 {
2106 }
2107
2108 static struct kvm_memory_slot *
2109 pte_prefetch_gfn_to_memslot(struct kvm_vcpu *vcpu, gfn_t gfn, bool no_dirty_log)
2110 {
2111         struct kvm_memory_slot *slot;
2112
2113         slot = gfn_to_memslot(vcpu->kvm, gfn);
2114         if (!slot || slot->flags & KVM_MEMSLOT_INVALID ||
2115               (no_dirty_log && slot->dirty_bitmap))
2116                 slot = NULL;
2117
2118         return slot;
2119 }
2120
2121 static pfn_t pte_prefetch_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn,
2122                                      bool no_dirty_log)
2123 {
2124         struct kvm_memory_slot *slot;
2125         unsigned long hva;
2126
2127         slot = pte_prefetch_gfn_to_memslot(vcpu, gfn, no_dirty_log);
2128         if (!slot) {
2129                 get_page(bad_page);
2130                 return page_to_pfn(bad_page);
2131         }
2132
2133         hva = gfn_to_hva_memslot(slot, gfn);
2134
2135         return hva_to_pfn_atomic(vcpu->kvm, hva);
2136 }
2137
2138 static int direct_pte_prefetch_many(struct kvm_vcpu *vcpu,
2139                                     struct kvm_mmu_page *sp,
2140                                     u64 *start, u64 *end)
2141 {
2142         struct page *pages[PTE_PREFETCH_NUM];
2143         unsigned access = sp->role.access;
2144         int i, ret;
2145         gfn_t gfn;
2146
2147         gfn = kvm_mmu_page_get_gfn(sp, start - sp->spt);
2148         if (!pte_prefetch_gfn_to_memslot(vcpu, gfn, access & ACC_WRITE_MASK))
2149                 return -1;
2150
2151         ret = gfn_to_page_many_atomic(vcpu->kvm, gfn, pages, end - start);
2152         if (ret <= 0)
2153                 return -1;
2154
2155         for (i = 0; i < ret; i++, gfn++, start++)
2156                 mmu_set_spte(vcpu, start, ACC_ALL,
2157                              access, 0, 0, 1, NULL,
2158                              sp->role.level, gfn,
2159                              page_to_pfn(pages[i]), true, true);
2160
2161         return 0;
2162 }
2163
2164 static void __direct_pte_prefetch(struct kvm_vcpu *vcpu,
2165                                   struct kvm_mmu_page *sp, u64 *sptep)
2166 {
2167         u64 *spte, *start = NULL;
2168         int i;
2169
2170         WARN_ON(!sp->role.direct);
2171
2172         i = (sptep - sp->spt) & ~(PTE_PREFETCH_NUM - 1);
2173         spte = sp->spt + i;
2174
2175         for (i = 0; i < PTE_PREFETCH_NUM; i++, spte++) {
2176                 if (*spte != shadow_trap_nonpresent_pte || spte == sptep) {
2177                         if (!start)
2178                                 continue;
2179                         if (direct_pte_prefetch_many(vcpu, sp, start, spte) < 0)
2180                                 break;
2181                         start = NULL;
2182                 } else if (!start)
2183                         start = spte;
2184         }
2185 }
2186
2187 static void direct_pte_prefetch(struct kvm_vcpu *vcpu, u64 *sptep)
2188 {
2189         struct kvm_mmu_page *sp;
2190
2191         /*
2192          * Since it's no accessed bit on EPT, it's no way to
2193          * distinguish between actually accessed translations
2194          * and prefetched, so disable pte prefetch if EPT is
2195          * enabled.
2196          */
2197         if (!shadow_accessed_mask)
2198                 return;
2199
2200         sp = page_header(__pa(sptep));
2201         if (sp->role.level > PT_PAGE_TABLE_LEVEL)
2202                 return;
2203
2204         __direct_pte_prefetch(vcpu, sp, sptep);
2205 }
2206
2207 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
2208                         int level, gfn_t gfn, pfn_t pfn)
2209 {
2210         struct kvm_shadow_walk_iterator iterator;
2211         struct kvm_mmu_page *sp;
2212         int pt_write = 0;
2213         gfn_t pseudo_gfn;
2214
2215         for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
2216                 if (iterator.level == level) {
2217                         mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
2218                                      0, write, 1, &pt_write,
2219                                      level, gfn, pfn, false, true);
2220                         direct_pte_prefetch(vcpu, iterator.sptep);
2221                         ++vcpu->stat.pf_fixed;
2222                         break;
2223                 }
2224
2225                 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
2226                         u64 base_addr = iterator.addr;
2227
2228                         base_addr &= PT64_LVL_ADDR_MASK(iterator.level);
2229                         pseudo_gfn = base_addr >> PAGE_SHIFT;
2230                         sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
2231                                               iterator.level - 1,
2232                                               1, ACC_ALL, iterator.sptep);
2233                         if (!sp) {
2234                                 pgprintk("nonpaging_map: ENOMEM\n");
2235                                 kvm_release_pfn_clean(pfn);
2236                                 return -ENOMEM;
2237                         }
2238
2239                         __set_spte(iterator.sptep,
2240                                    __pa(sp->spt)
2241                                    | PT_PRESENT_MASK | PT_WRITABLE_MASK
2242                                    | shadow_user_mask | shadow_x_mask);
2243                 }
2244         }
2245         return pt_write;
2246 }
2247
2248 static void kvm_send_hwpoison_signal(struct kvm *kvm, gfn_t gfn)
2249 {
2250         char buf[1];
2251         void __user *hva;
2252         int r;
2253
2254         /* Touch the page, so send SIGBUS */
2255         hva = (void __user *)gfn_to_hva(kvm, gfn);
2256         r = copy_from_user(buf, hva, 1);
2257 }
2258
2259 static int kvm_handle_bad_page(struct kvm *kvm, gfn_t gfn, pfn_t pfn)
2260 {
2261         kvm_release_pfn_clean(pfn);
2262         if (is_hwpoison_pfn(pfn)) {
2263                 kvm_send_hwpoison_signal(kvm, gfn);
2264                 return 0;
2265         } else if (is_fault_pfn(pfn))
2266                 return -EFAULT;
2267
2268         return 1;
2269 }
2270
2271 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
2272 {
2273         int r;
2274         int level;
2275         pfn_t pfn;
2276         unsigned long mmu_seq;
2277
2278         level = mapping_level(vcpu, gfn);
2279
2280         /*
2281          * This path builds a PAE pagetable - so we can map 2mb pages at
2282          * maximum. Therefore check if the level is larger than that.
2283          */
2284         if (level > PT_DIRECTORY_LEVEL)
2285                 level = PT_DIRECTORY_LEVEL;
2286
2287         gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2288
2289         mmu_seq = vcpu->kvm->mmu_notifier_seq;
2290         smp_rmb();
2291         pfn = gfn_to_pfn(vcpu->kvm, gfn);
2292
2293         /* mmio */
2294         if (is_error_pfn(pfn))
2295                 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2296
2297         spin_lock(&vcpu->kvm->mmu_lock);
2298         if (mmu_notifier_retry(vcpu, mmu_seq))
2299                 goto out_unlock;
2300         kvm_mmu_free_some_pages(vcpu);
2301         r = __direct_map(vcpu, v, write, level, gfn, pfn);
2302         spin_unlock(&vcpu->kvm->mmu_lock);
2303
2304
2305         return r;
2306
2307 out_unlock:
2308         spin_unlock(&vcpu->kvm->mmu_lock);
2309         kvm_release_pfn_clean(pfn);
2310         return 0;
2311 }
2312
2313
2314 static void mmu_free_roots(struct kvm_vcpu *vcpu)
2315 {
2316         int i;
2317         struct kvm_mmu_page *sp;
2318         LIST_HEAD(invalid_list);
2319
2320         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2321                 return;
2322         spin_lock(&vcpu->kvm->mmu_lock);
2323         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL &&
2324             (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL ||
2325              vcpu->arch.mmu.direct_map)) {
2326                 hpa_t root = vcpu->arch.mmu.root_hpa;
2327
2328                 sp = page_header(root);
2329                 --sp->root_count;
2330                 if (!sp->root_count && sp->role.invalid) {
2331                         kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
2332                         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2333                 }
2334                 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2335                 spin_unlock(&vcpu->kvm->mmu_lock);
2336                 return;
2337         }
2338         for (i = 0; i < 4; ++i) {
2339                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2340
2341                 if (root) {
2342                         root &= PT64_BASE_ADDR_MASK;
2343                         sp = page_header(root);
2344                         --sp->root_count;
2345                         if (!sp->root_count && sp->role.invalid)
2346                                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
2347                                                          &invalid_list);
2348                 }
2349                 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2350         }
2351         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
2352         spin_unlock(&vcpu->kvm->mmu_lock);
2353         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2354 }
2355
2356 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2357 {
2358         int ret = 0;
2359
2360         if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2361                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2362                 ret = 1;
2363         }
2364
2365         return ret;
2366 }
2367
2368 static int mmu_alloc_direct_roots(struct kvm_vcpu *vcpu)
2369 {
2370         struct kvm_mmu_page *sp;
2371         int i;
2372
2373         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2374                 spin_lock(&vcpu->kvm->mmu_lock);
2375                 kvm_mmu_free_some_pages(vcpu);
2376                 sp = kvm_mmu_get_page(vcpu, 0, 0, PT64_ROOT_LEVEL,
2377                                       1, ACC_ALL, NULL);
2378                 ++sp->root_count;
2379                 spin_unlock(&vcpu->kvm->mmu_lock);
2380                 vcpu->arch.mmu.root_hpa = __pa(sp->spt);
2381         } else if (vcpu->arch.mmu.shadow_root_level == PT32E_ROOT_LEVEL) {
2382                 for (i = 0; i < 4; ++i) {
2383                         hpa_t root = vcpu->arch.mmu.pae_root[i];
2384
2385                         ASSERT(!VALID_PAGE(root));
2386                         spin_lock(&vcpu->kvm->mmu_lock);
2387                         kvm_mmu_free_some_pages(vcpu);
2388                         sp = kvm_mmu_get_page(vcpu, i << 30, i << 30,
2389                                               PT32_ROOT_LEVEL, 1, ACC_ALL,
2390                                               NULL);
2391                         root = __pa(sp->spt);
2392                         ++sp->root_count;
2393                         spin_unlock(&vcpu->kvm->mmu_lock);
2394                         vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2395                         vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2396                 }
2397         } else
2398                 BUG();
2399
2400         return 0;
2401 }
2402
2403 static int mmu_alloc_shadow_roots(struct kvm_vcpu *vcpu)
2404 {
2405         struct kvm_mmu_page *sp;
2406         u64 pdptr, pm_mask;
2407         gfn_t root_gfn;
2408         int i;
2409
2410         root_gfn = vcpu->arch.mmu.get_cr3(vcpu) >> PAGE_SHIFT;
2411
2412         if (mmu_check_root(vcpu, root_gfn))
2413                 return 1;
2414
2415         /*
2416          * Do we shadow a long mode page table? If so we need to
2417          * write-protect the guests page table root.
2418          */
2419         if (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL) {
2420                 hpa_t root = vcpu->arch.mmu.root_hpa;
2421
2422                 ASSERT(!VALID_PAGE(root));
2423
2424                 spin_lock(&vcpu->kvm->mmu_lock);
2425                 kvm_mmu_free_some_pages(vcpu);
2426                 sp = kvm_mmu_get_page(vcpu, root_gfn, 0, PT64_ROOT_LEVEL,
2427                                       0, ACC_ALL, NULL);
2428                 root = __pa(sp->spt);
2429                 ++sp->root_count;
2430                 spin_unlock(&vcpu->kvm->mmu_lock);
2431                 vcpu->arch.mmu.root_hpa = root;
2432                 return 0;
2433         }
2434
2435         /*
2436          * We shadow a 32 bit page table. This may be a legacy 2-level
2437          * or a PAE 3-level page table. In either case we need to be aware that
2438          * the shadow page table may be a PAE or a long mode page table.
2439          */
2440         pm_mask = PT_PRESENT_MASK;
2441         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL)
2442                 pm_mask |= PT_ACCESSED_MASK | PT_WRITABLE_MASK | PT_USER_MASK;
2443
2444         for (i = 0; i < 4; ++i) {
2445                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2446
2447                 ASSERT(!VALID_PAGE(root));
2448                 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2449                         pdptr = kvm_pdptr_read_mmu(vcpu, &vcpu->arch.mmu, i);
2450                         if (!is_present_gpte(pdptr)) {
2451                                 vcpu->arch.mmu.pae_root[i] = 0;
2452                                 continue;
2453                         }
2454                         root_gfn = pdptr >> PAGE_SHIFT;
2455                         if (mmu_check_root(vcpu, root_gfn))
2456                                 return 1;
2457                 }
2458                 spin_lock(&vcpu->kvm->mmu_lock);
2459                 kvm_mmu_free_some_pages(vcpu);
2460                 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2461                                       PT32_ROOT_LEVEL, 0,
2462                                       ACC_ALL, NULL);
2463                 root = __pa(sp->spt);
2464                 ++sp->root_count;
2465                 spin_unlock(&vcpu->kvm->mmu_lock);
2466
2467                 vcpu->arch.mmu.pae_root[i] = root | pm_mask;
2468                 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2469         }
2470
2471         /*
2472          * If we shadow a 32 bit page table with a long mode page
2473          * table we enter this path.
2474          */
2475         if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2476                 if (vcpu->arch.mmu.lm_root == NULL) {
2477                         /*
2478                          * The additional page necessary for this is only
2479                          * allocated on demand.
2480                          */
2481
2482                         u64 *lm_root;
2483
2484                         lm_root = (void*)get_zeroed_page(GFP_KERNEL);
2485                         if (lm_root == NULL)
2486                                 return 1;
2487
2488                         lm_root[0] = __pa(vcpu->arch.mmu.pae_root) | pm_mask;
2489
2490                         vcpu->arch.mmu.lm_root = lm_root;
2491                 }
2492
2493                 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.lm_root);
2494         }
2495
2496         return 0;
2497 }
2498
2499 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2500 {
2501         if (vcpu->arch.mmu.direct_map)
2502                 return mmu_alloc_direct_roots(vcpu);
2503         else
2504                 return mmu_alloc_shadow_roots(vcpu);
2505 }
2506
2507 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2508 {
2509         int i;
2510         struct kvm_mmu_page *sp;
2511
2512         if (vcpu->arch.mmu.direct_map)
2513                 return;
2514
2515         if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2516                 return;
2517         if (vcpu->arch.mmu.root_level == PT64_ROOT_LEVEL) {
2518                 hpa_t root = vcpu->arch.mmu.root_hpa;
2519                 sp = page_header(root);
2520                 mmu_sync_children(vcpu, sp);
2521                 return;
2522         }
2523         for (i = 0; i < 4; ++i) {
2524                 hpa_t root = vcpu->arch.mmu.pae_root[i];
2525
2526                 if (root && VALID_PAGE(root)) {
2527                         root &= PT64_BASE_ADDR_MASK;
2528                         sp = page_header(root);
2529                         mmu_sync_children(vcpu, sp);
2530                 }
2531         }
2532 }
2533
2534 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2535 {
2536         spin_lock(&vcpu->kvm->mmu_lock);
2537         mmu_sync_roots(vcpu);
2538         spin_unlock(&vcpu->kvm->mmu_lock);
2539 }
2540
2541 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2542                                   u32 access, u32 *error)
2543 {
2544         if (error)
2545                 *error = 0;
2546         return vaddr;
2547 }
2548
2549 static gpa_t nonpaging_gva_to_gpa_nested(struct kvm_vcpu *vcpu, gva_t vaddr,
2550                                          u32 access, u32 *error)
2551 {
2552         if (error)
2553                 *error = 0;
2554         return vcpu->arch.nested_mmu.translate_gpa(vcpu, vaddr, access);
2555 }
2556
2557 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2558                                 u32 error_code)
2559 {
2560         gfn_t gfn;
2561         int r;
2562
2563         pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2564         r = mmu_topup_memory_caches(vcpu);
2565         if (r)
2566                 return r;
2567
2568         ASSERT(vcpu);
2569         ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2570
2571         gfn = gva >> PAGE_SHIFT;
2572
2573         return nonpaging_map(vcpu, gva & PAGE_MASK,
2574                              error_code & PFERR_WRITE_MASK, gfn);
2575 }
2576
2577 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2578                                 u32 error_code)
2579 {
2580         pfn_t pfn;
2581         int r;
2582         int level;
2583         gfn_t gfn = gpa >> PAGE_SHIFT;
2584         unsigned long mmu_seq;
2585
2586         ASSERT(vcpu);
2587         ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2588
2589         r = mmu_topup_memory_caches(vcpu);
2590         if (r)
2591                 return r;
2592
2593         level = mapping_level(vcpu, gfn);
2594
2595         gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2596
2597         mmu_seq = vcpu->kvm->mmu_notifier_seq;
2598         smp_rmb();
2599         pfn = gfn_to_pfn(vcpu->kvm, gfn);
2600         if (is_error_pfn(pfn))
2601                 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2602         spin_lock(&vcpu->kvm->mmu_lock);
2603         if (mmu_notifier_retry(vcpu, mmu_seq))
2604                 goto out_unlock;
2605         kvm_mmu_free_some_pages(vcpu);
2606         r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2607                          level, gfn, pfn);
2608         spin_unlock(&vcpu->kvm->mmu_lock);
2609
2610         return r;
2611
2612 out_unlock:
2613         spin_unlock(&vcpu->kvm->mmu_lock);
2614         kvm_release_pfn_clean(pfn);
2615         return 0;
2616 }
2617
2618 static void nonpaging_free(struct kvm_vcpu *vcpu)
2619 {
2620         mmu_free_roots(vcpu);
2621 }
2622
2623 static int nonpaging_init_context(struct kvm_vcpu *vcpu,
2624                                   struct kvm_mmu *context)
2625 {
2626         context->new_cr3 = nonpaging_new_cr3;
2627         context->page_fault = nonpaging_page_fault;
2628         context->gva_to_gpa = nonpaging_gva_to_gpa;
2629         context->free = nonpaging_free;
2630         context->prefetch_page = nonpaging_prefetch_page;
2631         context->sync_page = nonpaging_sync_page;
2632         context->invlpg = nonpaging_invlpg;
2633         context->root_level = 0;
2634         context->shadow_root_level = PT32E_ROOT_LEVEL;
2635         context->root_hpa = INVALID_PAGE;
2636         context->direct_map = true;
2637         context->nx = false;
2638         return 0;
2639 }
2640
2641 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2642 {
2643         ++vcpu->stat.tlb_flush;
2644         kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
2645 }
2646
2647 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2648 {
2649         pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2650         mmu_free_roots(vcpu);
2651 }
2652
2653 static unsigned long get_cr3(struct kvm_vcpu *vcpu)
2654 {
2655         return vcpu->arch.cr3;
2656 }
2657
2658 static void inject_page_fault(struct kvm_vcpu *vcpu)
2659 {
2660         vcpu->arch.mmu.inject_page_fault(vcpu);
2661 }
2662
2663 static void paging_free(struct kvm_vcpu *vcpu)
2664 {
2665         nonpaging_free(vcpu);
2666 }
2667
2668 static bool is_rsvd_bits_set(struct kvm_mmu *mmu, u64 gpte, int level)
2669 {
2670         int bit7;
2671
2672         bit7 = (gpte >> 7) & 1;
2673         return (gpte & mmu->rsvd_bits_mask[bit7][level-1]) != 0;
2674 }
2675
2676 #define PTTYPE 64
2677 #include "paging_tmpl.h"
2678 #undef PTTYPE
2679
2680 #define PTTYPE 32
2681 #include "paging_tmpl.h"
2682 #undef PTTYPE
2683
2684 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu,
2685                                   struct kvm_mmu *context,
2686                                   int level)
2687 {
2688         int maxphyaddr = cpuid_maxphyaddr(vcpu);
2689         u64 exb_bit_rsvd = 0;
2690
2691         if (!context->nx)
2692                 exb_bit_rsvd = rsvd_bits(63, 63);
2693         switch (level) {
2694         case PT32_ROOT_LEVEL:
2695                 /* no rsvd bits for 2 level 4K page table entries */
2696                 context->rsvd_bits_mask[0][1] = 0;
2697                 context->rsvd_bits_mask[0][0] = 0;
2698                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2699
2700                 if (!is_pse(vcpu)) {
2701                         context->rsvd_bits_mask[1][1] = 0;
2702                         break;
2703                 }
2704
2705                 if (is_cpuid_PSE36())
2706                         /* 36bits PSE 4MB page */
2707                         context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2708                 else
2709                         /* 32 bits PSE 4MB page */
2710                         context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2711                 break;
2712         case PT32E_ROOT_LEVEL:
2713                 context->rsvd_bits_mask[0][2] =
2714                         rsvd_bits(maxphyaddr, 63) |
2715                         rsvd_bits(7, 8) | rsvd_bits(1, 2);      /* PDPTE */
2716                 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2717                         rsvd_bits(maxphyaddr, 62);      /* PDE */
2718                 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2719                         rsvd_bits(maxphyaddr, 62);      /* PTE */
2720                 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2721                         rsvd_bits(maxphyaddr, 62) |
2722                         rsvd_bits(13, 20);              /* large page */
2723                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2724                 break;
2725         case PT64_ROOT_LEVEL:
2726                 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2727                         rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2728                 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2729                         rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2730                 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2731                         rsvd_bits(maxphyaddr, 51);
2732                 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2733                         rsvd_bits(maxphyaddr, 51);
2734                 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2735                 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2736                         rsvd_bits(maxphyaddr, 51) |
2737                         rsvd_bits(13, 29);
2738                 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2739                         rsvd_bits(maxphyaddr, 51) |
2740                         rsvd_bits(13, 20);              /* large page */
2741                 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2742                 break;
2743         }
2744 }
2745
2746 static int paging64_init_context_common(struct kvm_vcpu *vcpu,
2747                                         struct kvm_mmu *context,
2748                                         int level)
2749 {
2750         context->nx = is_nx(vcpu);
2751
2752         reset_rsvds_bits_mask(vcpu, context, level);
2753
2754         ASSERT(is_pae(vcpu));
2755         context->new_cr3 = paging_new_cr3;
2756         context->page_fault = paging64_page_fault;
2757         context->gva_to_gpa = paging64_gva_to_gpa;
2758         context->prefetch_page = paging64_prefetch_page;
2759         context->sync_page = paging64_sync_page;
2760         context->invlpg = paging64_invlpg;
2761         context->free = paging_free;
2762         context->root_level = level;
2763         context->shadow_root_level = level;
2764         context->root_hpa = INVALID_PAGE;
2765         context->direct_map = false;
2766         return 0;
2767 }
2768
2769 static int paging64_init_context(struct kvm_vcpu *vcpu,
2770                                  struct kvm_mmu *context)
2771 {
2772         return paging64_init_context_common(vcpu, context, PT64_ROOT_LEVEL);
2773 }
2774
2775 static int paging32_init_context(struct kvm_vcpu *vcpu,
2776                                  struct kvm_mmu *context)
2777 {
2778         context->nx = false;
2779
2780         reset_rsvds_bits_mask(vcpu, context, PT32_ROOT_LEVEL);
2781
2782         context->new_cr3 = paging_new_cr3;
2783         context->page_fault = paging32_page_fault;
2784         context->gva_to_gpa = paging32_gva_to_gpa;
2785         context->free = paging_free;
2786         context->prefetch_page = paging32_prefetch_page;
2787         context->sync_page = paging32_sync_page;
2788         context->invlpg = paging32_invlpg;
2789         context->root_level = PT32_ROOT_LEVEL;
2790         context->shadow_root_level = PT32E_ROOT_LEVEL;
2791         context->root_hpa = INVALID_PAGE;
2792         context->direct_map = false;
2793         return 0;
2794 }
2795
2796 static int paging32E_init_context(struct kvm_vcpu *vcpu,
2797                                   struct kvm_mmu *context)
2798 {
2799         return paging64_init_context_common(vcpu, context, PT32E_ROOT_LEVEL);
2800 }
2801
2802 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2803 {
2804         struct kvm_mmu *context = vcpu->arch.walk_mmu;
2805
2806         context->new_cr3 = nonpaging_new_cr3;
2807         context->page_fault = tdp_page_fault;
2808         context->free = nonpaging_free;
2809         context->prefetch_page = nonpaging_prefetch_page;
2810         context->sync_page = nonpaging_sync_page;
2811         context->invlpg = nonpaging_invlpg;
2812         context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2813         context->root_hpa = INVALID_PAGE;
2814         context->direct_map = true;
2815         context->set_cr3 = kvm_x86_ops->set_tdp_cr3;
2816         context->get_cr3 = get_cr3;
2817         context->inject_page_fault = kvm_inject_page_fault;
2818         context->nx = is_nx(vcpu);
2819
2820         if (!is_paging(vcpu)) {
2821                 context->nx = false;
2822                 context->gva_to_gpa = nonpaging_gva_to_gpa;
2823                 context->root_level = 0;
2824         } else if (is_long_mode(vcpu)) {
2825                 context->nx = is_nx(vcpu);
2826                 reset_rsvds_bits_mask(vcpu, context, PT64_ROOT_LEVEL);
2827                 context->gva_to_gpa = paging64_gva_to_gpa;
2828                 context->root_level = PT64_ROOT_LEVEL;
2829         } else if (is_pae(vcpu)) {
2830                 context->nx = is_nx(vcpu);
2831                 reset_rsvds_bits_mask(vcpu, context, PT32E_ROOT_LEVEL);
2832                 context->gva_to_gpa = paging64_gva_to_gpa;
2833                 context->root_level = PT32E_ROOT_LEVEL;
2834         } else {
2835                 context->nx = false;
2836                 reset_rsvds_bits_mask(vcpu, context, PT32_ROOT_LEVEL);
2837                 context->gva_to_gpa = paging32_gva_to_gpa;
2838                 context->root_level = PT32_ROOT_LEVEL;
2839         }
2840
2841         return 0;
2842 }
2843
2844 int kvm_init_shadow_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *context)
2845 {
2846         int r;
2847         ASSERT(vcpu);
2848         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2849
2850         if (!is_paging(vcpu))
2851                 r = nonpaging_init_context(vcpu, context);
2852         else if (is_long_mode(vcpu))
2853                 r = paging64_init_context(vcpu, context);
2854         else if (is_pae(vcpu))
2855                 r = paging32E_init_context(vcpu, context);
2856         else
2857                 r = paging32_init_context(vcpu, context);
2858
2859         vcpu->arch.mmu.base_role.cr4_pae = !!is_pae(vcpu);
2860         vcpu->arch.mmu.base_role.cr0_wp  = is_write_protection(vcpu);
2861
2862         return r;
2863 }
2864 EXPORT_SYMBOL_GPL(kvm_init_shadow_mmu);
2865
2866 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2867 {
2868         int r = kvm_init_shadow_mmu(vcpu, vcpu->arch.walk_mmu);
2869
2870         vcpu->arch.walk_mmu->set_cr3           = kvm_x86_ops->set_cr3;
2871         vcpu->arch.walk_mmu->get_cr3           = get_cr3;
2872         vcpu->arch.walk_mmu->inject_page_fault = kvm_inject_page_fault;
2873
2874         return r;
2875 }
2876
2877 static int init_kvm_nested_mmu(struct kvm_vcpu *vcpu)
2878 {
2879         struct kvm_mmu *g_context = &vcpu->arch.nested_mmu;
2880
2881         g_context->get_cr3           = get_cr3;
2882         g_context->inject_page_fault = kvm_inject_page_fault;
2883
2884         /*
2885          * Note that arch.mmu.gva_to_gpa translates l2_gva to l1_gpa. The
2886          * translation of l2_gpa to l1_gpa addresses is done using the
2887          * arch.nested_mmu.gva_to_gpa function. Basically the gva_to_gpa
2888          * functions between mmu and nested_mmu are swapped.
2889          */
2890         if (!is_paging(vcpu)) {
2891                 g_context->nx = false;
2892                 g_context->root_level = 0;
2893                 g_context->gva_to_gpa = nonpaging_gva_to_gpa_nested;
2894         } else if (is_long_mode(vcpu)) {
2895                 g_context->nx = is_nx(vcpu);
2896                 reset_rsvds_bits_mask(vcpu, g_context, PT64_ROOT_LEVEL);
2897                 g_context->root_level = PT64_ROOT_LEVEL;
2898                 g_context->gva_to_gpa = paging64_gva_to_gpa_nested;
2899         } else if (is_pae(vcpu)) {
2900                 g_context->nx = is_nx(vcpu);
2901                 reset_rsvds_bits_mask(vcpu, g_context, PT32E_ROOT_LEVEL);
2902                 g_context->root_level = PT32E_ROOT_LEVEL;
2903                 g_context->gva_to_gpa = paging64_gva_to_gpa_nested;
2904         } else {
2905                 g_context->nx = false;
2906                 reset_rsvds_bits_mask(vcpu, g_context, PT32_ROOT_LEVEL);
2907                 g_context->root_level = PT32_ROOT_LEVEL;
2908                 g_context->gva_to_gpa = paging32_gva_to_gpa_nested;
2909         }
2910
2911         return 0;
2912 }
2913
2914 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2915 {
2916         vcpu->arch.update_pte.pfn = bad_pfn;
2917
2918         if (mmu_is_nested(vcpu))
2919                 return init_kvm_nested_mmu(vcpu);
2920         else if (tdp_enabled)
2921                 return init_kvm_tdp_mmu(vcpu);
2922         else
2923                 return init_kvm_softmmu(vcpu);
2924 }
2925
2926 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2927 {
2928         ASSERT(vcpu);
2929         if (VALID_PAGE(vcpu->arch.mmu.root_hpa))
2930                 /* mmu.free() should set root_hpa = INVALID_PAGE */
2931                 vcpu->arch.mmu.free(vcpu);
2932 }
2933
2934 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2935 {
2936         destroy_kvm_mmu(vcpu);
2937         return init_kvm_mmu(vcpu);
2938 }
2939 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2940
2941 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2942 {
2943         int r;
2944
2945         r = mmu_topup_memory_caches(vcpu);
2946         if (r)
2947                 goto out;
2948         r = mmu_alloc_roots(vcpu);
2949         spin_lock(&vcpu->kvm->mmu_lock);
2950         mmu_sync_roots(vcpu);
2951         spin_unlock(&vcpu->kvm->mmu_lock);
2952         if (r)
2953                 goto out;
2954         /* set_cr3() should ensure TLB has been flushed */
2955         vcpu->arch.mmu.set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2956 out:
2957         return r;
2958 }
2959 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2960
2961 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2962 {
2963         mmu_free_roots(vcpu);
2964 }
2965 EXPORT_SYMBOL_GPL(kvm_mmu_unload);
2966
2967 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2968                                   struct kvm_mmu_page *sp,
2969                                   u64 *spte)
2970 {
2971         u64 pte;
2972         struct kvm_mmu_page *child;
2973
2974         pte = *spte;
2975         if (is_shadow_present_pte(pte)) {
2976                 if (is_last_spte(pte, sp->role.level))
2977                         drop_spte(vcpu->kvm, spte, shadow_trap_nonpresent_pte);
2978                 else {
2979                         child = page_header(pte & PT64_BASE_ADDR_MASK);
2980                         mmu_page_remove_parent_pte(child, spte);
2981                 }
2982         }
2983         __set_spte(spte, shadow_trap_nonpresent_pte);
2984         if (is_large_pte(pte))
2985                 --vcpu->kvm->stat.lpages;
2986 }
2987
2988 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2989                                   struct kvm_mmu_page *sp,
2990                                   u64 *spte,
2991                                   const void *new)
2992 {
2993         if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2994                 ++vcpu->kvm->stat.mmu_pde_zapped;
2995                 return;
2996         }
2997
2998         if (is_rsvd_bits_set(&vcpu->arch.mmu, *(u64 *)new, PT_PAGE_TABLE_LEVEL))
2999                 return;
3000
3001         ++vcpu->kvm->stat.mmu_pte_updated;
3002         if (!sp->role.cr4_pae)
3003                 paging32_update_pte(vcpu, sp, spte, new);
3004         else
3005                 paging64_update_pte(vcpu, sp, spte, new);
3006 }
3007
3008 static bool need_remote_flush(u64 old, u64 new)
3009 {
3010         if (!is_shadow_present_pte(old))
3011                 return false;
3012         if (!is_shadow_present_pte(new))
3013                 return true;
3014         if ((old ^ new) & PT64_BASE_ADDR_MASK)
3015                 return true;
3016         old ^= PT64_NX_MASK;
3017         new ^= PT64_NX_MASK;
3018         return (old & ~new & PT64_PERM_MASK) != 0;
3019 }
3020
3021 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, bool zap_page,
3022                                     bool remote_flush, bool local_flush)
3023 {
3024         if (zap_page)
3025                 return;
3026
3027         if (remote_flush)
3028                 kvm_flush_remote_tlbs(vcpu->kvm);
3029         else if (local_flush)
3030                 kvm_mmu_flush_tlb(vcpu);
3031 }
3032
3033 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
3034 {
3035         u64 *spte = vcpu->arch.last_pte_updated;
3036
3037         return !!(spte && (*spte & shadow_accessed_mask));
3038 }
3039
3040 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
3041                                           u64 gpte)
3042 {
3043         gfn_t gfn;
3044         pfn_t pfn;
3045
3046         if (!is_present_gpte(gpte))
3047                 return;
3048         gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
3049
3050         vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
3051         smp_rmb();
3052         pfn = gfn_to_pfn(vcpu->kvm, gfn);
3053
3054         if (is_error_pfn(pfn)) {
3055                 kvm_release_pfn_clean(pfn);
3056                 return;
3057         }
3058         vcpu->arch.update_pte.gfn = gfn;
3059         vcpu->arch.update_pte.pfn = pfn;
3060 }
3061
3062 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
3063 {
3064         u64 *spte = vcpu->arch.last_pte_updated;
3065
3066         if (spte
3067             && vcpu->arch.last_pte_gfn == gfn
3068             && shadow_accessed_mask
3069             && !(*spte & shadow_accessed_mask)
3070             && is_shadow_present_pte(*spte))
3071                 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
3072 }
3073
3074 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
3075                        const u8 *new, int bytes,
3076                        bool guest_initiated)
3077 {
3078         gfn_t gfn = gpa >> PAGE_SHIFT;
3079         union kvm_mmu_page_role mask = { .word = 0 };
3080         struct kvm_mmu_page *sp;
3081         struct hlist_node *node;
3082         LIST_HEAD(invalid_list);
3083         u64 entry, gentry;
3084         u64 *spte;
3085         unsigned offset = offset_in_page(gpa);
3086         unsigned pte_size;
3087         unsigned page_offset;
3088         unsigned misaligned;
3089         unsigned quadrant;
3090         int level;
3091         int flooded = 0;
3092         int npte;
3093         int r;
3094         int invlpg_counter;
3095         bool remote_flush, local_flush, zap_page;
3096
3097         zap_page = remote_flush = local_flush = false;
3098
3099         pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
3100
3101         invlpg_counter = atomic_read(&vcpu->kvm->arch.invlpg_counter);
3102
3103         /*
3104          * Assume that the pte write on a page table of the same type
3105          * as the current vcpu paging mode.  This is nearly always true
3106          * (might be false while changing modes).  Note it is verified later
3107          * by update_pte().
3108          */
3109         if ((is_pae(vcpu) && bytes == 4) || !new) {
3110                 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
3111                 if (is_pae(vcpu)) {
3112                         gpa &= ~(gpa_t)7;
3113                         bytes = 8;
3114                 }
3115                 r = kvm_read_guest(vcpu->kvm, gpa, &gentry, min(bytes, 8));
3116                 if (r)
3117                         gentry = 0;
3118                 new = (const u8 *)&gentry;
3119         }
3120
3121         switch (bytes) {
3122         case 4:
3123                 gentry = *(const u32 *)new;
3124                 break;
3125         case 8:
3126                 gentry = *(const u64 *)new;
3127                 break;
3128         default:
3129                 gentry = 0;
3130                 break;
3131         }
3132
3133         mmu_guess_page_from_pte_write(vcpu, gpa, gentry);
3134         spin_lock(&vcpu->kvm->mmu_lock);
3135         if (atomic_read(&vcpu->kvm->arch.invlpg_counter) != invlpg_counter)
3136                 gentry = 0;
3137         kvm_mmu_access_page(vcpu, gfn);
3138         kvm_mmu_free_some_pages(vcpu);
3139         ++vcpu->kvm->stat.mmu_pte_write;
3140         trace_kvm_mmu_audit(vcpu, AUDIT_PRE_PTE_WRITE);
3141         if (guest_initiated) {
3142                 if (gfn == vcpu->arch.last_pt_write_gfn
3143                     && !last_updated_pte_accessed(vcpu)) {
3144                         ++vcpu->arch.last_pt_write_count;
3145                         if (vcpu->arch.last_pt_write_count >= 3)
3146                                 flooded = 1;
3147                 } else {
3148                         vcpu->arch.last_pt_write_gfn = gfn;
3149                         vcpu->arch.last_pt_write_count = 1;
3150                         vcpu->arch.last_pte_updated = NULL;
3151                 }
3152         }
3153
3154         mask.cr0_wp = mask.cr4_pae = mask.nxe = 1;
3155         for_each_gfn_indirect_valid_sp(vcpu->kvm, sp, gfn, node) {
3156                 pte_size = sp->role.cr4_pae ? 8 : 4;
3157                 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
3158                 misaligned |= bytes < 4;
3159                 if (misaligned || flooded) {
3160                         /*
3161                          * Misaligned accesses are too much trouble to fix
3162                          * up; also, they usually indicate a page is not used
3163                          * as a page table.
3164                          *
3165                          * If we're seeing too many writes to a page,
3166                          * it may no longer be a page table, or we may be
3167                          * forking, in which case it is better to unmap the
3168                          * page.
3169                          */
3170                         pgprintk("misaligned: gpa %llx bytes %d role %x\n",
3171                                  gpa, bytes, sp->role.word);
3172                         zap_page |= !!kvm_mmu_prepare_zap_page(vcpu->kvm, sp,
3173                                                      &invalid_list);
3174                         ++vcpu->kvm->stat.mmu_flooded;
3175                         continue;
3176                 }
3177                 page_offset = offset;
3178                 level = sp->role.level;
3179                 npte = 1;
3180                 if (!sp->role.cr4_pae) {
3181                         page_offset <<= 1;      /* 32->64 */
3182                         /*
3183                          * A 32-bit pde maps 4MB while the shadow pdes map
3184                          * only 2MB.  So we need to double the offset again
3185                          * and zap two pdes instead of one.
3186                          */
3187                         if (level == PT32_ROOT_LEVEL) {
3188                                 page_offset &= ~7; /* kill rounding error */
3189                                 page_offset <<= 1;
3190                                 npte = 2;
3191                         }
3192                         quadrant = page_offset >> PAGE_SHIFT;
3193                         page_offset &= ~PAGE_MASK;
3194                         if (quadrant != sp->role.quadrant)
3195                                 continue;
3196                 }
3197                 local_flush = true;
3198                 spte = &sp->spt[page_offset / sizeof(*spte)];
3199                 while (npte--) {
3200                         entry = *spte;
3201                         mmu_pte_write_zap_pte(vcpu, sp, spte);
3202                         if (gentry &&
3203                               !((sp->role.word ^ vcpu->arch.mmu.base_role.word)
3204                               & mask.word))
3205                                 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
3206                         if (!remote_flush && need_remote_flush(entry, *spte))
3207                                 remote_flush = true;
3208                         ++spte;
3209                 }
3210         }
3211         mmu_pte_write_flush_tlb(vcpu, zap_page, remote_flush, local_flush);
3212         kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
3213         trace_kvm_mmu_audit(vcpu, AUDIT_POST_PTE_WRITE);
3214         spin_unlock(&vcpu->kvm->mmu_lock);
3215         if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
3216                 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
3217                 vcpu->arch.update_pte.pfn = bad_pfn;
3218         }
3219 }
3220
3221 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
3222 {
3223         gpa_t gpa;
3224         int r;
3225
3226         if (vcpu->arch.mmu.direct_map)
3227                 return 0;
3228
3229         gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
3230
3231         spin_lock(&vcpu->kvm->mmu_lock);
3232         r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3233         spin_unlock(&vcpu->kvm->mmu_lock);
3234         return r;
3235 }
3236 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
3237
3238 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
3239 {
3240         LIST_HEAD(invalid_list);
3241
3242         while (kvm_mmu_available_pages(vcpu->kvm) < KVM_REFILL_PAGES &&
3243                !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
3244                 struct kvm_mmu_page *sp;
3245
3246                 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
3247                                   struct kvm_mmu_page, link);
3248                 kvm_mmu_prepare_zap_page(vcpu->kvm, sp, &invalid_list);
3249                 kvm_mmu_commit_zap_page(vcpu->kvm, &invalid_list);
3250                 ++vcpu->kvm->stat.mmu_recycled;
3251         }
3252 }
3253
3254 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
3255 {
3256         int r;
3257         enum emulation_result er;
3258
3259         r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
3260         if (r < 0)
3261                 goto out;
3262
3263         if (!r) {
3264                 r = 1;
3265                 goto out;
3266         }
3267
3268         r = mmu_topup_memory_caches(vcpu);
3269         if (r)
3270                 goto out;
3271
3272         er = emulate_instruction(vcpu, cr2, error_code, 0);
3273
3274         switch (er) {
3275         case EMULATE_DONE:
3276                 return 1;
3277         case EMULATE_DO_MMIO:
3278                 ++vcpu->stat.mmio_exits;
3279                 /* fall through */
3280         case EMULATE_FAIL:
3281                 return 0;
3282         default:
3283                 BUG();
3284         }
3285 out:
3286         return r;
3287 }
3288 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
3289
3290 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
3291 {
3292         vcpu->arch.mmu.invlpg(vcpu, gva);
3293         kvm_mmu_flush_tlb(vcpu);
3294         ++vcpu->stat.invlpg;
3295 }
3296 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
3297
3298 void kvm_enable_tdp(void)
3299 {
3300         tdp_enabled = true;
3301 }
3302 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
3303
3304 void kvm_disable_tdp(void)
3305 {
3306         tdp_enabled = false;
3307 }
3308 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
3309
3310 static void free_mmu_pages(struct kvm_vcpu *vcpu)
3311 {
3312         free_page((unsigned long)vcpu->arch.mmu.pae_root);
3313         if (vcpu->arch.mmu.lm_root != NULL)
3314                 free_page((unsigned long)vcpu->arch.mmu.lm_root);
3315 }
3316
3317 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
3318 {
3319         struct page *page;
3320         int i;
3321
3322         ASSERT(vcpu);
3323
3324         /*
3325          * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
3326          * Therefore we need to allocate shadow page tables in the first
3327          * 4GB of memory, which happens to fit the DMA32 zone.
3328          */
3329         page = alloc_page(GFP_KERNEL | __GFP_DMA32);
3330         if (!page)
3331                 return -ENOMEM;
3332
3333         vcpu->arch.mmu.pae_root = page_address(page);
3334         for (i = 0; i < 4; ++i)
3335                 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
3336
3337         return 0;
3338 }
3339
3340 int kvm_mmu_create(struct kvm_vcpu *vcpu)
3341 {
3342         ASSERT(vcpu);
3343         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3344
3345         return alloc_mmu_pages(vcpu);
3346 }
3347
3348 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
3349 {
3350         ASSERT(vcpu);
3351         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
3352
3353         return init_kvm_mmu(vcpu);
3354 }
3355
3356 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
3357 {
3358         ASSERT(vcpu);
3359
3360         destroy_kvm_mmu(vcpu);
3361         free_mmu_pages(vcpu);
3362         mmu_free_memory_caches(vcpu);
3363 }
3364
3365 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
3366 {
3367         struct kvm_mmu_page *sp;
3368
3369         list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
3370                 int i;
3371                 u64 *pt;
3372
3373                 if (!test_bit(slot, sp->slot_bitmap))
3374                         continue;
3375
3376                 pt = sp->spt;
3377                 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
3378                         /* avoid RMW */
3379                         if (is_writable_pte(pt[i]))
3380                                 pt[i] &= ~PT_WRITABLE_MASK;
3381         }
3382         kvm_flush_remote_tlbs(kvm);
3383 }
3384
3385 void kvm_mmu_zap_all(struct kvm *kvm)
3386 {
3387         struct kvm_mmu_page *sp, *node;
3388         LIST_HEAD(invalid_list);
3389
3390         spin_lock(&kvm->mmu_lock);
3391 restart:
3392         list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
3393                 if (kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list))
3394                         goto restart;
3395
3396         kvm_mmu_commit_zap_page(kvm, &invalid_list);
3397         spin_unlock(&kvm->mmu_lock);
3398 }
3399
3400 static int kvm_mmu_remove_some_alloc_mmu_pages(struct kvm *kvm,
3401                                                struct list_head *invalid_list)
3402 {
3403         struct kvm_mmu_page *page;
3404
3405         page = container_of(kvm->arch.active_mmu_pages.prev,
3406                             struct kvm_mmu_page, link);
3407         return kvm_mmu_prepare_zap_page(kvm, page, invalid_list);
3408 }
3409
3410 static int mmu_shrink(struct shrinker *shrink, int nr_to_scan, gfp_t gfp_mask)
3411 {
3412         struct kvm *kvm;
3413         struct kvm *kvm_freed = NULL;
3414
3415         if (nr_to_scan == 0)
3416                 goto out;
3417
3418         spin_lock(&kvm_lock);
3419
3420         list_for_each_entry(kvm, &vm_list, vm_list) {
3421                 int idx, freed_pages;
3422                 LIST_HEAD(invalid_list);
3423
3424                 idx = srcu_read_lock(&kvm->srcu);
3425                 spin_lock(&kvm->mmu_lock);
3426                 if (!kvm_freed && nr_to_scan > 0 &&
3427                     kvm->arch.n_used_mmu_pages > 0) {
3428                         freed_pages = kvm_mmu_remove_some_alloc_mmu_pages(kvm,
3429                                                           &invalid_list);
3430                         kvm_freed = kvm;
3431                 }
3432                 nr_to_scan--;
3433
3434                 kvm_mmu_commit_zap_page(kvm, &invalid_list);
3435                 spin_unlock(&kvm->mmu_lock);
3436                 srcu_read_unlock(&kvm->srcu, idx);
3437         }
3438         if (kvm_freed)
3439                 list_move_tail(&kvm_freed->vm_list, &vm_list);
3440
3441         spin_unlock(&kvm_lock);
3442
3443 out:
3444         return percpu_counter_read_positive(&kvm_total_used_mmu_pages);
3445 }
3446
3447 static struct shrinker mmu_shrinker = {
3448         .shrink = mmu_shrink,
3449         .seeks = DEFAULT_SEEKS * 10,
3450 };
3451
3452 static void mmu_destroy_caches(void)
3453 {
3454         if (pte_chain_cache)
3455                 kmem_cache_destroy(pte_chain_cache);
3456         if (rmap_desc_cache)
3457                 kmem_cache_destroy(rmap_desc_cache);
3458         if (mmu_page_header_cache)
3459                 kmem_cache_destroy(mmu_page_header_cache);
3460 }
3461
3462 void kvm_mmu_module_exit(void)
3463 {
3464         mmu_destroy_caches();
3465         percpu_counter_destroy(&kvm_total_used_mmu_pages);
3466         unregister_shrinker(&mmu_shrinker);
3467 }
3468
3469 int kvm_mmu_module_init(void)
3470 {
3471         pte_chain_cache = kmem_cache_create("kvm_pte_chain",
3472                                             sizeof(struct kvm_pte_chain),
3473                                             0, 0, NULL);
3474         if (!pte_chain_cache)
3475                 goto nomem;
3476         rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
3477                                             sizeof(struct kvm_rmap_desc),
3478                                             0, 0, NULL);
3479         if (!rmap_desc_cache)
3480                 goto nomem;
3481
3482         mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
3483                                                   sizeof(struct kvm_mmu_page),
3484                                                   0, 0, NULL);
3485         if (!mmu_page_header_cache)
3486                 goto nomem;
3487
3488         if (percpu_counter_init(&kvm_total_used_mmu_pages, 0))
3489                 goto nomem;
3490
3491         register_shrinker(&mmu_shrinker);
3492
3493         return 0;
3494
3495 nomem:
3496         mmu_destroy_caches();
3497         return -ENOMEM;
3498 }
3499
3500 /*
3501  * Caculate mmu pages needed for kvm.
3502  */
3503 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3504 {
3505         int i;
3506         unsigned int nr_mmu_pages;
3507         unsigned int  nr_pages = 0;
3508         struct kvm_memslots *slots;
3509
3510         slots = kvm_memslots(kvm);
3511
3512         for (i = 0; i < slots->nmemslots; i++)
3513                 nr_pages += slots->memslots[i].npages;
3514
3515         nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3516         nr_mmu_pages = max(nr_mmu_pages,
3517                         (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3518
3519         return nr_mmu_pages;
3520 }
3521
3522 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3523                                 unsigned len)
3524 {
3525         if (len > buffer->len)
3526                 return NULL;
3527         return buffer->ptr;
3528 }
3529
3530 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3531                                 unsigned len)
3532 {
3533         void *ret;
3534
3535         ret = pv_mmu_peek_buffer(buffer, len);
3536         if (!ret)
3537                 return ret;
3538         buffer->ptr += len;
3539         buffer->len -= len;
3540         buffer->processed += len;
3541         return ret;
3542 }
3543
3544 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3545                              gpa_t addr, gpa_t value)
3546 {
3547         int bytes = 8;
3548         int r;
3549
3550         if (!is_long_mode(vcpu) && !is_pae(vcpu))
3551                 bytes = 4;
3552
3553         r = mmu_topup_memory_caches(vcpu);
3554         if (r)
3555                 return r;
3556
3557         if (!emulator_write_phys(vcpu, addr, &value, bytes))
3558                 return -EFAULT;
3559
3560         return 1;
3561 }
3562
3563 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3564 {
3565         (void)kvm_set_cr3(vcpu, vcpu->arch.cr3);
3566         return 1;
3567 }
3568
3569 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3570 {
3571         spin_lock(&vcpu->kvm->mmu_lock);
3572         mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3573         spin_unlock(&vcpu->kvm->mmu_lock);
3574         return 1;
3575 }
3576
3577 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3578                              struct kvm_pv_mmu_op_buffer *buffer)
3579 {
3580         struct kvm_mmu_op_header *header;
3581
3582         header = pv_mmu_peek_buffer(buffer, sizeof *header);
3583         if (!header)
3584                 return 0;
3585         switch (header->op) {
3586         case KVM_MMU_OP_WRITE_PTE: {
3587                 struct kvm_mmu_op_write_pte *wpte;
3588
3589                 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3590                 if (!wpte)
3591                         return 0;
3592                 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3593                                         wpte->pte_val);
3594         }
3595         case KVM_MMU_OP_FLUSH_TLB: {
3596                 struct kvm_mmu_op_flush_tlb *ftlb;
3597
3598                 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3599                 if (!ftlb)
3600                         return 0;
3601                 return kvm_pv_mmu_flush_tlb(vcpu);
3602         }
3603         case KVM_MMU_OP_RELEASE_PT: {
3604                 struct kvm_mmu_op_release_pt *rpt;
3605
3606                 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3607                 if (!rpt)
3608                         return 0;
3609                 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3610         }
3611         default: return 0;
3612         }
3613 }
3614
3615 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3616                   gpa_t addr, unsigned long *ret)
3617 {
3618         int r;
3619         struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3620
3621         buffer->ptr = buffer->buf;
3622         buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3623         buffer->processed = 0;
3624
3625         r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3626         if (r)
3627                 goto out;
3628
3629         while (buffer->len) {
3630                 r = kvm_pv_mmu_op_one(vcpu, buffer);
3631                 if (r < 0)
3632                         goto out;
3633                 if (r == 0)
3634                         break;
3635         }
3636
3637         r = 1;
3638 out:
3639         *ret = buffer->processed;
3640         return r;
3641 }
3642
3643 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3644 {
3645         struct kvm_shadow_walk_iterator iterator;
3646         int nr_sptes = 0;
3647
3648         spin_lock(&vcpu->kvm->mmu_lock);
3649         for_each_shadow_entry(vcpu, addr, iterator) {
3650                 sptes[iterator.level-1] = *iterator.sptep;
3651                 nr_sptes++;
3652                 if (!is_shadow_present_pte(*iterator.sptep))
3653                         break;
3654         }
3655         spin_unlock(&vcpu->kvm->mmu_lock);
3656
3657         return nr_sptes;
3658 }
3659 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3660
3661 #ifdef CONFIG_KVM_MMU_AUDIT
3662 #include "mmu_audit.c"
3663 #endif