2 * 8259 interrupt controller emulation
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 * Copyright (c) 2007 Intel Corporation
6 * Copyright 2009 Red Hat, Inc. and/or its affilates.
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
26 * Yaozu (Eddie) Dong <Eddie.dong@intel.com>
30 #include <linux/slab.h>
31 #include <linux/bitops.h>
34 #include <linux/kvm_host.h>
37 static void pic_irq_request(struct kvm *kvm, int level);
39 static void pic_lock(struct kvm_pic *s)
42 raw_spin_lock(&s->lock);
45 static void pic_unlock(struct kvm_pic *s)
48 bool wakeup = s->wakeup_needed;
49 struct kvm_vcpu *vcpu;
51 s->wakeup_needed = false;
53 raw_spin_unlock(&s->lock);
56 vcpu = s->kvm->bsp_vcpu;
62 static void pic_clear_isr(struct kvm_kpic_state *s, int irq)
64 s->isr &= ~(1 << irq);
65 s->isr_ack |= (1 << irq);
66 if (s != &s->pics_state->pics[0])
69 * We are dropping lock while calling ack notifiers since ack
70 * notifier callbacks for assigned devices call into PIC recursively.
71 * Other interrupt may be delivered to PIC while lock is dropped but
72 * it should be safe since PIC state is already updated at this stage.
74 pic_unlock(s->pics_state);
75 kvm_notify_acked_irq(s->pics_state->kvm, SELECT_PIC(irq), irq);
76 pic_lock(s->pics_state);
79 void kvm_pic_clear_isr_ack(struct kvm *kvm)
81 struct kvm_pic *s = pic_irqchip(kvm);
84 s->pics[0].isr_ack = 0xff;
85 s->pics[1].isr_ack = 0xff;
90 * set irq level. If an edge is detected, then the IRR is set to 1
92 static inline int pic_set_irq1(struct kvm_kpic_state *s, int irq, int level)
96 if (s->elcr & mask) /* level triggered */
98 ret = !(s->irr & mask);
103 s->last_irr &= ~mask;
105 else /* edge triggered */
107 if ((s->last_irr & mask) == 0) {
108 ret = !(s->irr & mask);
113 s->last_irr &= ~mask;
115 return (s->imr & mask) ? -1 : ret;
119 * return the highest priority found in mask (highest = smallest
120 * number). Return 8 if no irq
122 static inline int get_priority(struct kvm_kpic_state *s, int mask)
128 while ((mask & (1 << ((priority + s->priority_add) & 7))) == 0)
134 * return the pic wanted interrupt. return -1 if none
136 static int pic_get_irq(struct kvm_kpic_state *s)
138 int mask, cur_priority, priority;
140 mask = s->irr & ~s->imr;
141 priority = get_priority(s, mask);
145 * compute current priority. If special fully nested mode on the
146 * master, the IRQ coming from the slave is not taken into account
147 * for the priority computation.
150 if (s->special_fully_nested_mode && s == &s->pics_state->pics[0])
152 cur_priority = get_priority(s, mask);
153 if (priority < cur_priority)
155 * higher priority found: an irq should be generated
157 return (priority + s->priority_add) & 7;
163 * raise irq to CPU if necessary. must be called every time the active
166 static void pic_update_irq(struct kvm_pic *s)
170 irq2 = pic_get_irq(&s->pics[1]);
173 * if irq request by slave pic, signal master PIC
175 pic_set_irq1(&s->pics[0], 2, 1);
176 pic_set_irq1(&s->pics[0], 2, 0);
178 irq = pic_get_irq(&s->pics[0]);
179 pic_irq_request(s->kvm, irq >= 0);
182 void kvm_pic_update_irq(struct kvm_pic *s)
189 int kvm_pic_set_irq(void *opaque, int irq, int level)
191 struct kvm_pic *s = opaque;
195 if (irq >= 0 && irq < PIC_NUM_PINS) {
196 ret = pic_set_irq1(&s->pics[irq >> 3], irq & 7, level);
198 trace_kvm_pic_set_irq(irq >> 3, irq & 7, s->pics[irq >> 3].elcr,
199 s->pics[irq >> 3].imr, ret == 0);
207 * acknowledge interrupt 'irq'
209 static inline void pic_intack(struct kvm_kpic_state *s, int irq)
213 * We don't clear a level sensitive interrupt here
215 if (!(s->elcr & (1 << irq)))
216 s->irr &= ~(1 << irq);
219 if (s->rotate_on_auto_eoi)
220 s->priority_add = (irq + 1) & 7;
221 pic_clear_isr(s, irq);
226 int kvm_pic_read_irq(struct kvm *kvm)
228 int irq, irq2, intno;
229 struct kvm_pic *s = pic_irqchip(kvm);
232 irq = pic_get_irq(&s->pics[0]);
234 pic_intack(&s->pics[0], irq);
236 irq2 = pic_get_irq(&s->pics[1]);
238 pic_intack(&s->pics[1], irq2);
241 * spurious IRQ on slave controller
244 intno = s->pics[1].irq_base + irq2;
247 intno = s->pics[0].irq_base + irq;
250 * spurious IRQ on host controller
253 intno = s->pics[0].irq_base + irq;
261 void kvm_pic_reset(struct kvm_kpic_state *s)
264 struct kvm_vcpu *vcpu0 = s->pics_state->kvm->bsp_vcpu;
265 u8 irr = s->irr, isr = s->imr;
274 s->read_reg_select = 0;
279 s->rotate_on_auto_eoi = 0;
280 s->special_fully_nested_mode = 0;
283 for (irq = 0; irq < PIC_NUM_PINS/2; irq++) {
284 if (vcpu0 && kvm_apic_accept_pic_intr(vcpu0))
285 if (irr & (1 << irq) || isr & (1 << irq)) {
286 pic_clear_isr(s, irq);
291 static void pic_ioport_write(void *opaque, u32 addr, u32 val)
293 struct kvm_kpic_state *s = opaque;
294 int priority, cmd, irq;
299 kvm_pic_reset(s); /* init */
301 * deassert a pending interrupt
303 pic_irq_request(s->pics_state->kvm, 0);
307 printk(KERN_ERR "single mode not supported");
310 "level sensitive irq not supported");
311 } else if (val & 0x08) {
315 s->read_reg_select = val & 1;
317 s->special_mask = (val >> 5) & 1;
323 s->rotate_on_auto_eoi = cmd >> 2;
325 case 1: /* end of interrupt */
327 priority = get_priority(s, s->isr);
329 irq = (priority + s->priority_add) & 7;
331 s->priority_add = (irq + 1) & 7;
332 pic_clear_isr(s, irq);
333 pic_update_irq(s->pics_state);
338 pic_clear_isr(s, irq);
339 pic_update_irq(s->pics_state);
342 s->priority_add = (val + 1) & 7;
343 pic_update_irq(s->pics_state);
347 s->priority_add = (irq + 1) & 7;
348 pic_clear_isr(s, irq);
349 pic_update_irq(s->pics_state);
352 break; /* no operation */
356 switch (s->init_state) {
357 case 0: /* normal mode */
359 pic_update_irq(s->pics_state);
362 s->irq_base = val & 0xf8;
372 s->special_fully_nested_mode = (val >> 4) & 1;
373 s->auto_eoi = (val >> 1) & 1;
379 static u32 pic_poll_read(struct kvm_kpic_state *s, u32 addr1)
383 ret = pic_get_irq(s);
386 s->pics_state->pics[0].isr &= ~(1 << 2);
387 s->pics_state->pics[0].irr &= ~(1 << 2);
389 s->irr &= ~(1 << ret);
390 pic_clear_isr(s, ret);
391 if (addr1 >> 7 || ret != 2)
392 pic_update_irq(s->pics_state);
395 pic_update_irq(s->pics_state);
401 static u32 pic_ioport_read(void *opaque, u32 addr1)
403 struct kvm_kpic_state *s = opaque;
410 ret = pic_poll_read(s, addr1);
414 if (s->read_reg_select)
423 static void elcr_ioport_write(void *opaque, u32 addr, u32 val)
425 struct kvm_kpic_state *s = opaque;
426 s->elcr = val & s->elcr_mask;
429 static u32 elcr_ioport_read(void *opaque, u32 addr1)
431 struct kvm_kpic_state *s = opaque;
435 static int picdev_in_range(gpa_t addr)
450 static inline struct kvm_pic *to_pic(struct kvm_io_device *dev)
452 return container_of(dev, struct kvm_pic, dev);
455 static int picdev_write(struct kvm_io_device *this,
456 gpa_t addr, int len, const void *val)
458 struct kvm_pic *s = to_pic(this);
459 unsigned char data = *(unsigned char *)val;
460 if (!picdev_in_range(addr))
464 if (printk_ratelimit())
465 printk(KERN_ERR "PIC: non byte write\n");
474 pic_ioport_write(&s->pics[addr >> 7], addr, data);
478 elcr_ioport_write(&s->pics[addr & 1], addr, data);
485 static int picdev_read(struct kvm_io_device *this,
486 gpa_t addr, int len, void *val)
488 struct kvm_pic *s = to_pic(this);
489 unsigned char data = 0;
490 if (!picdev_in_range(addr))
494 if (printk_ratelimit())
495 printk(KERN_ERR "PIC: non byte read\n");
504 data = pic_ioport_read(&s->pics[addr >> 7], addr);
508 data = elcr_ioport_read(&s->pics[addr & 1], addr);
511 *(unsigned char *)val = data;
517 * callback when PIC0 irq status changed
519 static void pic_irq_request(struct kvm *kvm, int level)
521 struct kvm_vcpu *vcpu = kvm->bsp_vcpu;
522 struct kvm_pic *s = pic_irqchip(kvm);
523 int irq = pic_get_irq(&s->pics[0]);
526 if (vcpu && level && (s->pics[0].isr_ack & (1 << irq))) {
527 s->pics[0].isr_ack &= ~(1 << irq);
528 s->wakeup_needed = true;
532 static const struct kvm_io_device_ops picdev_ops = {
534 .write = picdev_write,
537 struct kvm_pic *kvm_create_pic(struct kvm *kvm)
542 s = kzalloc(sizeof(struct kvm_pic), GFP_KERNEL);
545 raw_spin_lock_init(&s->lock);
547 s->pics[0].elcr_mask = 0xf8;
548 s->pics[1].elcr_mask = 0xde;
549 s->pics[0].pics_state = s;
550 s->pics[1].pics_state = s;
553 * Initialize PIO device
555 kvm_iodevice_init(&s->dev, &picdev_ops);
556 mutex_lock(&kvm->slots_lock);
557 ret = kvm_io_bus_register_dev(kvm, KVM_PIO_BUS, &s->dev);
558 mutex_unlock(&kvm->slots_lock);
567 void kvm_destroy_pic(struct kvm *kvm)
569 struct kvm_pic *vpic = kvm->arch.vpic;
572 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS, &vpic->dev);
573 kvm->arch.vpic = NULL;