2 * linux/arch/arm/mach-omap2/id.c
4 * OMAP2 CPU identification code
6 * Copyright (C) 2005 Nokia Corporation
7 * Written by Tony Lindgren <tony@atomide.com>
9 * Copyright (C) 2009-11 Texas Instruments
10 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
17 #include <linux/module.h>
18 #include <linux/kernel.h>
19 #include <linux/init.h>
22 #include <asm/cputype.h>
24 #include <plat/common.h>
31 static unsigned int omap_revision;
35 unsigned int omap_rev(void)
39 EXPORT_SYMBOL(omap_rev);
45 if (cpu_is_omap24xx()) {
46 val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS);
47 } else if (cpu_is_omap34xx()) {
48 val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS);
49 } else if (cpu_is_omap44xx()) {
50 val = omap_ctrl_readl(OMAP4_CTRL_MODULE_CORE_STATUS);
52 pr_err("Cannot detect omap type!\n");
56 val &= OMAP2_DEVICETYPE_MASK;
62 EXPORT_SYMBOL(omap_type);
65 /*----------------------------------------------------------------------------*/
67 #define OMAP_TAP_IDCODE 0x0204
68 #define OMAP_TAP_DIE_ID_0 0x0218
69 #define OMAP_TAP_DIE_ID_1 0x021C
70 #define OMAP_TAP_DIE_ID_2 0x0220
71 #define OMAP_TAP_DIE_ID_3 0x0224
73 #define OMAP_TAP_DIE_ID_44XX_0 0x0200
74 #define OMAP_TAP_DIE_ID_44XX_1 0x0208
75 #define OMAP_TAP_DIE_ID_44XX_2 0x020c
76 #define OMAP_TAP_DIE_ID_44XX_3 0x0210
78 #define read_tap_reg(reg) __raw_readl(tap_base + (reg))
81 u16 hawkeye; /* Silicon type (Hawkeye id) */
82 u8 dev; /* Device type from production_id reg */
83 u32 type; /* Combined type id copied to omap_revision */
86 /* Register values to detect the OMAP version */
87 static struct omap_id omap_ids[] __initdata = {
88 { .hawkeye = 0xb5d9, .dev = 0x0, .type = 0x24200024 },
89 { .hawkeye = 0xb5d9, .dev = 0x1, .type = 0x24201024 },
90 { .hawkeye = 0xb5d9, .dev = 0x2, .type = 0x24202024 },
91 { .hawkeye = 0xb5d9, .dev = 0x4, .type = 0x24220024 },
92 { .hawkeye = 0xb5d9, .dev = 0x8, .type = 0x24230024 },
93 { .hawkeye = 0xb68a, .dev = 0x0, .type = 0x24300024 },
96 static void __iomem *tap_base;
97 static u16 tap_prod_id;
99 void omap_get_die_id(struct omap_die_id *odi)
101 if (cpu_is_omap44xx()) {
102 odi->id_0 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_0);
103 odi->id_1 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_1);
104 odi->id_2 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_2);
105 odi->id_3 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_3);
109 odi->id_0 = read_tap_reg(OMAP_TAP_DIE_ID_0);
110 odi->id_1 = read_tap_reg(OMAP_TAP_DIE_ID_1);
111 odi->id_2 = read_tap_reg(OMAP_TAP_DIE_ID_2);
112 odi->id_3 = read_tap_reg(OMAP_TAP_DIE_ID_3);
115 static void __init omap24xx_check_revision(void)
121 struct omap_die_id odi;
123 idcode = read_tap_reg(OMAP_TAP_IDCODE);
124 prod_id = read_tap_reg(tap_prod_id);
125 hawkeye = (idcode >> 12) & 0xffff;
126 rev = (idcode >> 28) & 0x0f;
127 dev_type = (prod_id >> 16) & 0x0f;
128 omap_get_die_id(&odi);
130 pr_debug("OMAP_TAP_IDCODE 0x%08x REV %i HAWKEYE 0x%04x MANF %03x\n",
131 idcode, rev, hawkeye, (idcode >> 1) & 0x7ff);
132 pr_debug("OMAP_TAP_DIE_ID_0: 0x%08x\n", odi.id_0);
133 pr_debug("OMAP_TAP_DIE_ID_1: 0x%08x DEV_REV: %i\n",
134 odi.id_1, (odi.id_1 >> 28) & 0xf);
135 pr_debug("OMAP_TAP_DIE_ID_2: 0x%08x\n", odi.id_2);
136 pr_debug("OMAP_TAP_DIE_ID_3: 0x%08x\n", odi.id_3);
137 pr_debug("OMAP_TAP_PROD_ID_0: 0x%08x DEV_TYPE: %i\n",
140 /* Check hawkeye ids */
141 for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
142 if (hawkeye == omap_ids[i].hawkeye)
146 if (i == ARRAY_SIZE(omap_ids)) {
147 printk(KERN_ERR "Unknown OMAP CPU id\n");
151 for (j = i; j < ARRAY_SIZE(omap_ids); j++) {
152 if (dev_type == omap_ids[j].dev)
156 if (j == ARRAY_SIZE(omap_ids)) {
157 printk(KERN_ERR "Unknown OMAP device type. "
158 "Handling it as OMAP%04x\n",
159 omap_ids[i].type >> 16);
163 pr_info("OMAP%04x", omap_rev() >> 16);
164 if ((omap_rev() >> 8) & 0x0f)
165 pr_info("ES%x", (omap_rev() >> 12) & 0xf);
169 #define OMAP3_CHECK_FEATURE(status,feat) \
170 if (((status & OMAP3_ ##feat## _MASK) \
171 >> OMAP3_ ##feat## _SHIFT) != FEAT_ ##feat## _NONE) { \
172 omap_features |= OMAP3_HAS_ ##feat; \
175 static void __init omap3_check_features(void)
181 status = omap_ctrl_readl(OMAP3_CONTROL_OMAP_STATUS);
183 OMAP3_CHECK_FEATURE(status, L2CACHE);
184 OMAP3_CHECK_FEATURE(status, IVA);
185 OMAP3_CHECK_FEATURE(status, SGX);
186 OMAP3_CHECK_FEATURE(status, NEON);
187 OMAP3_CHECK_FEATURE(status, ISP);
188 if (cpu_is_omap3630())
189 omap_features |= OMAP3_HAS_192MHZ_CLK;
190 if (cpu_is_omap3430() || cpu_is_omap3630())
191 omap_features |= OMAP3_HAS_IO_WAKEUP;
192 if (cpu_is_omap3630() || omap_rev() == OMAP3430_REV_ES3_1 ||
193 omap_rev() == OMAP3430_REV_ES3_1_2)
194 omap_features |= OMAP3_HAS_IO_CHAIN_CTRL;
196 omap_features |= OMAP3_HAS_SDRC;
199 * TODO: Get additional info (where applicable)
200 * e.g. Size of L2 cache.
204 static void __init omap4_check_features(void)
208 if (cpu_is_omap443x())
209 omap_features |= OMAP4_HAS_MPU_1GHZ;
212 if (cpu_is_omap446x()) {
214 read_tap_reg(OMAP4_CTRL_MODULE_CORE_STD_FUSE_PROD_ID_1);
215 switch ((si_type & (3 << 16)) >> 16) {
217 /* High performance device */
218 omap_features |= OMAP4_HAS_MPU_1_5GHZ;
222 /* Standard device */
223 omap_features |= OMAP4_HAS_MPU_1_2GHZ;
229 static void __init ti816x_check_features(void)
231 omap_features = OMAP3_HAS_NEON;
234 static void __init omap3_check_revision(const char **cpu_rev)
241 * We cannot access revision registers on ES1.0.
242 * If the processor type is Cortex-A8 and the revision is 0x0
243 * it means its Cortex r0p0 which is 3430 ES1.0.
245 cpuid = read_cpuid(CPUID_ID);
246 if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) {
247 omap_revision = OMAP3430_REV_ES1_0;
253 * Detection for 34xx ES2.0 and above can be done with just
254 * hawkeye and rev. See TRM 1.5.2 Device Identification.
255 * Note that rev does not map directly to our defined processor
256 * revision numbers as ES1.0 uses value 0.
258 idcode = read_tap_reg(OMAP_TAP_IDCODE);
259 hawkeye = (idcode >> 12) & 0xffff;
260 rev = (idcode >> 28) & 0xff;
264 /* Handle 34xx/35xx devices */
266 case 0: /* Take care of early samples */
268 omap_revision = OMAP3430_REV_ES2_0;
272 omap_revision = OMAP3430_REV_ES2_1;
276 omap_revision = OMAP3430_REV_ES3_0;
280 omap_revision = OMAP3430_REV_ES3_1;
286 /* Use the latest known revision as default */
287 omap_revision = OMAP3430_REV_ES3_1_2;
293 * Handle OMAP/AM 3505/3517 devices
295 * Set the device to be OMAP3517 here. Actual device
296 * is identified later based on the features.
300 omap_revision = OMAP3517_REV_ES1_0;
306 omap_revision = OMAP3517_REV_ES1_1;
311 /* Handle 36xx devices */
314 case 0: /* Take care of early samples */
315 omap_revision = OMAP3630_REV_ES1_0;
319 omap_revision = OMAP3630_REV_ES1_1;
325 omap_revision = OMAP3630_REV_ES1_2;
332 omap_revision = TI8168_REV_ES1_0;
338 omap_revision = TI8168_REV_ES1_1;
344 /* Unknown default to latest silicon rev as default */
345 omap_revision = OMAP3630_REV_ES1_2;
347 pr_warn("Warning: unknown chip type; assuming OMAP3630ES1.2\n");
351 static void __init omap4_check_revision(void)
358 * The IC rev detection is done with hawkeye and rev.
359 * Note that rev does not map directly to defined processor
360 * revision numbers as ES1.0 uses value 0.
362 idcode = read_tap_reg(OMAP_TAP_IDCODE);
363 hawkeye = (idcode >> 12) & 0xffff;
364 rev = (idcode >> 28) & 0xf;
367 * Few initial 4430 ES2.0 samples IDCODE is same as ES1.0
368 * Use ARM register to detect the correct ES version
370 if (!rev && (hawkeye != 0xb94e)) {
371 idcode = read_cpuid(CPUID_ID);
372 rev = (idcode & 0xf) - 1;
379 omap_revision = OMAP4430_REV_ES1_0;
383 omap_revision = OMAP4430_REV_ES2_0;
389 omap_revision = OMAP4430_REV_ES2_1;
393 omap_revision = OMAP4430_REV_ES2_2;
400 omap_revision = OMAP4460_REV_ES1_0;
405 /* Unknown default to latest silicon rev as default */
406 omap_revision = OMAP4430_REV_ES2_2;
409 pr_info("OMAP%04x ES%d.%d\n", omap_rev() >> 16,
410 ((omap_rev() >> 12) & 0xf), ((omap_rev() >> 8) & 0xf));
413 #define OMAP3_SHOW_FEATURE(feat) \
414 if (omap3_has_ ##feat()) \
417 static void __init omap3_cpuinfo(const char *cpu_rev)
419 const char *cpu_name;
422 * OMAP3430 and OMAP3530 are assumed to be same.
424 * OMAP3525, OMAP3515 and OMAP3503 can be detected only based
425 * on available features. Upon detection, update the CPU id
426 * and CPU class bits.
428 if (cpu_is_omap3630()) {
429 cpu_name = "OMAP3630";
430 } else if (cpu_is_omap3517()) {
432 cpu_name = (omap3_has_sgx()) ? "AM3517" : "AM3505";
433 } else if (cpu_is_ti816x()) {
435 } else if (omap3_has_iva() && omap3_has_sgx()) {
436 /* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */
437 cpu_name = "OMAP3430/3530";
438 } else if (omap3_has_iva()) {
439 cpu_name = "OMAP3525";
440 } else if (omap3_has_sgx()) {
441 cpu_name = "OMAP3515";
443 cpu_name = "OMAP3503";
446 /* Print verbose information */
447 pr_info("%s ES%s (", cpu_name, cpu_rev);
449 OMAP3_SHOW_FEATURE(l2cache);
450 OMAP3_SHOW_FEATURE(iva);
451 OMAP3_SHOW_FEATURE(sgx);
452 OMAP3_SHOW_FEATURE(neon);
453 OMAP3_SHOW_FEATURE(isp);
454 OMAP3_SHOW_FEATURE(192mhz_clk);
460 * Try to detect the exact revision of the omap we're running on
462 void __init omap2_check_revision(void)
467 * At this point we have an idea about the processor revision set
468 * earlier with omap2_set_globals_tap().
470 if (cpu_is_omap24xx()) {
471 omap24xx_check_revision();
472 } else if (cpu_is_omap34xx()) {
473 omap3_check_revision(&cpu_rev);
475 /* TI816X doesn't have feature register */
476 if (!cpu_is_ti816x())
477 omap3_check_features();
479 ti816x_check_features();
481 omap3_cpuinfo(cpu_rev);
483 } else if (cpu_is_omap44xx()) {
484 omap4_check_revision();
485 omap4_check_features();
488 pr_err("OMAP revision unknown, please fix!\n");
493 * Set up things for map_io and processor detection later on. Gets called
494 * pretty much first thing from board init. For multi-omap, this gets
495 * cpu_is_omapxxxx() working accurately enough for map_io. Then we'll try to
496 * detect the exact revision later on in omap2_detect_revision() once map_io
499 void __init omap2_set_globals_tap(struct omap_globals *omap2_globals)
501 omap_revision = omap2_globals->class;
502 tap_base = omap2_globals->tap;
504 if (cpu_is_omap34xx())
505 tap_prod_id = 0x0210;
507 tap_prod_id = 0x0208;