} PVR_POWER_STATE, *PPVR_POWER_STATE;
+typedef enum _PVRSRV_SYS_POWER_STATE_
+{
+ PVRSRV_SYS_POWER_STATE_Unspecified = -1,
+ PVRSRV_SYS_POWER_STATE_D0 = 0,
+ PVRSRV_SYS_POWER_STATE_D1 = 1,
+ PVRSRV_SYS_POWER_STATE_D2 = 2,
+ PVRSRV_SYS_POWER_STATE_D3 = 3,
+ PVRSRV_SYS_POWER_STATE_D4 = 4,
+
+ PVRSRV_SYS_POWER_STATE_FORCE_I32 = 0x7fffffff
+
+} PVRSRV_SYS_POWER_STATE, *PPVRSRV_SYS_POWER_STATE;
+
+
+typedef enum _PVRSRV_DEV_POWER_STATE_
+{
+ PVRSRV_DEV_POWER_STATE_DEFAULT = -1,
+ PVRSRV_DEV_POWER_STATE_ON = 0,
+ PVRSRV_DEV_POWER_STATE_IDLE = 1,
+ PVRSRV_DEV_POWER_STATE_OFF = 2,
+
+ PVRSRV_DEV_POWER_STATE_FORCE_I32 = 0x7fffffff
+
+} PVRSRV_DEV_POWER_STATE, *PPVRSRV_DEV_POWER_STATE;
+
typedef PVRSRV_ERROR (*PFN_PRE_POWER) (IMG_HANDLE, PVR_POWER_STATE, PVR_POWER_STATE);
typedef PVRSRV_ERROR (*PFN_POST_POWER) (IMG_HANDLE, PVR_POWER_STATE, PVR_POWER_STATE);
-/**********************************************************************\r
- *\r
- * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.\r
- * \r
- * This program is free software; you can redistribute it and/or modify it\r
- * under the terms and conditions of the GNU General Public License,\r
- * version 2, as published by the Free Software Foundation.\r
- * \r
- * This program is distributed in the hope it will be useful but, except \r
- * as otherwise stated in writing, without any warranty; without even the \r
- * implied warranty of merchantability or fitness for a particular purpose. \r
- * See the GNU General Public License for more details.\r
- * \r
- * You should have received a copy of the GNU General Public License along with\r
- * this program; if not, write to the Free Software Foundation, Inc.,\r
- * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.\r
- * \r
- * The full GNU General Public License is included in this distribution in\r
- * the file called "COPYING".\r
- *\r
- * Contact Information:\r
- * Imagination Technologies Ltd. <gpl-support@imgtec.com>\r
- * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK \r
- *\r
- ******************************************************************************/\r
-\r
-#if !defined (__KERNELDISPLAY_H__)\r
-#define __KERNELDISPLAY_H__\r
-\r
-typedef PVRSRV_ERROR (*PFN_OPEN_DC_DEVICE)(IMG_UINT32, IMG_HANDLE*, PVRSRV_SYNC_DATA*);\r
-typedef PVRSRV_ERROR (*PFN_CLOSE_DC_DEVICE)(IMG_HANDLE);\r
-typedef PVRSRV_ERROR (*PFN_ENUM_DC_FORMATS)(IMG_HANDLE, IMG_UINT32*, DISPLAY_FORMAT*);\r
-typedef PVRSRV_ERROR (*PFN_ENUM_DC_DIMS)(IMG_HANDLE,\r
- DISPLAY_FORMAT*,\r
- IMG_UINT32*,\r
- DISPLAY_DIMS*);\r
-typedef PVRSRV_ERROR (*PFN_GET_DC_SYSTEMBUFFER)(IMG_HANDLE, IMG_HANDLE*);\r
-typedef PVRSRV_ERROR (*PFN_GET_DC_INFO)(IMG_HANDLE, DISPLAY_INFO*);\r
-typedef PVRSRV_ERROR (*PFN_CREATE_DC_SWAPCHAIN)(IMG_HANDLE,\r
- IMG_UINT32, \r
- DISPLAY_SURF_ATTRIBUTES*, \r
- DISPLAY_SURF_ATTRIBUTES*,\r
- IMG_UINT32, \r
- PVRSRV_SYNC_DATA**,\r
- IMG_UINT32,\r
- IMG_HANDLE*, \r
- IMG_UINT32*);\r
-typedef PVRSRV_ERROR (*PFN_DESTROY_DC_SWAPCHAIN)(IMG_HANDLE, \r
- IMG_HANDLE);\r
-typedef PVRSRV_ERROR (*PFN_SET_DC_DSTRECT)(IMG_HANDLE, IMG_HANDLE, IMG_RECT*);\r
-typedef PVRSRV_ERROR (*PFN_SET_DC_SRCRECT)(IMG_HANDLE, IMG_HANDLE, IMG_RECT*);\r
-typedef PVRSRV_ERROR (*PFN_SET_DC_DSTCK)(IMG_HANDLE, IMG_HANDLE, IMG_UINT32);\r
-typedef PVRSRV_ERROR (*PFN_SET_DC_SRCCK)(IMG_HANDLE, IMG_HANDLE, IMG_UINT32);\r
-typedef PVRSRV_ERROR (*PFN_GET_DC_BUFFERS)(IMG_HANDLE,\r
- IMG_HANDLE,\r
- IMG_UINT32*,\r
- IMG_HANDLE*);\r
-typedef PVRSRV_ERROR (*PFN_SWAP_TO_DC_BUFFER)(IMG_HANDLE,\r
- IMG_HANDLE,\r
- IMG_UINT32,\r
- IMG_HANDLE,\r
- IMG_UINT32,\r
- IMG_RECT*);\r
-typedef PVRSRV_ERROR (*PFN_SWAP_TO_DC_SYSTEM)(IMG_HANDLE, IMG_HANDLE);\r
-typedef IMG_VOID (*PFN_SET_DC_STATE)(IMG_HANDLE, IMG_UINT32);\r
-\r
-typedef struct PVRSRV_DC_SRV2DISP_KMJTABLE_TAG\r
-{\r
- IMG_UINT32 ui32TableSize;\r
- PFN_OPEN_DC_DEVICE pfnOpenDCDevice;\r
- PFN_CLOSE_DC_DEVICE pfnCloseDCDevice;\r
- PFN_ENUM_DC_FORMATS pfnEnumDCFormats;\r
- PFN_ENUM_DC_DIMS pfnEnumDCDims;\r
- PFN_GET_DC_SYSTEMBUFFER pfnGetDCSystemBuffer;\r
- PFN_GET_DC_INFO pfnGetDCInfo;\r
- PFN_GET_BUFFER_ADDR pfnGetBufferAddr;\r
- PFN_CREATE_DC_SWAPCHAIN pfnCreateDCSwapChain;\r
- PFN_DESTROY_DC_SWAPCHAIN pfnDestroyDCSwapChain;\r
- PFN_SET_DC_DSTRECT pfnSetDCDstRect;\r
- PFN_SET_DC_SRCRECT pfnSetDCSrcRect;\r
- PFN_SET_DC_DSTCK pfnSetDCDstColourKey;\r
- PFN_SET_DC_SRCCK pfnSetDCSrcColourKey;\r
- PFN_GET_DC_BUFFERS pfnGetDCBuffers;\r
- PFN_SWAP_TO_DC_BUFFER pfnSwapToDCBuffer;\r
- PFN_SWAP_TO_DC_SYSTEM pfnSwapToDCSystem;\r
- PFN_SET_DC_STATE pfnSetDCState;\r
-\r
-} PVRSRV_DC_SRV2DISP_KMJTABLE;\r
-\r
-typedef IMG_BOOL (*PFN_ISR_HANDLER)(IMG_VOID*);\r
-\r
-typedef PVRSRV_ERROR (*PFN_DC_REGISTER_DISPLAY_DEV)(PVRSRV_DC_SRV2DISP_KMJTABLE*, IMG_UINT32*);\r
-typedef PVRSRV_ERROR (*PFN_DC_REMOVE_DISPLAY_DEV)(IMG_UINT32);\r
-typedef PVRSRV_ERROR (*PFN_DC_OEM_FUNCTION)(IMG_UINT32, IMG_VOID*, IMG_UINT32, IMG_VOID*, IMG_UINT32);\r
-typedef PVRSRV_ERROR (*PFN_DC_REGISTER_COMMANDPROCLIST)(IMG_UINT32, PPFN_CMD_PROC,IMG_UINT32[][2], IMG_UINT32);\r
-typedef PVRSRV_ERROR (*PFN_DC_REMOVE_COMMANDPROCLIST)(IMG_UINT32, IMG_UINT32);\r
-typedef IMG_VOID (*PFN_DC_CMD_COMPLETE)(IMG_HANDLE, IMG_BOOL);\r
-typedef PVRSRV_ERROR (*PFN_DC_REGISTER_SYS_ISR)(PFN_ISR_HANDLER, IMG_VOID*, IMG_UINT32, IMG_UINT32);\r
-typedef PVRSRV_ERROR (*PFN_DC_REGISTER_POWER)(IMG_UINT32, PFN_PRE_POWER, PFN_POST_POWER,\r
- PFN_PRE_CLOCKSPEED_CHANGE, PFN_POST_CLOCKSPEED_CHANGE,\r
- IMG_HANDLE, PVR_POWER_STATE, PVR_POWER_STATE);\r
-\r
-typedef struct PVRSRV_DC_DISP2SRV_KMJTABLE_TAG\r
-{\r
- IMG_UINT32 ui32TableSize;\r
- PFN_DC_REGISTER_DISPLAY_DEV pfnPVRSRVRegisterDCDevice;\r
- PFN_DC_REMOVE_DISPLAY_DEV pfnPVRSRVRemoveDCDevice;\r
- PFN_DC_OEM_FUNCTION pfnPVRSRVOEMFunction;\r
- PFN_DC_REGISTER_COMMANDPROCLIST pfnPVRSRVRegisterCmdProcList;\r
- PFN_DC_REMOVE_COMMANDPROCLIST pfnPVRSRVRemoveCmdProcList;\r
- PFN_DC_CMD_COMPLETE pfnPVRSRVCmdComplete;\r
- PFN_DC_REGISTER_SYS_ISR pfnPVRSRVRegisterSystemISRHandler;\r
- PFN_DC_REGISTER_POWER pfnPVRSRVRegisterPowerDevice;\r
-} PVRSRV_DC_DISP2SRV_KMJTABLE, *PPVRSRV_DC_DISP2SRV_KMJTABLE;\r
-\r
-\r
-typedef struct DISPLAYCLASS_FLIP_COMMAND_TAG\r
-{\r
- \r
- IMG_HANDLE hExtDevice;\r
-\r
- \r
- IMG_HANDLE hExtSwapChain;\r
-\r
- \r
- IMG_HANDLE hExtBuffer;\r
-\r
- \r
- IMG_HANDLE hPrivateTag;\r
-\r
- \r
- IMG_UINT32 ui32ClipRectCount;\r
-\r
- \r
- IMG_RECT *psClipRect;\r
-\r
- \r
- IMG_UINT32 ui32SwapInterval;\r
-\r
-} DISPLAYCLASS_FLIP_COMMAND;\r
-\r
-#define DC_FLIP_COMMAND 0\r
-\r
-#define DC_STATE_NO_FLUSH_COMMANDS 0\r
-#define DC_STATE_FLUSH_COMMANDS 1\r
-#define DC_STATE_SUSPEND_COMMANDS 2\r
-#define DC_STATE_RESUME_COMMANDS 3\r
-\r
-\r
-typedef IMG_BOOL (*PFN_DC_GET_PVRJTABLE)(PPVRSRV_DC_DISP2SRV_KMJTABLE);\r
-\r
-\r
-\r
-#endif\r
-\r
+/**********************************************************************
+ *
+ * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful but, except
+ * as otherwise stated in writing, without any warranty; without even the
+ * implied warranty of merchantability or fitness for a particular purpose.
+ * See the GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * The full GNU General Public License is included in this distribution in
+ * the file called "COPYING".
+ *
+ * Contact Information:
+ * Imagination Technologies Ltd. <gpl-support@imgtec.com>
+ * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
+ *
+ ******************************************************************************/
+
+#if !defined (__KERNELDISPLAY_H__)
+#define __KERNELDISPLAY_H__
+
+typedef PVRSRV_ERROR (*PFN_OPEN_DC_DEVICE)(IMG_UINT32, IMG_HANDLE*, PVRSRV_SYNC_DATA*);
+typedef PVRSRV_ERROR (*PFN_CLOSE_DC_DEVICE)(IMG_HANDLE);
+typedef PVRSRV_ERROR (*PFN_ENUM_DC_FORMATS)(IMG_HANDLE, IMG_UINT32*, DISPLAY_FORMAT*);
+typedef PVRSRV_ERROR (*PFN_ENUM_DC_DIMS)(IMG_HANDLE,
+ DISPLAY_FORMAT*,
+ IMG_UINT32*,
+ DISPLAY_DIMS*);
+typedef PVRSRV_ERROR (*PFN_GET_DC_SYSTEMBUFFER)(IMG_HANDLE, IMG_HANDLE*);
+typedef PVRSRV_ERROR (*PFN_GET_DC_INFO)(IMG_HANDLE, DISPLAY_INFO*);
+typedef PVRSRV_ERROR (*PFN_CREATE_DC_SWAPCHAIN)(IMG_HANDLE,
+ IMG_UINT32,
+ DISPLAY_SURF_ATTRIBUTES*,
+ DISPLAY_SURF_ATTRIBUTES*,
+ IMG_UINT32,
+ PVRSRV_SYNC_DATA**,
+ IMG_UINT32,
+ IMG_HANDLE*,
+ IMG_UINT32*);
+typedef PVRSRV_ERROR (*PFN_DESTROY_DC_SWAPCHAIN)(IMG_HANDLE,
+ IMG_HANDLE);
+typedef PVRSRV_ERROR (*PFN_SET_DC_DSTRECT)(IMG_HANDLE, IMG_HANDLE, IMG_RECT*);
+typedef PVRSRV_ERROR (*PFN_SET_DC_SRCRECT)(IMG_HANDLE, IMG_HANDLE, IMG_RECT*);
+typedef PVRSRV_ERROR (*PFN_SET_DC_DSTCK)(IMG_HANDLE, IMG_HANDLE, IMG_UINT32);
+typedef PVRSRV_ERROR (*PFN_SET_DC_SRCCK)(IMG_HANDLE, IMG_HANDLE, IMG_UINT32);
+typedef PVRSRV_ERROR (*PFN_GET_DC_BUFFERS)(IMG_HANDLE,
+ IMG_HANDLE,
+ IMG_UINT32*,
+ IMG_HANDLE*);
+typedef PVRSRV_ERROR (*PFN_SWAP_TO_DC_BUFFER)(IMG_HANDLE,
+ IMG_HANDLE,
+ IMG_UINT32,
+ IMG_HANDLE,
+ IMG_UINT32,
+ IMG_RECT*);
+typedef PVRSRV_ERROR (*PFN_SWAP_TO_DC_SYSTEM)(IMG_HANDLE, IMG_HANDLE);
+typedef IMG_VOID (*PFN_SET_DC_STATE)(IMG_HANDLE, IMG_UINT32);
+
+typedef struct PVRSRV_DC_SRV2DISP_KMJTABLE_TAG
+{
+ IMG_UINT32 ui32TableSize;
+ PFN_OPEN_DC_DEVICE pfnOpenDCDevice;
+ PFN_CLOSE_DC_DEVICE pfnCloseDCDevice;
+ PFN_ENUM_DC_FORMATS pfnEnumDCFormats;
+ PFN_ENUM_DC_DIMS pfnEnumDCDims;
+ PFN_GET_DC_SYSTEMBUFFER pfnGetDCSystemBuffer;
+ PFN_GET_DC_INFO pfnGetDCInfo;
+ PFN_GET_BUFFER_ADDR pfnGetBufferAddr;
+ PFN_CREATE_DC_SWAPCHAIN pfnCreateDCSwapChain;
+ PFN_DESTROY_DC_SWAPCHAIN pfnDestroyDCSwapChain;
+ PFN_SET_DC_DSTRECT pfnSetDCDstRect;
+ PFN_SET_DC_SRCRECT pfnSetDCSrcRect;
+ PFN_SET_DC_DSTCK pfnSetDCDstColourKey;
+ PFN_SET_DC_SRCCK pfnSetDCSrcColourKey;
+ PFN_GET_DC_BUFFERS pfnGetDCBuffers;
+ PFN_SWAP_TO_DC_BUFFER pfnSwapToDCBuffer;
+ PFN_SWAP_TO_DC_SYSTEM pfnSwapToDCSystem;
+ PFN_SET_DC_STATE pfnSetDCState;
+
+} PVRSRV_DC_SRV2DISP_KMJTABLE;
+
+typedef IMG_BOOL (*PFN_ISR_HANDLER)(IMG_VOID*);
+
+typedef PVRSRV_ERROR (*PFN_DC_REGISTER_DISPLAY_DEV)(PVRSRV_DC_SRV2DISP_KMJTABLE*, IMG_UINT32*);
+typedef PVRSRV_ERROR (*PFN_DC_REMOVE_DISPLAY_DEV)(IMG_UINT32);
+typedef PVRSRV_ERROR (*PFN_DC_OEM_FUNCTION)(IMG_UINT32, IMG_VOID*, IMG_UINT32, IMG_VOID*, IMG_UINT32);
+typedef PVRSRV_ERROR (*PFN_DC_REGISTER_COMMANDPROCLIST)(IMG_UINT32, PPFN_CMD_PROC,IMG_UINT32[][2], IMG_UINT32);
+typedef PVRSRV_ERROR (*PFN_DC_REMOVE_COMMANDPROCLIST)(IMG_UINT32, IMG_UINT32);
+typedef IMG_VOID (*PFN_DC_CMD_COMPLETE)(IMG_HANDLE, IMG_BOOL);
+typedef PVRSRV_ERROR (*PFN_DC_REGISTER_SYS_ISR)(PFN_ISR_HANDLER, IMG_VOID*, IMG_UINT32, IMG_UINT32);
+typedef PVRSRV_ERROR (*PFN_DC_REGISTER_POWER)(IMG_UINT32, PFN_PRE_POWER, PFN_POST_POWER,
+ PFN_PRE_CLOCKSPEED_CHANGE, PFN_POST_CLOCKSPEED_CHANGE,
+ IMG_HANDLE, PVR_POWER_STATE, PVR_POWER_STATE);
+
+typedef struct PVRSRV_DC_DISP2SRV_KMJTABLE_TAG
+{
+ IMG_UINT32 ui32TableSize;
+ PFN_DC_REGISTER_DISPLAY_DEV pfnPVRSRVRegisterDCDevice;
+ PFN_DC_REMOVE_DISPLAY_DEV pfnPVRSRVRemoveDCDevice;
+ PFN_DC_OEM_FUNCTION pfnPVRSRVOEMFunction;
+ PFN_DC_REGISTER_COMMANDPROCLIST pfnPVRSRVRegisterCmdProcList;
+ PFN_DC_REMOVE_COMMANDPROCLIST pfnPVRSRVRemoveCmdProcList;
+ PFN_DC_CMD_COMPLETE pfnPVRSRVCmdComplete;
+ PFN_DC_REGISTER_SYS_ISR pfnPVRSRVRegisterSystemISRHandler;
+ PFN_DC_REGISTER_POWER pfnPVRSRVRegisterPowerDevice;
+} PVRSRV_DC_DISP2SRV_KMJTABLE, *PPVRSRV_DC_DISP2SRV_KMJTABLE;
+
+
+typedef struct DISPLAYCLASS_FLIP_COMMAND_TAG
+{
+
+ IMG_HANDLE hExtDevice;
+
+
+ IMG_HANDLE hExtSwapChain;
+
+
+ IMG_HANDLE hExtBuffer;
+
+
+ IMG_HANDLE hPrivateTag;
+
+
+ IMG_UINT32 ui32ClipRectCount;
+
+
+ IMG_RECT *psClipRect;
+
+
+ IMG_UINT32 ui32SwapInterval;
+
+} DISPLAYCLASS_FLIP_COMMAND;
+
+#define DC_FLIP_COMMAND 0
+
+#define DC_STATE_NO_FLUSH_COMMANDS 0
+#define DC_STATE_FLUSH_COMMANDS 1
+#define DC_STATE_SUSPEND_COMMANDS 2
+#define DC_STATE_RESUME_COMMANDS 3
+
+
+typedef IMG_BOOL (*PFN_DC_GET_PVRJTABLE)(PPVRSRV_DC_DISP2SRV_KMJTABLE);
+
+
+
+#endif
+
#endif
-#define PVRSRV_BRIDGE_CORE_CMD_FIRST 0
+#define PVRSRV_BRIDGE_CORE_CMD_FIRST 0UL
#define PVRSRV_BRIDGE_ENUM_DEVICES PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+0)
#define PVRSRV_BRIDGE_ACQUIRE_DEVICEINFO PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+1)
#define PVRSRV_BRIDGE_RELEASE_DEVICEINFO PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+2)
IMG_HANDLE hDevCookie;
IMG_HANDLE hDevMemHeap;
IMG_UINT32 ui32Attribs;
- IMG_UINT32 ui32Size;
- IMG_UINT32 ui32Alignment;
+ IMG_SIZE_T ui32Size;
+ IMG_SIZE_T ui32Alignment;
}PVRSRV_BRIDGE_IN_ALLOCDEVICEMEM;
{
IMG_UINT32 ui32BridgeFlags;
IMG_HANDLE hDevCookie;
- IMG_UINT32 ui32QueueSize;
+ IMG_SIZE_T ui32QueueSize;
}PVRSRV_BRIDGE_IN_CREATECOMMANDQUEUE;
IMG_UINT32 ui32BridgeFlags;
IMG_HANDLE hDevMemHeap;
IMG_DEV_VIRTADDR *psDevVAddr;
- IMG_UINT32 ui32Size;
- IMG_UINT32 ui32Alignment;
+ IMG_SIZE_T ui32Size;
+ IMG_SIZE_T ui32Alignment;
}PVRSRV_BRIDGE_IN_RESERVE_DEV_VIRTMEM;
IMG_HANDLE hDevCookie;
IMG_HANDLE hDevMemContext;
IMG_VOID *pvLinAddr;
- IMG_UINT32 ui32ByteSize;
- IMG_UINT32 ui32PageOffset;
+ IMG_SIZE_T ui32ByteSize;
+ IMG_SIZE_T ui32PageOffset;
IMG_BOOL bPhysContig;
IMG_UINT32 ui32NumPageTableEntries;
IMG_SYS_PHYADDR *psSysPAddr;
typedef struct PVRSRV_BRIDGE_OUT_GETFREEDEVICEMEM_TAG
{
PVRSRV_ERROR eError;
- IMG_UINT32 ui32Total;
- IMG_UINT32 ui32Free;
- IMG_UINT32 ui32LargestBlock;
+ IMG_SIZE_T ui32Total;
+ IMG_SIZE_T ui32Free;
+ IMG_SIZE_T ui32LargestBlock;
} PVRSRV_BRIDGE_OUT_GETFREEDEVICEMEM;
typedef struct PVRSRV_BRIDGE_IN_GET_FB_STATS_TAG
{
IMG_UINT32 ui32BridgeFlags;
- IMG_UINT32 ui32Total;
- IMG_UINT32 ui32Available;
+ IMG_SIZE_T ui32Total;
+ IMG_SIZE_T ui32Available;
} PVRSRV_BRIDGE_IN_GET_FB_STATS;
{
IMG_UINT32 ui32BridgeFlags;
IMG_UINT32 ui32Flags;
- IMG_UINT32 ui32Size;
+ IMG_SIZE_T ui32Size;
}PVRSRV_BRIDGE_IN_ALLOC_SHARED_SYS_MEM;
typedef struct PVRSRV_BRIDGE_OUT_ALLOC_SHARED_SYS_MEM_TAG
IMG_HANDLE *phDevCookie);
IMG_IMPORT
-PVRSRV_ERROR IMG_CALLCONV PVRSRVCreateCommandQueueKM(IMG_UINT32 ui32QueueSize,
+PVRSRV_ERROR IMG_CALLCONV PVRSRVCreateCommandQueueKM(IMG_SIZE_T ui32QueueSize,
PVRSRV_QUEUE_INFO **ppsQueueInfo);
IMG_IMPORT
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVDestroyDeviceMemContextKM(IMG_HANDLE hDevCookie,
IMG_HANDLE hDevMemContext,
- IMG_BOOL *pbCreated);
+ IMG_BOOL *pbDestroyed);
IMG_IMPORT
PVRSRV_PER_PROCESS_DATA *psPerProc,
IMG_HANDLE hDevMemHeap,
IMG_UINT32 ui32Flags,
- IMG_UINT32 ui32Size,
- IMG_UINT32 ui32Alignment,
+ IMG_SIZE_T ui32Size,
+ IMG_SIZE_T ui32Alignment,
PVRSRV_KERNEL_MEM_INFO **ppsMemInfo);
+
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVFreeDeviceMemKM(IMG_HANDLE hDevCookie,
PVRSRV_KERNEL_MEM_INFO *psMemInfo);
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVReserveDeviceVirtualMemKM(IMG_HANDLE hDevMemHeap,
IMG_DEV_VIRTADDR *psDevVAddr,
- IMG_UINT32 ui32Size,
- IMG_UINT32 ui32Alignment,
+ IMG_SIZE_T ui32Size,
+ IMG_SIZE_T ui32Alignment,
PVRSRV_KERNEL_MEM_INFO **ppsMemInfo);
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVWrapExtMemoryKM(IMG_HANDLE hDevCookie,
PVRSRV_PER_PROCESS_DATA *psPerProc,
IMG_HANDLE hDevMemContext,
- IMG_UINT32 ui32ByteSize,
- IMG_UINT32 ui32PageOffset,
+ IMG_SIZE_T ui32ByteSize,
+ IMG_SIZE_T ui32PageOffset,
IMG_BOOL bPhysContig,
IMG_SYS_PHYADDR *psSysAddr,
IMG_VOID *pvLinAddr,
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVGetFreeDeviceMemKM(IMG_UINT32 ui32Flags,
- IMG_UINT32 *pui32Total,
- IMG_UINT32 *pui32Free,
- IMG_UINT32 *pui32LargestBlock);
+ IMG_SIZE_T *pui32Total,
+ IMG_SIZE_T *pui32Free,
+ IMG_SIZE_T *pui32LargestBlock);
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVAllocSyncInfoKM(IMG_HANDLE hDevCookie,
IMG_HANDLE hDevMemContext,
IMG_IMPORT
PVRSRV_ERROR IMG_CALLCONV PVRSRVGetMiscInfoKM(PVRSRV_MISC_INFO *psMiscInfo);
-PVRSRV_ERROR PVRSRVGetFBStatsKM(IMG_UINT32 *pui32Total,
- IMG_UINT32 *pui32Available);
+PVRSRV_ERROR PVRSRVGetFBStatsKM(IMG_SIZE_T *pui32Total,
+ IMG_SIZE_T *pui32Available);
IMG_IMPORT PVRSRV_ERROR
PVRSRVAllocSharedSysMemoryKM(PVRSRV_PER_PROCESS_DATA *psPerProc,
IMG_UINT32 ui32Flags,
- IMG_UINT32 ui32Size,
+ IMG_SIZE_T ui32Size,
PVRSRV_KERNEL_MEM_INFO **ppsKernelMemInfo);
IMG_IMPORT PVRSRV_ERROR
IMG_UINT32 ui32Flags;
- IMG_UINT32 ui32AllocSize;
+ IMG_SIZE_T ui32AllocSize;
PVRSRV_MEMBLK sMemBlk;
typedef struct _PVRSRV_COMMAND
{
- IMG_UINT32 ui32CmdSize;
+ IMG_SIZE_T ui32CmdSize;
IMG_UINT32 ui32DevIndex;
IMG_UINT32 CommandType;
IMG_UINT32 ui32DstSyncCount;
IMG_UINT32 ui32SrcSyncCount;
PVRSRV_SYNC_OBJECT *psDstSync;
PVRSRV_SYNC_OBJECT *psSrcSync;
- IMG_UINT32 ui32DataSize;
+ IMG_SIZE_T ui32DataSize;
IMG_UINT32 ui32ProcessID;
IMG_VOID *pvData;
}PVRSRV_COMMAND, *PPVRSRV_COMMAND;
{
IMG_VOID *pvLinQueueKM;
IMG_VOID *pvLinQueueUM;
- volatile IMG_UINT32 ui32ReadOffset;
- volatile IMG_UINT32 ui32WriteOffset;
+ volatile IMG_SIZE_T ui32ReadOffset;
+ volatile IMG_SIZE_T ui32WriteOffset;
IMG_UINT32 *pui32KickerAddrKM;
IMG_UINT32 *pui32KickerAddrUM;
- IMG_UINT32 ui32QueueSize;
+ IMG_SIZE_T ui32QueueSize;
IMG_UINT32 ui32ProcessID;
IMG_IMPORT PVRSRV_ERROR IMG_CALLCONV
PVRSRVAllocSharedSysMem(const PVRSRV_CONNECTION *psConnection,
IMG_UINT32 ui32Flags,
- IMG_UINT32 ui32Size,
+ IMG_SIZE_T ui32Size,
PVRSRV_CLIENT_MEM_INFO **ppsClientMemInfo);
IMG_IMPORT PVRSRV_ERROR IMG_CALLCONV
--- /dev/null
+/**********************************************************************
+ *
+ * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful but, except
+ * as otherwise stated in writing, without any warranty; without even the
+ * implied warranty of merchantability or fitness for a particular purpose.
+ * See the GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * The full GNU General Public License is included in this distribution in
+ * the file called "COPYING".
+ *
+ * Contact Information:
+ * Imagination Technologies Ltd. <gpl-support@imgtec.com>
+ * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
+ *
+ ******************************************************************************/
+
+#if !defined (__SGX_MKIF_KM_H__)
+#define __SGX_MKIF_KM_H__
+
+#include "img_types.h"
+#include "servicesint.h"
+#include "sgxapi_km.h"
+
+
+#if defined(SGX_FEATURE_MP)
+ #define SGX_REG_BANK_SHIFT (12)
+ #define SGX_REG_BANK_SIZE (0x4000)
+ #if defined(SGX541)
+ #define SGX_REG_BANK_BASE_INDEX (1)
+ #define SGX_REG_BANK_MASTER_INDEX (SGX_REG_BANK_BASE_INDEX + SGX_FEATURE_MP_CORE_COUNT)
+ #else
+ #define SGX_REG_BANK_BASE_INDEX (2)
+ #define SGX_REG_BANK_MASTER_INDEX (1)
+ #endif
+ #define SGX_MP_CORE_SELECT(x,i) (x + ((i + SGX_REG_BANK_BASE_INDEX) * SGX_REG_BANK_SIZE))
+ #define SGX_MP_MASTER_SELECT(x) (x + (SGX_REG_BANK_MASTER_INDEX * SGX_REG_BANK_SIZE))
+#else
+ #define SGX_MP_CORE_SELECT(x,i) (x)
+#endif
+
+
+typedef struct _SGXMKIF_COMMAND_
+{
+ IMG_UINT32 ui32ServiceAddress;
+ //IMG_UINT32 ui32CacheControl;
+ //IMG_UINT32 ui32Data[2];
+ IMG_UINT32 ui32Data[3];
+} SGXMKIF_COMMAND;
+
+
+typedef struct _PVRSRV_SGX_KERNEL_CCB_
+{
+ SGXMKIF_COMMAND asCommands[256];
+} PVRSRV_SGX_KERNEL_CCB;
+
+
+typedef struct _PVRSRV_SGX_CCB_CTL_
+{
+ IMG_UINT32 ui32WriteOffset;
+ IMG_UINT32 ui32ReadOffset;
+} PVRSRV_SGX_CCB_CTL;
+
+
+typedef struct _SGXMKIF_HOST_CTL_
+{
+
+ volatile IMG_UINT32 ui32PowerStatus;
+#if defined(SUPPORT_HW_RECOVERY)
+ IMG_UINT32 ui32uKernelDetectedLockups;
+ IMG_UINT32 ui32HostDetectedLockups;
+ IMG_UINT32 ui32HWRecoverySampleRate;
+#endif
+ IMG_UINT32 ui32ActivePowManSampleRate;
+ IMG_UINT32 ui32InterruptFlags;
+ IMG_UINT32 ui32InterruptClearFlags;
+
+ IMG_UINT32 ui32ResManFlags;
+ IMG_DEV_VIRTADDR sResManCleanupData;
+
+ IMG_UINT32 ui32NumActivePowerEvents;
+
+#if defined(SUPPORT_SGX_HWPERF)
+ IMG_UINT32 ui32HWPerfFlags;
+#endif
+
+
+ IMG_UINT32 ui32TimeWraps;
+} SGXMKIF_HOST_CTL;
+
+#define SGXMKIF_CMDTA_CTRLFLAGS_READY 0x00000001
+typedef struct _SGXMKIF_CMDTA_SHARED_
+{
+ IMG_UINT32 ui32NumTAStatusVals;
+ IMG_UINT32 ui32Num3DStatusVals;
+
+
+ IMG_UINT32 ui32TATQSyncWriteOpsPendingVal;
+ IMG_DEV_VIRTADDR sTATQSyncWriteOpsCompleteDevVAddr;
+ IMG_UINT32 ui32TATQSyncReadOpsPendingVal;
+ IMG_DEV_VIRTADDR sTATQSyncReadOpsCompleteDevVAddr;
+
+
+ IMG_UINT32 ui323DTQSyncWriteOpsPendingVal;
+ IMG_DEV_VIRTADDR s3DTQSyncWriteOpsCompleteDevVAddr;
+ IMG_UINT32 ui323DTQSyncReadOpsPendingVal;
+ IMG_DEV_VIRTADDR s3DTQSyncReadOpsCompleteDevVAddr;
+
+
+#if defined(SUPPORT_SGX_GENERALISED_SYNCOBJECTS)
+
+ IMG_UINT32 ui32NumTASrcSyncs;
+ PVRSRV_DEVICE_SYNC_OBJECT asTASrcSyncs[SGX_MAX_TA_SRC_SYNCS];
+ IMG_UINT32 ui32NumTADstSyncs;
+ PVRSRV_DEVICE_SYNC_OBJECT asTADstSyncs[SGX_MAX_TA_DST_SYNCS];
+ IMG_UINT32 ui32Num3DSrcSyncs;
+ PVRSRV_DEVICE_SYNC_OBJECT as3DSrcSyncs[SGX_MAX_3D_SRC_SYNCS];
+#else
+
+ IMG_UINT32 ui32NumSrcSyncs;
+ PVRSRV_DEVICE_SYNC_OBJECT asSrcSyncs[SGX_MAX_SRC_SYNCS];
+#endif
+
+
+ CTL_STATUS sCtlTAStatusInfo[SGX_MAX_TA_STATUS_VALS];
+ CTL_STATUS sCtl3DStatusInfo[SGX_MAX_3D_STATUS_VALS];
+
+ PVRSRV_DEVICE_SYNC_OBJECT sTA3DDependency;
+
+} SGXMKIF_CMDTA_SHARED;
+
+#define SGXTQ_MAX_STATUS SGX_MAX_TRANSFER_STATUS_VALS + 2
+
+#define SGXMKIF_TQFLAGS_NOSYNCUPDATE 0x00000001
+#define SGXMKIF_TQFLAGS_KEEPPENDING 0x00000002
+#define SGXMKIF_TQFLAGS_TATQ_SYNC 0x00000004
+#define SGXMKIF_TQFLAGS_3DTQ_SYNC 0x00000008
+#if defined(SGX_FEATURE_FAST_RENDER_CONTEXT_SWITCH)
+#define SGXMKIF_TQFLAGS_CTXSWITCH 0x00000010
+#endif
+#define SGXMKIF_TQFLAGS_DUMMYTRANSFER 0x00000020
+
+typedef struct _SGXMKIF_TRANSFERCMD_SHARED_
+{
+
+
+ IMG_UINT32 ui32SrcReadOpPendingVal;
+ IMG_DEV_VIRTADDR sSrcReadOpsCompleteDevAddr;
+
+ IMG_UINT32 ui32SrcWriteOpPendingVal;
+ IMG_DEV_VIRTADDR sSrcWriteOpsCompleteDevAddr;
+
+
+
+ IMG_UINT32 ui32DstReadOpPendingVal;
+ IMG_DEV_VIRTADDR sDstReadOpsCompleteDevAddr;
+
+ IMG_UINT32 ui32DstWriteOpPendingVal;
+ IMG_DEV_VIRTADDR sDstWriteOpsCompleteDevAddr;
+
+
+ IMG_UINT32 ui32TASyncWriteOpsPendingVal;
+ IMG_DEV_VIRTADDR sTASyncWriteOpsCompleteDevVAddr;
+ IMG_UINT32 ui32TASyncReadOpsPendingVal;
+ IMG_DEV_VIRTADDR sTASyncReadOpsCompleteDevVAddr;
+
+
+ IMG_UINT32 ui323DSyncWriteOpsPendingVal;
+ IMG_DEV_VIRTADDR s3DSyncWriteOpsCompleteDevVAddr;
+ IMG_UINT32 ui323DSyncReadOpsPendingVal;
+ IMG_DEV_VIRTADDR s3DSyncReadOpsCompleteDevVAddr;
+
+ IMG_UINT32 ui32NumStatusVals;
+ CTL_STATUS sCtlStatusInfo[SGXTQ_MAX_STATUS];
+} SGXMKIF_TRANSFERCMD_SHARED, *PSGXMKIF_TRANSFERCMD_SHARED;
+
+
+#if defined(SGX_FEATURE_2D_HARDWARE)
+typedef struct _SGXMKIF_2DCMD_SHARED_ {
+
+ IMG_UINT32 ui32NumSrcSync;
+ PVRSRV_DEVICE_SYNC_OBJECT sSrcSyncData[SGX_MAX_2D_SRC_SYNC_OPS];
+
+
+ PVRSRV_DEVICE_SYNC_OBJECT sDstSyncData;
+
+
+ PVRSRV_DEVICE_SYNC_OBJECT sTASyncData;
+
+
+ PVRSRV_DEVICE_SYNC_OBJECT s3DSyncData;
+} SGXMKIF_2DCMD_SHARED, *PSGXMKIF_2DCMD_SHARED;
+#endif
+
+
+typedef struct _SGXMKIF_HWDEVICE_SYNC_LIST_
+{
+ IMG_DEV_VIRTADDR sAccessDevAddr;
+ IMG_UINT32 ui32NumSyncObjects;
+
+ PVRSRV_DEVICE_SYNC_OBJECT asSyncData[1];
+} SGXMKIF_HWDEVICE_SYNC_LIST, *PSGXMKIF_HWDEVICE_SYNC_LIST;
+
+
+#define PVRSRV_USSE_EDM_INIT_COMPLETE (1UL << 0)
+
+#define PVRSRV_USSE_EDM_POWMAN_IDLE_COMPLETE (1UL << 2)
+#define PVRSRV_USSE_EDM_POWMAN_POWEROFF_COMPLETE (1UL << 3)
+#define PVRSRV_USSE_EDM_POWMAN_POWEROFF_RESTART_IMMEDIATE (1UL << 4)
+#define PVRSRV_USSE_EDM_POWMAN_NO_WORK (1UL << 5)
+
+#define PVRSRV_USSE_EDM_INTERRUPT_HWR (1UL << 0)
+#define PVRSRV_USSE_EDM_INTERRUPT_ACTIVE_POWER (1UL << 1)
+
+#define PVRSRV_USSE_EDM_CLEANUPCMD_COMPLETE (1UL << 0)
+
+#define PVRSRV_USSE_MISCINFO_READY 0x1UL
+#define PVRSRV_USSE_MISCINFO_GET_STRUCT_SIZES 0x2UL
+#if defined(SUPPORT_SGX_EDM_MEMORY_DEBUG)
+#define PVRSRV_USSE_MISCINFO_MEMREAD 0x4UL
+
+#if !defined(SGX_FEATURE_MULTIPLE_MEM_CONTEXTS)
+#define PVRSRV_USSE_MISCINFO_MEMREAD_FAIL 0x1UL << 31;
+#endif
+#endif
+
+
+typedef enum _SGXMKIF_COMMAND_TYPE_
+{
+ SGXMKIF_COMMAND_EDM_KICK = 0,
+ SGXMKIF_COMMAND_VIDEO_KICK = 1,
+ SGXMKIF_COMMAND_REQUEST_SGXMISCINFO = 2,
+
+ SGXMKIF_COMMAND_FORCE_I32 = -1,
+
+}SGXMKIF_COMMAND_TYPE;
+
+#define PVRSRV_CCBFLAGS_RASTERCMD 0x1
+#define PVRSRV_CCBFLAGS_TRANSFERCMD 0x2
+#define PVRSRV_CCBFLAGS_PROCESS_QUEUESCMD 0x3
+#if defined(SGX_FEATURE_2D_HARDWARE)
+#define PVRSRV_CCBFLAGS_2DCMD 0x4
+#endif
+#define PVRSRV_CCBFLAGS_POWERCMD 0x5
+
+#define PVRSRV_CLEANUPCMD_RT 0x1
+#define PVRSRV_CLEANUPCMD_RC 0x2
+#define PVRSRV_CLEANUPCMD_TC 0x3
+#define PVRSRV_CLEANUPCMD_2DC 0x4
+#define PVRSRV_CLEANUPCMD_PB 0x5
+
+#define PVRSRV_POWERCMD_POWEROFF 0x1
+#define PVRSRV_POWERCMD_IDLE 0x2
+#define PVRSRV_POWERCMD_RESUME 0x3
+
+
+#if defined(SGX_FEATURE_BIF_NUM_DIRLISTS)
+#define SGX_BIF_DIR_LIST_INDEX_EDM (SGX_FEATURE_BIF_NUM_DIRLISTS - 1)
+#else
+#define SGX_BIF_DIR_LIST_INDEX_EDM (0)
+#endif
+
+#define SGX_BIF_INVALIDATE_PTCACHE 0x1
+#define SGX_BIF_INVALIDATE_PDCACHE 0x2
+#define SGX_BIF_INVALIDATE_SLCACHE 0x4
+
+
+typedef struct _SGX_MISCINFO_STRUCT_SIZES_
+{
+#if defined (SGX_FEATURE_2D_HARDWARE)
+ IMG_UINT32 ui32Sizeof_2DCMD;
+ IMG_UINT32 ui32Sizeof_2DCMD_SHARED;
+#endif
+ IMG_UINT32 ui32Sizeof_CMDTA;
+ IMG_UINT32 ui32Sizeof_CMDTA_SHARED;
+ IMG_UINT32 ui32Sizeof_TRANSFERCMD;
+ IMG_UINT32 ui32Sizeof_TRANSFERCMD_SHARED;
+ IMG_UINT32 ui32Sizeof_3DREGISTERS;
+ IMG_UINT32 ui32Sizeof_HWPBDESC;
+ IMG_UINT32 ui32Sizeof_HWRENDERCONTEXT;
+ IMG_UINT32 ui32Sizeof_HWRENDERDETAILS;
+ IMG_UINT32 ui32Sizeof_HWRTDATA;
+ IMG_UINT32 ui32Sizeof_HWRTDATASET;
+ IMG_UINT32 ui32Sizeof_HWTRANSFERCONTEXT;
+ IMG_UINT32 ui32Sizeof_HOST_CTL;
+ IMG_UINT32 ui32Sizeof_COMMAND;
+} SGX_MISCINFO_STRUCT_SIZES;
+
+
+#if defined(SUPPORT_SGX_EDM_MEMORY_DEBUG)
+typedef struct _PVRSRV_SGX_MISCINFO_MEMREAD
+{
+ IMG_DEV_VIRTADDR sDevVAddr;
+ IMG_DEV_PHYADDR sPDDevPAddr;
+} PVRSRV_SGX_MISCINFO_MEMREAD;
+#endif
+
+typedef struct _PVRSRV_SGX_MISCINFO_INFO
+{
+ IMG_UINT32 ui32MiscInfoFlags;
+ PVRSRV_SGX_MISCINFO_FEATURES sSGXFeatures;
+#if defined(SUPPORT_SGX_EDM_MEMORY_DEBUG)
+ PVRSRV_SGX_MISCINFO_MEMREAD sSGXMemReadData;
+#endif
+} PVRSRV_SGX_MISCINFO_INFO;
+
+#ifdef PVRSRV_USSE_EDM_STATUS_DEBUG
+#define SGXMK_TRACE_BUFFER_SIZE 512
+#endif
+
+#define SGXMKIF_HWPERF_CB_SIZE 0x100
+
+#if defined(SUPPORT_SGX_HWPERF)
+typedef struct _SGXMKIF_HWPERF_CB_ENTRY_
+{
+ IMG_UINT32 ui32FrameNo;
+ IMG_UINT32 ui32Type;
+ IMG_UINT32 ui32Ordinal;
+ IMG_UINT32 ui32TimeWraps;
+ IMG_UINT32 ui32Time;
+ IMG_UINT32 ui32Counters[PVRSRV_SGX_HWPERF_NUM_COUNTERS];
+} SGXMKIF_HWPERF_CB_ENTRY;
+
+typedef struct _SGXMKIF_HWPERF_CB_
+{
+ IMG_UINT32 ui32Woff;
+ IMG_UINT32 ui32Roff;
+ IMG_UINT32 ui32OrdinalGRAPHICS;
+ IMG_UINT32 ui32OrdinalMK_EXECUTION;
+ SGXMKIF_HWPERF_CB_ENTRY psHWPerfCBData[SGXMKIF_HWPERF_CB_SIZE];
+} SGXMKIF_HWPERF_CB;
+#endif
+
+
+#endif
+
#include "servicesint.h"
#include "services.h"
#include "sgxapi_km.h"
+#include "sgx_mkif_km.h"
-#if defined(NO_HARDWARE) && defined(SUPPORT_HW_RECOVERY)
- #error "sgxinfo.h: NO_HARDWARE and SUPPORT_HW_RECOVERY cannot be defined together"
-#endif
-
-#if defined(SGX_FEATURE_MP)
- #define SGX_REG_BANK_SHIFT (12)
- #define SGX_REG_BANK_SIZE (0x4000)
- #define SGX_REG_BANK_BASE_INDEX (1)
- #define SGX_MP_CORE_SELECT(x,i) (x + ((i + SGX_REG_BANK_BASE_INDEX) * SGX_REG_BANK_SIZE))
- #define SGX_MP_MASTER_SELECT(x) (x + ((SGX_REG_BANK_BASE_INDEX + SGX_FEATURE_MP_CORE_COUNT) * SGX_REG_BANK_SIZE))
-#else
- #define SGX_MP_CORE_SELECT(x,i) (x)
-#endif
#define SGX_MAX_DEV_DATA 24
#define SGX_MAX_INIT_MEM_HANDLES 16
-#if defined(SGX_FEATURE_BIF_NUM_DIRLISTS)
-#define SGX_BIF_DIR_LIST_INDEX_EDM (SGX_FEATURE_BIF_NUM_DIRLISTS - 1)
-#else
-#define SGX_BIF_DIR_LIST_INDEX_EDM (0)
-#endif
typedef struct _SGX_BRIDGE_INFO_FOR_SRVINIT
{
PVRSRV_HEAP_INFO asHeapInfo[PVRSRV_MAX_CLIENT_HEAPS];
} SGX_BRIDGE_INFO_FOR_SRVINIT;
-typedef struct _SGX_BRIDGE_INIT_INFO_ {
+
+typedef enum _SGXMKIF_CMD_TYPE_
+{
+ SGXMKIF_CMD_TA = 0,
+ SGXMKIF_CMD_TRANSFER = 1,
+ SGXMKIF_CMD_2D = 2,
+ SGXMKIF_CMD_POWER = 3,
+ SGXMKIF_CMD_CLEANUP = 4,
+ SGXMKIF_CMD_GETMISCINFO = 5,
+ SGXMKIF_CMD_PROCESS_QUEUES = 6,
+ SGXMKIF_CMD_MAX = 7,
+
+ SGXMKIF_CMD_FORCE_I32 = -1,
+
+} SGXMKIF_CMD_TYPE;
+
+
+typedef struct _SGX_BRIDGE_INIT_INFO_
+{
IMG_HANDLE hKernelCCBMemInfo;
IMG_HANDLE hKernelCCBCtlMemInfo;
IMG_HANDLE hKernelCCBEventKickerMemInfo;
} SGX_BRIDGE_INIT_INFO;
-typedef struct _SGXMKIF_COMMAND_
-{
- IMG_UINT32 ui32ServiceAddress;
- IMG_UINT32 ui32Data[3];
-} SGXMKIF_COMMAND;
-
-
-typedef struct _PVRSRV_SGX_KERNEL_CCB_
-{
- SGXMKIF_COMMAND asCommands[256];
-} PVRSRV_SGX_KERNEL_CCB;
-
-
-typedef struct _PVRSRV_SGX_CCB_CTL_
-{
- IMG_UINT32 ui32WriteOffset;
- IMG_UINT32 ui32ReadOffset;
-} PVRSRV_SGX_CCB_CTL;
-
-
-#define SGX_AUXCCBFLAGS_SHARED 0x00000001
-
-typedef enum _SGXMKIF_COMMAND_TYPE_
-{
- SGXMKIF_COMMAND_EDM_KICK = 0,
- SGXMKIF_COMMAND_VIDEO_KICK = 1,
- SGXMKIF_COMMAND_REQUEST_SGXMISCINFO = 2,
-
- SGXMKIF_COMMAND_FORCE_I32 = -1,
-
-}SGXMKIF_COMMAND_TYPE;
-
-#define PVRSRV_CCBFLAGS_RASTERCMD 0x1
-#define PVRSRV_CCBFLAGS_TRANSFERCMD 0x2
-#define PVRSRV_CCBFLAGS_PROCESS_QUEUESCMD 0x3
-#if defined(SGX_FEATURE_2D_HARDWARE)
-#define PVRSRV_CCBFLAGS_2DCMD 0x4
-#endif
-#define PVRSRV_CCBFLAGS_POWERCMD 0x5
-
-#define PVRSRV_POWERCMD_POWEROFF 0x1
-#define PVRSRV_POWERCMD_IDLE 0x2
-
-#define SGX_BIF_INVALIDATE_PTCACHE 0x1
-#define SGX_BIF_INVALIDATE_PDCACHE 0x2
-
-typedef struct _SGXMKIF_HWDEVICE_SYNC_LIST_
-{
- IMG_DEV_VIRTADDR sAccessDevAddr;
- IMG_UINT32 ui32NumSyncObjects;
-
- PVRSRV_DEVICE_SYNC_OBJECT asSyncData[1];
-} SGXMKIF_HWDEVICE_SYNC_LIST, *PSGXMKIF_HWDEVICE_SYNC_LIST;
typedef struct _SGX_DEVICE_SYNC_LIST_
{
IMG_UINT32 ui32CCBOffset;
+#if defined(SUPPORT_SGX_GENERALISED_SYNCOBJECTS)
+
+ IMG_UINT32 ui32NumTASrcSyncs;
+ IMG_HANDLE ahTASrcKernelSyncInfo[SGX_MAX_TA_SRC_SYNCS];
+ IMG_UINT32 ui32NumTADstSyncs;
+ IMG_HANDLE ahTADstKernelSyncInfo[SGX_MAX_TA_DST_SYNCS];
+ IMG_UINT32 ui32Num3DSrcSyncs;
+ IMG_HANDLE ah3DSrcKernelSyncInfo[SGX_MAX_3D_SRC_SYNCS];
+#else
IMG_UINT32 ui32NumSrcSyncs;
IMG_HANDLE ahSrcKernelSyncInfo[SGX_MAX_SRC_SYNCS];
+#endif
IMG_BOOL bTADependency;
#define SGX_KERNEL_USE_CODE_BASE_INDEX 15
-typedef struct _SGXMKIF_HOST_CTL_
-{
-
- volatile IMG_UINT32 ui32PowerStatus;
-#if defined(SUPPORT_HW_RECOVERY)
- IMG_UINT32 ui32uKernelDetectedLockups;
- IMG_UINT32 ui32HostDetectedLockups;
- IMG_UINT32 ui32HWRecoverySampleRate;
-#endif
- IMG_UINT32 ui32ActivePowManSampleRate;
- IMG_UINT32 ui32InterruptFlags;
- IMG_UINT32 ui32InterruptClearFlags;
-
- IMG_UINT32 ui32ResManFlags;
- IMG_DEV_VIRTADDR sResManCleanupData;
-
- IMG_UINT32 ui32NumActivePowerEvents;
-
-#if defined(SUPPORT_SGX_HWPERF)
- IMG_UINT32 ui32HWPerfFlags;
-#endif
-
-#if defined(PVRSRV_USSE_EDM_STATUS_DEBUG)
- IMG_DEV_VIRTADDR sEDMStatusBuffer;
-#endif
-
-
- IMG_UINT32 ui32TimeWraps;
-} SGXMKIF_HOST_CTL;
-
typedef struct _SGX_CLIENT_INFO_
{
#if defined(TRANSFER_QUEUE)
-#define SGXTQ_MAX_STATUS SGX_MAX_TRANSFER_STATUS_VALS + 2
-
-#define SGXMKIF_TQFLAGS_NOSYNCUPDATE 0x00000001
-#define SGXMKIF_TQFLAGS_KEEPPENDING 0x00000002
-#define SGXMKIF_TQFLAGS_TATQ_SYNC 0x00000004
-#define SGXMKIF_TQFLAGS_3DTQ_SYNC 0x00000008
-#if defined(SGX_FEATURE_FAST_RENDER_CONTEXT_SWITCH)
-#define SGXMKIF_TQFLAGS_CTXSWITCH 0x00000010
-#endif
-#define SGXMKIF_TQFLAGS_DUMMYTRANSFER 0x00000020
-
-typedef struct _SGXMKIF_CMDTA_SHARED_
-{
- IMG_UINT32 ui32NumTAStatusVals;
- IMG_UINT32 ui32Num3DStatusVals;
-
-
- IMG_UINT32 ui32TATQSyncWriteOpsPendingVal;
- IMG_DEV_VIRTADDR sTATQSyncWriteOpsCompleteDevVAddr;
- IMG_UINT32 ui32TATQSyncReadOpsPendingVal;
- IMG_DEV_VIRTADDR sTATQSyncReadOpsCompleteDevVAddr;
-
-
- IMG_UINT32 ui323DTQSyncWriteOpsPendingVal;
- IMG_DEV_VIRTADDR s3DTQSyncWriteOpsCompleteDevVAddr;
- IMG_UINT32 ui323DTQSyncReadOpsPendingVal;
- IMG_DEV_VIRTADDR s3DTQSyncReadOpsCompleteDevVAddr;
-
-
- IMG_UINT32 ui32NumSrcSyncs;
- PVRSRV_DEVICE_SYNC_OBJECT asSrcSyncs[SGX_MAX_SRC_SYNCS];
-
- CTL_STATUS sCtlTAStatusInfo[SGX_MAX_TA_STATUS_VALS];
- CTL_STATUS sCtl3DStatusInfo[SGX_MAX_3D_STATUS_VALS];
-
- PVRSRV_DEVICE_SYNC_OBJECT sTA3DDependency;
-
-} SGXMKIF_CMDTA_SHARED;
-
-typedef struct _SGXMKIF_TRANSFERCMD_SHARED_
-{
-
-
- IMG_UINT32 ui32SrcReadOpPendingVal;
- IMG_DEV_VIRTADDR sSrcReadOpsCompleteDevAddr;
-
- IMG_UINT32 ui32SrcWriteOpPendingVal;
- IMG_DEV_VIRTADDR sSrcWriteOpsCompleteDevAddr;
-
-
-
- IMG_UINT32 ui32DstReadOpPendingVal;
- IMG_DEV_VIRTADDR sDstReadOpsCompleteDevAddr;
-
- IMG_UINT32 ui32DstWriteOpPendingVal;
- IMG_DEV_VIRTADDR sDstWriteOpsCompleteDevAddr;
-
-
- IMG_UINT32 ui32TASyncWriteOpsPendingVal;
- IMG_DEV_VIRTADDR sTASyncWriteOpsCompleteDevVAddr;
- IMG_UINT32 ui32TASyncReadOpsPendingVal;
- IMG_DEV_VIRTADDR sTASyncReadOpsCompleteDevVAddr;
-
-
- IMG_UINT32 ui323DSyncWriteOpsPendingVal;
- IMG_DEV_VIRTADDR s3DSyncWriteOpsCompleteDevVAddr;
- IMG_UINT32 ui323DSyncReadOpsPendingVal;
- IMG_DEV_VIRTADDR s3DSyncReadOpsCompleteDevVAddr;
-
- IMG_UINT32 ui32NumStatusVals;
- CTL_STATUS sCtlStatusInfo[SGXTQ_MAX_STATUS];
-} SGXMKIF_TRANSFERCMD_SHARED, *PSGXMKIF_TRANSFERCMD_SHARED;
-
typedef struct _PVRSRV_TRANSFER_SGX_KICK_
{
IMG_HANDLE hCCBMemInfo;
} PVRSRV_TRANSFER_SGX_KICK, *PPVRSRV_TRANSFER_SGX_KICK;
#if defined(SGX_FEATURE_2D_HARDWARE)
-typedef struct _SGXMKIF_2DCMD_SHARED_ {
-
- IMG_UINT32 ui32NumSrcSync;
- PVRSRV_DEVICE_SYNC_OBJECT sSrcSyncData[SGX_MAX_2D_SRC_SYNC_OPS];
-
-
- PVRSRV_DEVICE_SYNC_OBJECT sDstSyncData;
-
-
- PVRSRV_DEVICE_SYNC_OBJECT sTASyncData;
-
-
- PVRSRV_DEVICE_SYNC_OBJECT s3DSyncData;
-} SGXMKIF_2DCMD_SHARED, *PSGXMKIF_2DCMD_SHARED;
-
typedef struct _PVRSRV_2D_SGX_KICK_
{
IMG_HANDLE hCCBMemInfo;
} PVRSRV_SGXDEV_DIFF_INFO, *PPVRSRV_SGXDEV_DIFF_INFO;
-#define SGXMKIF_HWPERF_CB_SIZE 0x100
-
-#if defined(SUPPORT_SGX_HWPERF)
-typedef struct _SGXMKIF_HWPERF_CB_ENTRY_
-{
- IMG_UINT32 ui32FrameNo;
- IMG_UINT32 ui32Type;
- IMG_UINT32 ui32Ordinal;
- IMG_UINT32 ui32TimeWraps;
- IMG_UINT32 ui32Time;
- IMG_UINT32 ui32Counters[PVRSRV_SGX_HWPERF_NUM_COUNTERS];
-} SGXMKIF_HWPERF_CB_ENTRY;
-
-typedef struct _SGXMKIF_HWPERF_CB_
-{
- IMG_UINT32 ui32Woff;
- IMG_UINT32 ui32Roff;
- IMG_UINT32 ui32OrdinalGRAPHICS;
- IMG_UINT32 ui32OrdinalMK_EXECUTION;
- SGXMKIF_HWPERF_CB_ENTRY psHWPerfCBData[SGXMKIF_HWPERF_CB_SIZE];
-} SGXMKIF_HWPERF_CB;
-#endif
-
-typedef struct _PVRSRV_SGX_MISCINFO_INFO
-{
- IMG_UINT32 ui32MiscInfoFlags;
- PVRSRV_SGX_MISCINFO_FEATURES sSGXFeatures;
-} PVRSRV_SGX_MISCINFO_INFO;
#endif
git.openpandora.org / sgx.git / commitdiff