1 /**********************************************************************
3 * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful but, except
10 * as otherwise stated in writing, without any warranty; without even the
11 * implied warranty of merchantability or fitness for a particular purpose.
12 * See the GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * Imagination Technologies Ltd. <gpl-support@imgtec.com>
23 * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
25 ******************************************************************************/
27 #include <linux/version.h>
28 #include <linux/clk.h>
29 #include <linux/err.h>
30 #include <linux/hardirq.h>
31 #include <plat/omap-pm.h>
32 #include <linux/bug.h>
33 #include <plat/clock.h>
36 #include "services_headers.h"
38 #include "sgxapi_km.h"
39 #include "sysconfig.h"
40 #include "sgxinfokm.h"
44 #include "pvr_bridge_km.h"
46 #define HZ_TO_MHZ(m) ((m) / 1000000)
48 static inline unsigned long scale_by_rate(unsigned long val,
53 return val * (rate1 / rate2);
55 return val / (rate2 / rate1);
58 static inline unsigned long scale_prop_to_SGX_clock(unsigned long val,
61 return scale_by_rate(val, rate, sgx_get_max_freq());
64 void SysGetSGXTimingInformation(struct SGX_TIMING_INFORMATION *psTimingInfo)
68 #if defined(NO_HARDWARE)
69 rate = SYS_SGX_MAX_FREQ_NO_HW;
71 rate = clk_get_rate(gpsSysSpecificData->psSGX_FCK);
72 PVR_ASSERT(rate != 0);
74 psTimingInfo->ui32CoreClockSpeed = rate;
75 psTimingInfo->ui32HWRecoveryFreq =
76 scale_prop_to_SGX_clock(SYS_SGX_HWRECOVERY_TIMEOUT_FREQ, rate);
77 psTimingInfo->ui32uKernelFreq =
78 scale_prop_to_SGX_clock(SYS_SGX_PDS_TIMER_FREQ, rate);
79 psTimingInfo->ui32ActivePowManLatencyms =
80 SYS_SGX_ACTIVE_POWER_LATENCY_MS;
84 static int vdd2_post_func(struct notifier_block *n, unsigned long event,
87 PVR_UNREFERENCED_PARAMETER(n);
88 PVR_UNREFERENCED_PARAMETER(event);
89 PVR_UNREFERENCED_PARAMETER(ptr);
91 if (atomic_read(&gpsSysSpecificData->sSGXClocksEnabled) != 0 &&
92 gpsSysSpecificData->bSGXInitComplete) {
93 #if defined(CONFIG_PVR_DEBUG_EXTRA)
96 rate = clk_get_rate(gpsSysSpecificData->psSGX_FCK);
98 PVR_ASSERT(rate != 0);
100 PVR_TRACE("%s: SGX clock rate: %dMHz", __func__,
103 PVRSRVDevicePostClockSpeedChange(gpsSysSpecificData->
104 psSGXDevNode->sDevId.
105 ui32DeviceIndex, IMG_TRUE,
111 static int vdd2_pre_func(struct notifier_block *n, unsigned long event,
114 PVR_UNREFERENCED_PARAMETER(n);
115 PVR_UNREFERENCED_PARAMETER(event);
116 PVR_UNREFERENCED_PARAMETER(ptr);
118 if (atomic_read(&gpsSysSpecificData->sSGXClocksEnabled) != 0 &&
119 gpsSysSpecificData->bSGXInitComplete) {
120 BUG_ON(gpsSysData->eCurrentPowerState > PVRSRV_POWER_STATE_D1);
121 PVRSRVDevicePreClockSpeedChange(gpsSysSpecificData->
122 psSGXDevNode->sDevId.
123 ui32DeviceIndex, IMG_TRUE,
130 static int vdd2_pre_post_func(struct notifier_block *n, unsigned long event,
133 struct clk_notifier_data *cnd;
135 PVR_UNREFERENCED_PARAMETER(n);
137 cnd = (struct clk_notifier_data *)ptr;
139 PVR_TRACE("vdd2_pre_post_func: %s clock rate = %lu",
140 (CLK_PRE_RATE_CHANGE == event) ? "old" :
141 (CLK_POST_RATE_CHANGE == event) ? "new" :
145 if (CLK_PRE_RATE_CHANGE == event) {
147 PVR_TRACE("vdd2_pre_post_func: CLK_PRE_RATE_CHANGE event");
148 vdd2_pre_func(n, event, ptr);
149 } else if (CLK_POST_RATE_CHANGE == event) {
150 PVR_TRACE("vdd2_pre_post_func: CLK_POST_RATE_CHANGE event");
151 vdd2_post_func(n, event, ptr);
153 } else if (CLK_ABORT_RATE_CHANGE == event) {
154 PVR_TRACE("vdd2_pre_post_func: CLK_ABORT_RATE_CHANGE event");
157 printk(KERN_ERR "vdd2_pre_post_func: unexpected event (%lu)\n",
159 PVR_DPF(PVR_DBG_ERROR,
160 "vdd2_pre_post_func: unexpected event (%lu)", event);
162 PVR_TRACE("vdd2_pre_post_func end.");
166 static struct notifier_block vdd2_pre_post = {
171 static void RegisterConstraintNotifications(struct SYS_SPECIFIC_DATA
174 PVR_TRACE("Registering constraint notifications");
176 clk_notifier_register(psSysSpecData->psSGX_FCK, &vdd2_pre_post);
177 PVR_TRACE("VDD2 constraint notifications registered");
180 static void UnRegisterConstraintNotifications(struct SYS_SPECIFIC_DATA
183 PVR_TRACE("Unregistering constraint notifications");
185 clk_notifier_unregister(psSysSpecData->psSGX_FCK, &vdd2_pre_post);
188 #define RegisterConstraintNotifications(x)
189 #define UnRegisterConstraintNotifications(x)
192 static struct device sgx_dev;
193 static int sgx_clock_enabled;
195 /* return value: current sgx load
199 static unsigned int sgx_current_load(void)
201 enum PVRSRV_ERROR eError;
202 struct SYS_DATA *psSysData;
203 struct SYS_SPECIFIC_DATA *psSysSpecData;
204 struct PVRSRV_DEVICE_NODE *psDeviceNode;
205 static unsigned int kicks_prev;
206 static long time_prev;
208 eError = SysAcquireData(&psSysData);
209 if (eError != PVRSRV_OK)
212 (struct SYS_SPECIFIC_DATA *)psSysData->pvSysSpecificData;
213 if (!psSysSpecData ||
214 atomic_read(&psSysSpecData->sSGXClocksEnabled) == 0)
216 psDeviceNode = psSysData->psDeviceNodeList;
217 while (psDeviceNode) {
218 if ((psDeviceNode->sDevId.eDeviceType ==
219 PVRSRV_DEVICE_TYPE_SGX) &&
220 psDeviceNode->pvDevice) {
221 struct PVRSRV_SGXDEV_INFO *psDevInfo =
222 (struct PVRSRV_SGXDEV_INFO *)psDeviceNode->pvDevice;
223 unsigned int kicks = psDevInfo->ui32KickTACounter;
227 time_elapsed = jiffies - time_prev;
228 if (likely(time_elapsed))
230 1000 * (kicks - kicks_prev) / time_elapsed;
234 time_prev += time_elapsed;
236 * if the period between calls to this function was
237 * too long, then load stats are invalid
239 if (time_elapsed > 5 * HZ)
241 /*pr_err("SGX load %u\n", load); */
244 * 'load' shows how many times sgx was kicked
246 * 150 is arbitrarily chosen threshold.
247 * If the number of kicks is below threshold
249 * some small jobs and we can keep the clock freq low.
256 psDeviceNode = psDeviceNode->psNext;
261 static void sgx_lock_perf(struct work_struct *work)
267 struct delayed_work *d_work =
268 container_of(work, struct delayed_work, work);
269 struct ENV_DATA *psEnvData =
270 container_of(d_work, struct ENV_DATA, sPerfWork);
274 if (pvr_is_disabled()) {
279 load = sgx_current_load();
294 omap_pm_set_min_bus_tput(&sgx_dev, OCP_INITIATOR_AGENT, vdd2);
301 if (sgx_clock_enabled || load)
302 queue_delayed_work(psEnvData->psPerfWorkqueue,
303 &psEnvData->sPerfWork, HZ / 5);
306 static void sgx_need_perf(struct SYS_DATA *psSysData, int ena)
308 struct ENV_DATA *psEnvData =
309 (struct ENV_DATA *)psSysData->pvEnvSpecificData;
311 sgx_clock_enabled = ena;
312 cancel_delayed_work(&psEnvData->sPerfWork);
313 queue_delayed_work(psEnvData->psPerfWorkqueue, &psEnvData->sPerfWork,
317 enum PVRSRV_ERROR OSInitPerf(void *pvSysData)
319 struct SYS_DATA *psSysData = (struct SYS_DATA *)pvSysData;
320 struct ENV_DATA *psEnvData =
321 (struct ENV_DATA *)psSysData->pvEnvSpecificData;
323 if (psEnvData->psPerfWorkqueue) {
324 PVR_DPF(PVR_DBG_ERROR, "OSInitPerf: already inited");
325 return PVRSRV_ERROR_GENERIC;
328 PVR_TRACE("Initing DVFS %x", pvSysData);
330 psEnvData->psPerfWorkqueue = create_singlethread_workqueue("sgx_perf");
331 INIT_DELAYED_WORK(&psEnvData->sPerfWork, sgx_lock_perf);
336 enum PVRSRV_ERROR OSCleanupPerf(void *pvSysData)
338 struct SYS_DATA *psSysData = (struct SYS_DATA *)pvSysData;
339 struct ENV_DATA *psEnvData =
340 (struct ENV_DATA *)psSysData->pvEnvSpecificData;
342 if (!psEnvData->psPerfWorkqueue) {
343 PVR_DPF(PVR_DBG_ERROR, "OSCleanupPerf: not inited");
344 return PVRSRV_ERROR_GENERIC;
347 PVR_TRACE("Cleaning up DVFS");
349 sgx_clock_enabled = 0;
350 flush_workqueue(psEnvData->psPerfWorkqueue);
351 destroy_workqueue(psEnvData->psPerfWorkqueue);
356 static inline void setup_int_bypass(void)
358 if (cpu_is_omap3630())
359 sgx_ocp_write_reg(EUR_CR_OCP_DEBUG_CONFIG,
360 EUR_CR_OCP_DEBUG_CONFIG_THALIA_INT_BYPASS_MASK);
365 static enum PVRSRV_ERROR sgx_force_enable_clocks(struct SYS_DATA *psSysData)
367 struct SYS_SPECIFIC_DATA *psSysSpecData =
368 (struct SYS_SPECIFIC_DATA *)psSysData->pvSysSpecificData;
371 res = clk_enable(psSysSpecData->psSGX_FCK);
373 PVR_DPF(PVR_DBG_ERROR, "%s: "
374 "Couldn't enable SGX functional clock (%d)",
376 return PVRSRV_ERROR_GENERIC;
379 res = clk_enable(psSysSpecData->psSGX_ICK);
381 PVR_DPF(PVR_DBG_ERROR, "%s: "
382 "Couldn't enable SGX interface clock (%d)",
385 clk_disable(psSysSpecData->psSGX_FCK);
386 return PVRSRV_ERROR_GENERIC;
394 static void sgx_force_disable_clocks(struct SYS_DATA *psSysData)
396 struct SYS_SPECIFIC_DATA *psSysSpecData =
397 (struct SYS_SPECIFIC_DATA *)psSysData->pvSysSpecificData;
399 if (psSysSpecData->psSGX_ICK)
400 clk_disable(psSysSpecData->psSGX_ICK);
402 if (psSysSpecData->psSGX_FCK)
403 clk_disable(psSysSpecData->psSGX_FCK);
406 #else /* NO_HARDWARE */
408 static enum PVRSRV_ERROR sgx_force_enable_clocks(struct SYS_DATA *psSYsData)
413 static void sgx_force_disable_clocks(struct SYS_DATA *psSYsData)
417 #endif /* NO_HARDWARE */
419 static bool force_clocks_on(void)
421 #ifdef CONFIG_PVR_FORCE_CLOCKS_ON
428 enum PVRSRV_ERROR EnableSGXClocks(struct SYS_DATA *psSysData)
430 struct SYS_SPECIFIC_DATA *psSysSpecData =
431 (struct SYS_SPECIFIC_DATA *)psSysData->pvSysSpecificData;
432 enum PVRSRV_ERROR res = PVRSRV_OK;
434 if (atomic_xchg(&psSysSpecData->sSGXClocksEnabled, 1))
438 * In case of force clocks on we have already enabled the clocks
441 if (!force_clocks_on())
442 res = sgx_force_enable_clocks(psSysData);
444 if (res == PVRSRV_OK) {
445 BUG_ON(!atomic_read(&psSysSpecData->sSGXClocksEnabled));
446 sgx_need_perf(psSysData, 1);
448 atomic_set(&psSysSpecData->sSGXClocksEnabled, 0);
454 void DisableSGXClocks(struct SYS_DATA *psSysData)
456 struct SYS_SPECIFIC_DATA *psSysSpecData =
457 (struct SYS_SPECIFIC_DATA *)psSysData->pvSysSpecificData;
459 if (!atomic_xchg(&psSysSpecData->sSGXClocksEnabled, 0))
462 if (!force_clocks_on())
463 sgx_force_disable_clocks(psSysData);
465 BUG_ON(atomic_read(&psSysSpecData->sSGXClocksEnabled));
467 sgx_need_perf(psSysData, 0);
470 static enum PVRSRV_ERROR InitSgxClocks(struct SYS_DATA *psSysData)
472 struct SYS_SPECIFIC_DATA *psSysSpecData = psSysData->pvSysSpecificData;
474 struct clk *core_ck = NULL;
478 psCLK = clk_get(NULL, "sgx_fck");
481 psSysSpecData->psSGX_FCK = psCLK;
483 psCLK = clk_get(NULL, "sgx_ick");
486 psSysSpecData->psSGX_ICK = psCLK;
488 core_ck = clk_get(NULL, "core_ck");
491 if (clk_set_parent(psSysSpecData->psSGX_FCK, core_ck) < 0) {
497 /* +1 to account for rounding errors */
498 rate = clk_round_rate(psSysSpecData->psSGX_FCK, sgx_get_max_freq() + 1);
499 r = clk_set_rate(psSysSpecData->psSGX_FCK, rate);
501 unsigned long current_rate;
503 current_rate = clk_get_rate(psSysSpecData->psSGX_FCK);
504 pr_warning("error %d when setting SGX fclk to %lu Hz, "
505 "falling back to %lu Hz\n", r, rate, current_rate);
507 pr_info("SGX clock rate %lu MHz\n", rate / 1000000);
510 RegisterConstraintNotifications(psSysSpecData);
514 clk_put(psSysSpecData->psSGX_ICK);
516 clk_put(psSysSpecData->psSGX_FCK);
518 PVR_DPF(PVR_DBG_ERROR,
519 "%s: couldn't init clocks fck %p ick %p core %p", __func__,
520 psSysSpecData->psSGX_FCK, psSysSpecData->psSGX_ICK, core_ck);
521 psSysSpecData->psSGX_FCK = NULL;
522 psSysSpecData->psSGX_ICK = NULL;
524 return PVRSRV_ERROR_GENERIC;
527 static void CleanupSgxClocks(struct SYS_DATA *psSysData)
529 struct SYS_SPECIFIC_DATA *psSysSpecData = psSysData->pvSysSpecificData;
530 UnRegisterConstraintNotifications(psSysSpecData);
532 if (psSysSpecData->psSGX_ICK) {
533 clk_put(psSysSpecData->psSGX_ICK);
534 psSysSpecData->psSGX_ICK = NULL;
537 if (psSysSpecData->psSGX_FCK) {
538 clk_put(psSysSpecData->psSGX_FCK);
539 psSysSpecData->psSGX_FCK = NULL;
543 #if defined(CONFIG_PVR_DEBUG_EXTRA) || defined(TIMING)
544 static inline u32 gpt_read_reg(struct SYS_DATA *psSysData, u32 reg)
546 struct SYS_SPECIFIC_DATA *psSysSpecData = psSysData->pvSysSpecificData;
548 return __raw_readl(psSysSpecData->gpt_base + reg);
551 static inline void gpt_write_reg(struct SYS_DATA *psSysData, u32 reg, u32 val)
553 struct SYS_SPECIFIC_DATA *psSysSpecData = psSysData->pvSysSpecificData;
555 __raw_writel(val, psSysSpecData->gpt_base + reg);
558 static enum PVRSRV_ERROR InitDebugClocks(struct SYS_DATA *psSysData)
560 struct SYS_SPECIFIC_DATA *psSysSpecData = psSysData->pvSysSpecificData;
562 struct clk *sys_ck = NULL;
565 psCLK = clk_get(NULL, "mpu_ck");
568 psSysSpecData->psMPU_CK = psCLK;
570 psCLK = clk_get(NULL, "gpt11_fck");
573 psSysSpecData->psGPT11_FCK = psCLK;
575 psCLK = clk_get(NULL, "gpt11_ick");
578 psSysSpecData->psGPT11_ICK = psCLK;
580 sys_ck = clk_get(NULL, "sys_ck");
583 if (clk_get_parent(psSysSpecData->psGPT11_FCK) != sys_ck)
584 if (clk_set_parent(psSysSpecData->psGPT11_FCK, sys_ck) < 0) {
590 PVR_TRACE("GPTIMER11 clock is %dMHz",
591 HZ_TO_MHZ(clk_get_rate(psSysSpecData->psGPT11_FCK)));
593 psSysSpecData->gpt_base = ioremap(SYS_OMAP3430_GP11TIMER_PHYS_BASE,
594 SYS_OMAP3430_GPTIMER_SIZE);
595 if (!psSysSpecData->gpt_base)
598 clk_enable(psSysSpecData->psGPT11_ICK);
599 clk_enable(psSysSpecData->psGPT11_FCK);
601 rate = gpt_read_reg(psSysData, SYS_OMAP3430_GPTIMER_TSICR);
603 PVR_TRACE("Setting GPTIMER11 mode to posted "
604 "(currently is non-posted)");
605 gpt_write_reg(psSysData, SYS_OMAP3430_GPTIMER_TSICR, rate | 4);
608 clk_disable(psSysSpecData->psGPT11_FCK);
609 clk_disable(psSysSpecData->psGPT11_ICK);
614 clk_put(psSysSpecData->psGPT11_ICK);
616 clk_put(psSysSpecData->psGPT11_FCK);
618 clk_put(psSysSpecData->psMPU_CK);
620 PVR_DPF(PVR_DBG_ERROR,
621 "%s: couldn't init clocks: mpu %p sys %p fck %p ick %p",
622 __func__, psSysSpecData->psMPU_CK, sys_ck,
623 psSysSpecData->psGPT11_FCK, psSysSpecData->psGPT11_ICK);
625 psSysSpecData->psMPU_CK = NULL;
626 psSysSpecData->psGPT11_FCK = NULL;
627 psSysSpecData->psGPT11_ICK = NULL;
629 return PVRSRV_ERROR_GENERIC;
632 static void CleanupDebugClocks(struct SYS_DATA *psSysData)
634 struct SYS_SPECIFIC_DATA *psSysSpecData = psSysData->pvSysSpecificData;
636 if (psSysSpecData->psMPU_CK) {
637 clk_put(psSysSpecData->psMPU_CK);
638 psSysSpecData->psMPU_CK = NULL;
640 if (psSysSpecData->psGPT11_FCK) {
641 clk_put(psSysSpecData->psGPT11_FCK);
642 psSysSpecData->psGPT11_FCK = NULL;
644 if (psSysSpecData->psGPT11_ICK) {
645 clk_put(psSysSpecData->psGPT11_ICK);
646 psSysSpecData->psGPT11_ICK = NULL;
650 static enum PVRSRV_ERROR EnableDebugClocks(struct SYS_DATA *psSysData)
652 struct SYS_SPECIFIC_DATA *psSysSpecData = psSysData->pvSysSpecificData;
654 if (clk_enable(psSysSpecData->psGPT11_FCK) < 0)
657 if (clk_enable(psSysSpecData->psGPT11_ICK) < 0)
660 gpt_write_reg(psSysData, SYS_OMAP3430_GPTIMER_ENABLE, 3);
665 clk_disable(psSysSpecData->psGPT11_FCK);
667 PVR_DPF(PVR_DBG_ERROR, "%s: can't enable clocks", __func__);
669 return PVRSRV_ERROR_GENERIC;
672 static inline void DisableDebugClocks(struct SYS_DATA *psSysData)
674 struct SYS_SPECIFIC_DATA *psSysSpecData = psSysData->pvSysSpecificData;
676 gpt_write_reg(psSysData, SYS_OMAP3430_GPTIMER_ENABLE, 0);
678 clk_disable(psSysSpecData->psGPT11_ICK);
679 clk_disable(psSysSpecData->psGPT11_FCK);
684 inline enum PVRSRV_ERROR InitDebugClocks(struct SYS_DATA *psSysData)
689 static inline void CleanupDebugClocks(struct SYS_DATA *psSysData)
693 static inline enum PVRSRV_ERROR EnableDebugClocks(struct SYS_DATA *psSysData)
698 static inline void DisableDebugClocks(struct SYS_DATA *psSysData)
703 enum PVRSRV_ERROR InitSystemClocks(struct SYS_DATA *psSysData)
705 if (InitSgxClocks(psSysData) != PVRSRV_OK)
708 if (InitDebugClocks(psSysData) != PVRSRV_OK)
714 CleanupSgxClocks(psSysData);
716 return PVRSRV_ERROR_GENERIC;
719 void CleanupSystemClocks(struct SYS_DATA *psSysData)
721 CleanupDebugClocks(psSysData);
722 CleanupSgxClocks(psSysData);
725 enum PVRSRV_ERROR EnableSystemClocks(struct SYS_DATA *psSysData)
727 PVR_TRACE("EnableSystemClocks: Enabling System Clocks");
730 * We force clocks on by increasing their refcount here during
731 * module init time and decreasing it at cleanup time.
733 if (force_clocks_on())
734 sgx_force_enable_clocks(gpsSysData);
735 if (EnableDebugClocks(psSysData) != PVRSRV_OK)
741 return PVRSRV_ERROR_GENERIC;
744 void DisableSystemClocks(struct SYS_DATA *psSysData)
746 PVR_TRACE("DisableSystemClocks: Disabling System Clocks");
748 DisableDebugClocks(psSysData);
749 /* Decrease the clocks' refcount that was increased at init time. */
750 if (force_clocks_on())
751 sgx_force_disable_clocks(gpsSysData);