pvr/sgxinfokm.h

   1 /**********************************************************************
   2  *
   3  * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful but, except
  10  * as otherwise stated in writing, without any warranty; without even the
  11  * implied warranty of merchantability or fitness for a particular purpose.
  12  * See the GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  17  *
  18  * The full GNU General Public License is included in this distribution in
  19  * the file called "COPYING".
  20  *
  21  * Contact Information:
  22  * Imagination Technologies Ltd. <gpl-support@imgtec.com>
  23  * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
  24  *
  25  ******************************************************************************/
  26
  27 #ifndef __SGXINFOKM_H__
  28 #define __SGXINFOKM_H__
  29
  30 #include <linux/workqueue.h>
  31 #include "sgxdefs.h"
  32 #include "device.h"
  33 #include "sysconfig.h"
  34 #include "sgxscript.h"
  35 #include "sgxinfo.h"
  36
  37
  38 #define SGX_HOSTPORT_PRESENT                                    0x00000001UL
  39
  40 #define PVRSRV_USSE_EDM_POWMAN_IDLE_COMPLETE                    (1UL << 2)
  41 #define PVRSRV_USSE_EDM_POWMAN_POWEROFF_COMPLETE                (1UL << 3)
  42 #define PVRSRV_USSE_EDM_POWMAN_POWEROFF_RESTART_IMMEDIATE       (1UL << 4)
  43 #define PVRSRV_USSE_EDM_POWMAN_NO_WORK                          (1UL << 5)
  44
  45 #define PVRSRV_USSE_EDM_INTERRUPT_HWR                           (1UL << 0)
  46 #define PVRSRV_USSE_EDM_INTERRUPT_ACTIVE_POWER                  (1UL << 1)
  47
  48 #define PVRSRV_USSE_EDM_RESMAN_CLEANUP_RT_REQUEST               0x01UL
  49 #define PVRSRV_USSE_EDM_RESMAN_CLEANUP_RC_REQUEST               0x02UL
  50 #define PVRSRV_USSE_EDM_RESMAN_CLEANUP_TC_REQUEST               0x04UL
  51 #define PVRSRV_USSE_EDM_RESMAN_CLEANUP_2DC_REQUEST              0x08UL
  52 #define PVRSRV_USSE_EDM_RESMAN_CLEANUP_SHAREDPBDESC             0x10UL
  53 #define PVRSRV_USSE_EDM_RESMAN_CLEANUP_INVALPD                  0x20UL
  54 #define PVRSRV_USSE_EDM_RESMAN_CLEANUP_INVALPT                  0x40UL
  55 #define PVRSRV_USSE_EDM_RESMAN_CLEANUP_COMPLETE                 0x80UL
  56
  57 #define PVRSRV_USSE_MISCINFO_READY                              0x1UL
  58
  59 #define SGXMK_TRACE_BUFFER_SIZE                                 512
  60 #define SGXMK_TRACE_BUF_STR_LEN                                 80
  61
  62 struct PVRSRV_SGX_CCB_INFO;
  63
  64 struct PVRSRV_SGXDEV_INFO {
  65         enum PVRSRV_DEVICE_TYPE eDeviceType;
  66         enum PVRSRV_DEVICE_CLASS eDeviceClass;
  67
  68         u8 ui8VersionMajor;
  69         u8 ui8VersionMinor;
  70         u32 ui32CoreConfig;
  71         u32 ui32CoreFlags;
  72
  73         void __iomem *pvRegsBaseKM;
  74
  75         void *hRegMapping;
  76
  77         struct IMG_SYS_PHYADDR sRegsPhysBase;
  78
  79         u32 ui32RegSize;
  80
  81         u32 ui32CoreClockSpeed;
  82         u32 ui32uKernelTimerClock;
  83
  84         void *psStubPBDescListKM;
  85
  86         struct IMG_DEV_PHYADDR sKernelPDDevPAddr;
  87
  88         void *pvDeviceMemoryHeap;
  89         struct PVRSRV_KERNEL_MEM_INFO *psKernelCCBMemInfo;
  90         struct PVRSRV_SGX_KERNEL_CCB *psKernelCCB;
  91         struct PVRSRV_SGX_CCB_INFO *psKernelCCBInfo;
  92         struct PVRSRV_KERNEL_MEM_INFO *psKernelCCBCtlMemInfo;
  93         struct PVRSRV_SGX_CCB_CTL *psKernelCCBCtl;
  94         struct PVRSRV_KERNEL_MEM_INFO *psKernelCCBEventKickerMemInfo;
  95         u32 *pui32KernelCCBEventKicker;
  96         struct PVRSRV_KERNEL_MEM_INFO *psKernelSGXMiscMemInfo;
  97         u32 ui32HostKickAddress;
  98         u32 ui32GetMiscInfoAddress;
  99         u32 ui32KickTACounter;
 100         u32 ui32KickTARenderCounter;
 101         struct PVRSRV_KERNEL_MEM_INFO *psKernelHWPerfCBMemInfo;
 102         struct PVRSRV_SGXDEV_DIFF_INFO sDiffInfo;
 103         u32 ui32HWGroupRequested;
 104         u32 ui32HWReset;
 105
 106         /*!< Meminfo for EDM status buffer */
 107         struct PVRSRV_KERNEL_MEM_INFO *psKernelEDMStatusBufferMemInfo;
 108
 109         u32 ui32ClientRefCount;
 110
 111         u32 ui32CacheControl;
 112
 113         void *pvMMUContextList;
 114
 115         IMG_BOOL bForcePTOff;
 116
 117         u32 ui32EDMTaskReg0;
 118         u32 ui32EDMTaskReg1;
 119
 120         u32 ui32ClkGateStatusReg;
 121         u32 ui32ClkGateStatusMask;
 122         struct SGX_INIT_SCRIPTS sScripts;
 123
 124         void *hBIFResetPDOSMemHandle;
 125         struct IMG_DEV_PHYADDR sBIFResetPDDevPAddr;
 126         struct IMG_DEV_PHYADDR sBIFResetPTDevPAddr;
 127         struct IMG_DEV_PHYADDR sBIFResetPageDevPAddr;
 128         u32 *pui32BIFResetPD;
 129         u32 *pui32BIFResetPT;
 130
 131         void *hTimer;
 132         u32 ui32TimeStamp;
 133         u32 ui32NumResets;
 134
 135         unsigned long long last_idle;
 136         unsigned long long burst_start;
 137         int burst_size;
 138         int burst_cnt;
 139         int power_down_delay;
 140
 141         struct PVRSRV_KERNEL_MEM_INFO *psKernelSGXHostCtlMemInfo;
 142         struct SGXMKIF_HOST_CTL __iomem *psSGXHostCtl;
 143
 144         struct PVRSRV_KERNEL_MEM_INFO *psKernelSGXTA3DCtlMemInfo;
 145
 146         u32 ui32Flags;
 147
 148 #if defined(PDUMP)
 149         struct PVRSRV_SGX_PDUMP_CONTEXT sPDContext;
 150 #endif
 151
 152
 153         u32 asSGXDevData[SGX_MAX_DEV_DATA];
 154
 155         u32 state_buf_ofs;
 156 };
 157
 158 struct SGX_TIMING_INFORMATION {
 159         u32 ui32CoreClockSpeed;
 160         u32 ui32HWRecoveryFreq;
 161         u32 ui32ActivePowManLatencyms;
 162         u32 ui32uKernelFreq;
 163 };
 164
 165 struct SGX_DEVICE_MAP {
 166         u32 ui32Flags;
 167
 168         struct IMG_SYS_PHYADDR sRegsSysPBase;
 169         struct IMG_CPU_PHYADDR sRegsCpuPBase;
 170         void __iomem *pvRegsCpuVBase;
 171         u32 ui32RegsSize;
 172
 173         struct IMG_SYS_PHYADDR sLocalMemSysPBase;
 174         struct IMG_DEV_PHYADDR sLocalMemDevPBase;
 175         struct IMG_CPU_PHYADDR sLocalMemCpuPBase;
 176         u32 ui32LocalMemSize;
 177
 178         u32 ui32IRQ;
 179 };
 180
 181 struct PVRSRV_STUB_PBDESC;
 182 struct PVRSRV_STUB_PBDESC {
 183         u32 ui32RefCount;
 184         u32 ui32TotalPBSize;
 185         struct PVRSRV_KERNEL_MEM_INFO *psSharedPBDescKernelMemInfo;
 186         struct PVRSRV_KERNEL_MEM_INFO *psHWPBDescKernelMemInfo;
 187         struct PVRSRV_KERNEL_MEM_INFO **ppsSubKernelMemInfos;
 188         u32 ui32SubKernelMemInfosCount;
 189         void *hDevCookie;
 190         struct PVRSRV_KERNEL_MEM_INFO *psBlockKernelMemInfo;
 191         struct PVRSRV_STUB_PBDESC *psNext;
 192 };
 193
 194 struct PVRSRV_SGX_CCB_INFO {
 195         struct PVRSRV_KERNEL_MEM_INFO *psCCBMemInfo;
 196         struct PVRSRV_KERNEL_MEM_INFO *psCCBCtlMemInfo;
 197         struct SGXMKIF_COMMAND *psCommands;
 198         u32 *pui32WriteOffset;
 199         volatile u32 *pui32ReadOffset;
 200 #if defined(PDUMP)
 201         u32 ui32CCBDumpWOff;
 202 #endif
 203 };
 204
 205 struct timer_work_data {
 206         struct PVRSRV_DEVICE_NODE *psDeviceNode;
 207         struct delayed_work work;
 208         struct workqueue_struct *work_queue;
 209         unsigned int interval;
 210         bool armed;
 211 };
 212
 213 enum PVRSRV_ERROR SGXRegisterDevice(struct PVRSRV_DEVICE_NODE *psDeviceNode);
 214 enum PVRSRV_ERROR SGXOSTimerEnable(struct timer_work_data *data);
 215 enum PVRSRV_ERROR SGXOSTimerCancel(struct timer_work_data *data);
 216 struct timer_work_data *
 217 SGXOSTimerInit(struct PVRSRV_DEVICE_NODE *psDeviceNode);
 218 void SGXOSTimerDeInit(struct timer_work_data *data);
 219
 220 void HWRecoveryResetSGX(struct PVRSRV_DEVICE_NODE *psDeviceNode);
 221 void SGXReset(struct PVRSRV_SGXDEV_INFO *psDevInfo, u32 ui32PDUMPFlags);
 222
 223 enum PVRSRV_ERROR SGXInitialise(struct PVRSRV_SGXDEV_INFO *psDevInfo,
 224                                 IMG_BOOL bHardwareRecovery);
 225 enum PVRSRV_ERROR SGXDeinitialise(void *hDevCookie);
 226
 227 void sgx_mark_new_command(struct PVRSRV_DEVICE_NODE *node);
 228 void sgx_mark_power_down(struct PVRSRV_DEVICE_NODE *node);
 229
 230 void SGXStartTimer(struct PVRSRV_SGXDEV_INFO *psDevInfo,
 231                    IMG_BOOL bStartOSTimer);
 232
 233 enum PVRSRV_ERROR SGXPrePowerStateExt(void *hDevHandle,
 234                                       enum PVR_POWER_STATE eNewPowerState,
 235                                       enum PVR_POWER_STATE eCurrentPowerState);
 236
 237 enum PVRSRV_ERROR SGXPostPowerStateExt(void *hDevHandle,
 238                                        enum PVR_POWER_STATE eNewPowerState,
 239                                        enum PVR_POWER_STATE eCurrentPowerState);
 240
 241 enum PVRSRV_ERROR SGXPreClockSpeedChange(void *hDevHandle,
 242                                          IMG_BOOL bIdleDevice,
 243                                          enum PVR_POWER_STATE
 244                                          eCurrentPowerState);
 245
 246 enum PVRSRV_ERROR SGXPostClockSpeedChange(void *hDevHandle,
 247                                           IMG_BOOL bIdleDevice,
 248                                           enum PVR_POWER_STATE
 249                                           eCurrentPowerState);
 250
 251 enum PVRSRV_ERROR SGXDevInitCompatCheck(struct PVRSRV_DEVICE_NODE
 252                                         *psDeviceNode);
 253
 254 void SysGetSGXTimingInformation(struct SGX_TIMING_INFORMATION *psSGXTimingInfo);
 255
 256 #if defined(PVRSRV_USSE_EDM_STATUS_DEBUG) || defined(CONFIG_DEBUG_FS)
 257 size_t snprint_edm_trace(struct PVRSRV_SGXDEV_INFO *sdev, char *buf,
 258                          size_t buf_size);
 259 #else
 260 static inline size_t snprint_edm_trace(struct PVRSRV_SGXDEV_INFO *sdev,
 261                                         char *buf, size_t buf_size)
 262 {
 263         return 0;
 264 }
 265 #endif
 266
 267
 268
 269 #if defined(NO_HARDWARE)
 270 static inline void NoHardwareGenerateEvent(struct PVRSRV_SGXDEV_INFO *psDevInfo,
 271                                            u32 ui32StatusRegister,
 272                                            u32 ui32StatusValue,
 273                                            u32 ui32StatusMask)
 274 {
 275         u32 ui32RegVal;
 276
 277         ui32RegVal = OSReadHWReg(psDevInfo->pvRegsBaseKM, ui32StatusRegister);
 278
 279         ui32RegVal &= ~ui32StatusMask;
 280         ui32RegVal |= (ui32StatusValue & ui32StatusMask);
 281
 282         OSWriteHWReg(psDevInfo->pvRegsBaseKM, ui32StatusRegister, ui32RegVal);
 283 }
 284 #endif
 285
 286 #endif