39ec96085d6d5d704aaea3ea11254444082997f9
[sgx.git] / pvr / sgxapi_km.h
1 /**********************************************************************
2  *
3  * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms and conditions of the GNU General Public License,
7  * version 2, as published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope it will be useful but, except
10  * as otherwise stated in writing, without any warranty; without even the
11  * implied warranty of merchantability or fitness for a particular purpose.
12  * See the GNU General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program; if not, write to the Free Software Foundation, Inc.,
16  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
17  *
18  * The full GNU General Public License is included in this distribution in
19  * the file called "COPYING".
20  *
21  * Contact Information:
22  * Imagination Technologies Ltd. <gpl-support@imgtec.com>
23  * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
24  *
25  ******************************************************************************/
26
27 #ifndef __SGXAPI_KM_H__
28 #define __SGXAPI_KM_H__
29
30
31 #include "sgxdefs.h"
32 #include "img_types.h"
33
34 #if defined(__KERNEL__)
35 #include <linux/unistd.h>
36 #else
37 #include <unistd.h>
38 #endif
39
40 #define SGX_UNDEFINED_HEAP_ID                           (~0LU)
41 #define SGX_GENERAL_HEAP_ID                             0
42 #define SGX_TADATA_HEAP_ID                              1
43 #define SGX_KERNEL_CODE_HEAP_ID                         2
44 #define SGX_KERNEL_DATA_HEAP_ID                         3
45 #define SGX_PIXELSHADER_HEAP_ID                         4
46 #define SGX_VERTEXSHADER_HEAP_ID                        5
47 #define SGX_PDSPIXEL_CODEDATA_HEAP_ID                   6
48 #define SGX_PDSVERTEX_CODEDATA_HEAP_ID                  7
49 #define SGX_SYNCINFO_HEAP_ID                            8
50 #define SGX_3DPARAMETERS_HEAP_ID                        9
51 #define SGX_MAX_HEAP_ID                                 10
52
53 #define SGX_MAX_TA_STATUS_VALS                          32
54 #define SGX_MAX_3D_STATUS_VALS                          4
55
56 #define SGX_MAX_SRC_SYNCS                               4
57
58 #define PVRSRV_SGX_HWPERF_NUM_COUNTERS                  9
59
60 #define PVRSRV_SGX_HWPERF_INVALID                       0x1
61
62 #define PVRSRV_SGX_HWPERF_TRANSFER                      0x2
63 #define PVRSRV_SGX_HWPERF_TA                            0x3
64 #define PVRSRV_SGX_HWPERF_3D                            0x4
65 #define PVRSRV_SGX_HWPERF_2D                            0x5
66
67 #define PVRSRV_SGX_HWPERF_MK_EVENT                      0x101
68 #define PVRSRV_SGX_HWPERF_MK_TA                         0x102
69 #define PVRSRV_SGX_HWPERF_MK_3D                         0x103
70 #define PVRSRV_SGX_HWPERF_MK_2D                         0x104
71
72 #define PVRSRV_SGX_HWPERF_TYPE_STARTEND_BIT             28
73 #define PVRSRV_SGX_HWPERF_TYPE_OP_MASK                                  \
74         ((1 << PVRSRV_SGX_HWPERF_TYPE_STARTEND_BIT) - 1)
75 #define PVRSRV_SGX_HWPERF_TYPE_OP_START                                 \
76         (0 << PVRSRV_SGX_HWPERF_TYPE_STARTEND_BIT)
77 #define PVRSRV_SGX_HWPERF_TYPE_OP_END                                   \
78         (1 << PVRSRV_SGX_HWPERF_TYPE_STARTEND_BIT)
79
80 #define PVRSRV_SGX_HWPERF_TYPE_TRANSFER_START                           \
81         (PVRSRV_SGX_HWPERF_TRANSFER | PVRSRV_SGX_HWPERF_TYPE_OP_START)
82 #define PVRSRV_SGX_HWPERF_TYPE_TRANSFER_END                             \
83         (PVRSRV_SGX_HWPERF_TRANSFER | PVRSRV_SGX_HWPERF_TYPE_OP_END)
84 #define PVRSRV_SGX_HWPERF_TYPE_TA_START                                 \
85         (PVRSRV_SGX_HWPERF_TA | PVRSRV_SGX_HWPERF_TYPE_OP_START)
86 #define PVRSRV_SGX_HWPERF_TYPE_TA_END                                   \
87         (PVRSRV_SGX_HWPERF_TA | PVRSRV_SGX_HWPERF_TYPE_OP_END)
88 #define PVRSRV_SGX_HWPERF_TYPE_3D_START                                 \
89         (PVRSRV_SGX_HWPERF_3D | PVRSRV_SGX_HWPERF_TYPE_OP_START)
90 #define PVRSRV_SGX_HWPERF_TYPE_3D_END                                   \
91         (PVRSRV_SGX_HWPERF_3D | PVRSRV_SGX_HWPERF_TYPE_OP_END)
92 #define PVRSRV_SGX_HWPERF_TYPE_2D_START                                 \
93         (PVRSRV_SGX_HWPERF_2D | PVRSRV_SGX_HWPERF_TYPE_OP_START)
94 #define PVRSRV_SGX_HWPERF_TYPE_2D_END                                   \
95         (PVRSRV_SGX_HWPERF_2D | PVRSRV_SGX_HWPERF_TYPE_OP_END)
96
97 #define PVRSRV_SGX_HWPERF_TYPE_MK_EVENT_START                           \
98         (PVRSRV_SGX_HWPERF_MK_EVENT | PVRSRV_SGX_HWPERF_TYPE_OP_START)
99 #define PVRSRV_SGX_HWPERF_TYPE_MK_EVENT_END                             \
100         (PVRSRV_SGX_HWPERF_MK_EVENT | PVRSRV_SGX_HWPERF_TYPE_OP_END)
101 #define PVRSRV_SGX_HWPERF_TYPE_MK_TA_START                              \
102         (PVRSRV_SGX_HWPERF_MK_TA | PVRSRV_SGX_HWPERF_TYPE_OP_START)
103 #define PVRSRV_SGX_HWPERF_TYPE_MK_TA_END                                \
104         (PVRSRV_SGX_HWPERF_MK_TA | PVRSRV_SGX_HWPERF_TYPE_OP_END)
105 #define PVRSRV_SGX_HWPERF_TYPE_MK_3D_START                              \
106         (PVRSRV_SGX_HWPERF_MK_3D | PVRSRV_SGX_HWPERF_TYPE_OP_START)
107 #define PVRSRV_SGX_HWPERF_TYPE_MK_3D_END                                \
108         (PVRSRV_SGX_HWPERF_MK_3D | PVRSRV_SGX_HWPERF_TYPE_OP_END)
109 #define PVRSRV_SGX_HWPERF_TYPE_MK_2D_START                              \
110         (PVRSRV_SGX_HWPERF_MK_2D | PVRSRV_SGX_HWPERF_TYPE_OP_START)
111 #define PVRSRV_SGX_HWPERF_TYPE_MK_2D_END                                \
112         (PVRSRV_SGX_HWPERF_MK_2D | PVRSRV_SGX_HWPERF_TYPE_OP_END)
113
114 #define PVRSRV_SGX_HWPERF_OFF                                   0x0
115 #define PVRSRV_SGX_HWPERF_GRAPHICS_ON                           (1UL << 0)
116 #define PVRSRV_SGX_HWPERF_MK_EXECUTION_ON                       (1UL << 1)
117
118 struct PVRSRV_SGX_HWPERF_CB_ENTRY {
119         u32 ui32FrameNo;
120         u32 ui32Type;
121         u32 ui32Ordinal;
122         u32 ui32Clocksx16;
123         u32 ui32Counters[PVRSRV_SGX_HWPERF_NUM_COUNTERS];
124 };
125
126 struct PVRSRV_SGX_HWPERF_CBDATA {
127         u32 ui32FrameNo;
128         u32 ui32Type;
129         u32 ui32StartTimeWraps;
130         u32 ui32StartTime;
131         u32 ui32EndTimeWraps;
132         u32 ui32EndTime;
133         u32 ui32ClockSpeed;
134         u32 ui32TimeMax;
135 };
136
137 struct SGX_MISC_INFO_HWPERF_RETRIEVE_CB {
138         struct PVRSRV_SGX_HWPERF_CBDATA *psHWPerfData;
139         u32 ui32ArraySize;
140         u32 ui32DataCount;
141         u32 ui32Time;
142 };
143
144 struct CTL_STATUS {
145         struct IMG_DEV_VIRTADDR sStatusDevAddr;
146         u32 ui32StatusValue;
147 };
148
149 enum SGX_MISC_INFO_REQUEST {
150         SGX_MISC_INFO_REQUEST_CLOCKSPEED = 0,
151         SGX_MISC_INFO_REQUEST_SGXREV,
152         SGX_MISC_INFO_REQUEST_DRIVER_SGXREV,
153         SGX_MISC_INFO_REQUEST_SET_HWPERF_STATUS,
154         SGX_MISC_INFO_REQUEST_HWPERF_CB_ON,
155         SGX_MISC_INFO_REQUEST_HWPERF_CB_OFF,
156         SGX_MISC_INFO_REQUEST_HWPERF_RETRIEVE_CB,
157         SGX_MISC_INFO_REQUEST_FORCE_I16 = 0x7fff
158 };
159
160 struct PVRSRV_SGX_MISCINFO_FEATURES {
161         u32 ui32CoreRev;
162         u32 ui32CoreID;
163         u32 ui32DDKVersion;
164         u32 ui32DDKBuild;
165         u32 ui32CoreIdSW;
166         u32 ui32CoreRevSW;
167         u32 ui32BuildOptions;
168 };
169
170 struct SGX_MISC_INFO {
171         enum SGX_MISC_INFO_REQUEST eRequest;
172
173         union {
174                 u32 reserved;
175                 struct PVRSRV_SGX_MISCINFO_FEATURES sSGXFeatures;
176                 u32 ui32SGXClockSpeed;
177                 u32 ui32NewHWPerfStatus;
178                 struct SGX_MISC_INFO_HWPERF_RETRIEVE_CB sRetrieveCB;
179         } uData;
180 };
181
182 enum render_state_buf_type {
183         RSB_USSE_VERTEX_PROG,
184         RSB_USSE_FRAGMENT_PROG,
185 };
186
187 struct render_state_buf_info {
188         u32                             buf_id;
189         u32                             offset;
190         u32                             size;
191         enum render_state_buf_type      type;
192 };
193
194 struct render_state_buf_list {
195         u32                             cnt;
196         struct render_state_buf_info    info[20];
197 };
198
199 #define SGX_KICKTA_DUMPBITMAP_MAX_NAME_LENGTH           256
200
201 struct SGX_KICKTA_DUMPBITMAP {
202         struct IMG_DEV_VIRTADDR sDevBaseAddr;
203         u32 ui32Flags;
204         u32 ui32Width;
205         u32 ui32Height;
206         u32 ui32Stride;
207         u32 ui32PDUMPFormat;
208         u32 ui32BytesPP;
209         char pszName[SGX_KICKTA_DUMPBITMAP_MAX_NAME_LENGTH];
210 };
211
212 #define PVRSRV_SGX_PDUMP_CONTEXT_MAX_BITMAP_ARRAY_SIZE  16
213
214 struct PVRSRV_SGX_PDUMP_CONTEXT {
215         u32 ui32CacheControl;
216 };
217
218 struct SGX_KICKTA_DUMP_ROFF {
219         void *hKernelMemInfo;
220         u32 uiAllocIndex;
221         u32 ui32Offset;
222         u32 ui32Value;
223         char *pszName;
224 };
225
226 struct SGX_KICKTA_DUMP_BUFFER {
227         u32 ui32SpaceUsed;
228         u32 ui32Start;
229         u32 ui32End;
230         u32 ui32BufferSize;
231         u32 ui32BackEndLength;
232         u32 uiAllocIndex;
233         void *hKernelMemInfo;
234         void *pvLinAddr;
235         char *pszName;
236 };
237
238 #ifdef PDUMP
239 struct SGX_KICKTA_PDUMP {
240
241         struct SGX_KICKTA_DUMPBITMAP *psPDumpBitmapArray;
242         u32 ui32PDumpBitmapSize;
243
244         struct SGX_KICKTA_DUMP_BUFFER *psBufferArray;
245         u32 ui32BufferArraySize;
246
247         struct SGX_KICKTA_DUMP_ROFF *psROffArray;
248         u32 ui32ROffArraySize;
249 };
250 #endif
251
252 #define SGX_MAX_TRANSFER_STATUS_VALS    2
253 #define SGX_MAX_TRANSFER_SYNC_OPS       5
254
255 #endif