1 /**********************************************************************
3 * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful but, except
10 * as otherwise stated in writing, without any warranty; without even the
11 * implied warranty of merchantability or fitness for a particular purpose.
12 * See the GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * Imagination Technologies Ltd. <gpl-support@imgtec.com>
23 * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
25 ******************************************************************************/
27 #if defined(CONFIG_PVR_DEBUG_EXTRA) || defined(INTERNAL_TEST)
28 #define DEBUG_SET_OFFSET OPTIONS_BIT0
29 #define OPTIONS_BIT0 0x1
31 #define OPTIONS_BIT0 0x0
34 #if defined(PDUMP) || defined(INTERNAL_TEST)
35 #define PDUMP_SET_OFFSET OPTIONS_BIT1
36 #define OPTIONS_BIT1 (0x1 << 1)
38 #define OPTIONS_BIT1 0x0
41 #define PVRSRV_USSE_EDM_STATUS_DEBUG_SET_OFFSET OPTIONS_BIT2
42 #define OPTIONS_BIT2 (0x1 << 2)
44 #define SUPPORT_HW_RECOVERY_SET_OFFSET OPTIONS_BIT3
45 #define OPTIONS_BIT3 (0x1 << 3)
47 #define PVR_SECURE_HANDLES_SET_OFFSET OPTIONS_BIT4
48 #define OPTIONS_BIT4 (0x1 << 4)
50 #if defined(INTERNAL_TEST)
51 #define SGX_BYPASS_SYSTEM_CACHE_SET_OFFSET OPTIONS_BIT5
52 #define OPTIONS_BIT5 (0x1 << 5)
54 #define OPTIONS_BIT5 0x0
57 #if defined(INTERNAL_TEST)
58 #define SGX_DMS_AGE_ENABLE_SET_OFFSET OPTIONS_BIT6
59 #define OPTIONS_BIT6 (0x1 << 6)
61 #define OPTIONS_BIT6 0x0
64 #if defined(INTERNAL_TEST)
65 #define SGX_DONT_SWITCH_OFF_FEATURES_SET_OFFSET OPTIONS_BIT7
66 #define OPTIONS_BIT7 (0x1 << 7)
68 #define OPTIONS_BIT7 0x0
71 #if defined(INTERNAL_TEST)
72 #define SGX_FAST_DPM_INIT_SET_OFFSET OPTIONS_BIT8
73 #define OPTIONS_BIT8 (0x1 << 8)
75 #define OPTIONS_BIT8 0x0
78 #if defined(INTERNAL_TEST)
79 #define SGX_FEATURE_DCU_SET_OFFSET OPTIONS_BIT9
80 #define OPTIONS_BIT9 (0x1 << 9)
82 #define OPTIONS_BIT9 0x0
85 #if defined(INTERNAL_TEST)
86 #define SGX_FEATURE_MP_SET_OFFSET OPTIONS_BIT10
87 #define OPTIONS_BIT10 (0x1 << 10)
89 #define OPTIONS_BIT10 0x0
92 #if defined(INTERNAL_TEST)
93 #define SGX_FEATURE_MULTITHREADED_UKERNEL_SET_OFFSET OPTIONS_BIT11
94 #define OPTIONS_BIT11 (0x1 << 11)
96 #define OPTIONS_BIT11 0x0
99 #if defined(INTERNAL_TEST)
100 #define SGX_FEATURE_OVERLAPPED_SPM_SET_OFFSET OPTIONS_BIT12
101 #define OPTIONS_BIT12 (0x1 << 12)
103 #define OPTIONS_BIT12 0x0
106 #if defined(INTERNAL_TEST)
107 #define SGX_FEATURE_RENDER_TARGET_ARRAYS_SET_OFFSET OPTIONS_BIT13
108 #define OPTIONS_BIT13 (0x1 << 13)
110 #define OPTIONS_BIT13 0x0
113 #if defined(INTERNAL_TEST)
114 #define SGX_FEATURE_SYSTEM_CACHE_SET_OFFSET OPTIONS_BIT14
115 #define OPTIONS_BIT14 (0x1 << 14)
117 #define OPTIONS_BIT14 0x0
120 #if defined(INTERNAL_TEST)
121 #define SGX_SUPPORT_HWPROFILING_SET_OFFSET OPTIONS_BIT15
122 #define OPTIONS_BIT15 (0x1 << 15)
124 #define OPTIONS_BIT15 0x0
127 #define SUPPORT_ACTIVE_POWER_MANAGEMENT_SET_OFFSET OPTIONS_BIT16
128 #define OPTIONS_BIT16 (0x1 << 16)
130 #if defined(INTERNAL_TEST)
131 #define SUPPORT_DISPLAYCONTROLLER_TILING_SET_OFFSET OPTIONS_BIT17
132 #define OPTIONS_BIT17 (0x1 << 17)
134 #define OPTIONS_BIT17 0x0
137 #define SUPPORT_PERCONTEXT_PB_SET_OFFSET OPTIONS_BIT18
138 #define OPTIONS_BIT18 (0x1 << 18)
140 #define OPTIONS_BIT19 (0x1 << 19)
142 #if defined(INTERNAL_TEST)
143 #define SUPPORT_SGX_MMU_DUMMY_PAGE_SET_OFFSET OPTIONS_BIT20
144 #define OPTIONS_BIT20 (0x1 << 20)
146 #define OPTIONS_BIT20 0x0
149 #define SUPPORT_SGX_PRIORITY_SCHEDULING_SET_OFFSET OPTIONS_BIT21
150 #define OPTIONS_BIT21 (0x1 << 21)
152 #if defined(INTERNAL_TEST)
153 #define USE_SUPPORT_NO_TA3D_OVERLAP_SET_OFFSET OPTIONS_BIT22
154 #define OPTIONS_BIT22 (0x1 << 22)
156 #define OPTIONS_BIT22 0x0
159 #if defined(INTERNAL_TEST)
160 #define OPTIONS_HIGHBYTE \
161 ((SGX_FEATURE_MP_CORE_COUNT-1) << SGX_FEATURE_MP_CORE_COUNT_SET_OFFSET)
162 #define SGX_FEATURE_MP_CORE_COUNT_SET_OFFSET 28UL
163 #define SGX_FEATURE_MP_CORE_COUNT_SET_MASK 0xFF
165 #define OPTIONS_HIGHBYTE 0x0
168 #define SGX_BUILD_OPTIONS ( \
169 OPTIONS_BIT0 | OPTIONS_BIT1 | OPTIONS_BIT2 | OPTIONS_BIT3 | \
170 OPTIONS_BIT4 | OPTIONS_BIT5 | OPTIONS_BIT6 | OPTIONS_BIT7 | \
171 OPTIONS_BIT8 | OPTIONS_BIT9 | OPTIONS_BIT10 | OPTIONS_BIT11 | \
172 OPTIONS_BIT12 | OPTIONS_BIT13 | OPTIONS_BIT14 | OPTIONS_BIT15 | \
173 OPTIONS_BIT16 | OPTIONS_BIT17 | OPTIONS_BIT18 | OPTIONS_BIT19 | \
174 OPTIONS_BIT20 | OPTIONS_BIT21 | OPTIONS_BIT22 | OPTIONS_HIGHBYTE)