pvr/sgx_bridge.h

   1 /**********************************************************************
   2  *
   3  * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful but, except
  10  * as otherwise stated in writing, without any warranty; without even the
  11  * implied warranty of merchantability or fitness for a particular purpose.
  12  * See the GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  17  *
  18  * The full GNU General Public License is included in this distribution in
  19  * the file called "COPYING".
  20  *
  21  * Contact Information:
  22  * Imagination Technologies Ltd. <gpl-support@imgtec.com>
  23  * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
  24  *
  25  ******************************************************************************/
  26
  27 #if !defined(__SGX_BRIDGE_H__)
  28 #define __SGX_BRIDGE_H__
  29
  30 #include "sgxapi_km.h"
  31 #include "sgxinfo.h"
  32 #include "pvr_bridge.h"
  33
  34 #define PVRSRV_BRIDGE_SGX_CMD_BASE (PVRSRV_BRIDGE_LAST_NON_DEVICE_CMD+1)
  35 #define PVRSRV_BRIDGE_SGX_GETCLIENTINFO                                 \
  36                                 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+0)
  37 #define PVRSRV_BRIDGE_SGX_RELEASECLIENTINFO                             \
  38                                 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+1)
  39 #define PVRSRV_BRIDGE_SGX_GETINTERNALDEVINFO                            \
  40                                 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+2)
  41 #define PVRSRV_BRIDGE_SGX_DOKICK                                        \
  42                                 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+3)
  43 #define PVRSRV_BRIDGE_SGX_GETPHYSPAGEADDR                               \
  44                                 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+4)
  45 #define PVRSRV_BRIDGE_SGX_READREGISTRYDWORD                             \
  46                                 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+5)
  47 #define PVRSRV_BRIDGE_SGX_SCHEDULECOMMAND                               \
  48                                 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+6)
  49
  50 #define PVRSRV_BRIDGE_SGX_2DQUERYBLTSCOMPLETE                           \
  51                                 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+9)
  52
  53 #define PVRSRV_BRIDGE_SGX_GETMMUPDADDR                                  \
  54                                 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+10)
  55
  56 #define PVRSRV_BRIDGE_SGX_SUBMITTRANSFER                                \
  57                                 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+13)
  58 #define PVRSRV_BRIDGE_SGX_GETMISCINFO                                   \
  59                                 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+14)
  60 #define PVRSRV_BRIDGE_SGXINFO_FOR_SRVINIT                               \
  61                                 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+15)
  62 #define PVRSRV_BRIDGE_SGX_DEVINITPART2                                  \
  63                                 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+16)
  64
  65 #define PVRSRV_BRIDGE_SGX_FINDSHAREDPBDESC                              \
  66                                 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+17)
  67 #define PVRSRV_BRIDGE_SGX_UNREFSHAREDPBDESC                             \
  68                                 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+18)
  69 #define PVRSRV_BRIDGE_SGX_ADDSHAREDPBDESC                               \
  70                                 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+19)
  71 #define PVRSRV_BRIDGE_SGX_REGISTER_HW_RENDER_CONTEXT                    \
  72                                 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+20)
  73 #define PVRSRV_BRIDGE_SGX_FLUSH_HW_RENDER_TARGET                        \
  74                                 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+21)
  75 #define PVRSRV_BRIDGE_SGX_UNREGISTER_HW_RENDER_CONTEXT                  \
  76                                 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+22)
  77 #define PVRSRV_BRIDGE_SGX_REGISTER_HW_TRANSFER_CONTEXT                  \
  78                                 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+26)
  79 #define PVRSRV_BRIDGE_SGX_UNREGISTER_HW_TRANSFER_CONTEXT                \
  80                                 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+27)
  81
  82 #define PVRSRV_BRIDGE_SGX_SCHEDULE_PROCESS_QUEUES                       \
  83                                 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+28)
  84
  85 #define PVRSRV_BRIDGE_SGX_READ_DIFF_COUNTERS                            \
  86                 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+29)
  87 #define PVRSRV_BRIDGE_SGX_READ_HWPERF_CB                                \
  88                 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+30)
  89
  90 #if defined(PDUMP)
  91 #define PVRSRV_BRIDGE_SGX_PDUMP_BUFFER_ARRAY                            \
  92                 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+31)
  93 #define PVRSRV_BRIDGE_SGX_PDUMP_3D_SIGNATURE_REGISTERS                  \
  94                 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+32)
  95 #define PVRSRV_BRIDGE_SGX_PDUMP_COUNTER_REGISTERS                       \
  96                 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+33)
  97 #define PVRSRV_BRIDGE_SGX_PDUMP_TA_SIGNATURE_REGISTERS                  \
  98                 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+34)
  99 #define PVRSRV_BRIDGE_SGX_PDUMP_HWPERFCB                                \
 100                 PVRSRV_IOWR(PVRSRV_BRIDGE_SGX_CMD_BASE+35)
 101 #endif
 102
 103 #define PVRSRV_BRIDGE_LAST_SGX_CMD (PVRSRV_BRIDGE_SGX_CMD_BASE+35)
 104
 105 struct PVRSRV_BRIDGE_IN_GETPHYSPAGEADDR {
 106         u32 ui32BridgeFlags;
 107         void *hDevMemHeap;
 108         struct IMG_DEV_VIRTADDR sDevVAddr;
 109 };
 110
 111 struct PVRSRV_BRIDGE_OUT_GETPHYSPAGEADDR {
 112         enum PVRSRV_ERROR eError;
 113         struct IMG_DEV_PHYADDR DevPAddr;
 114         struct IMG_CPU_PHYADDR CpuPAddr;
 115 };
 116
 117 struct PVRSRV_BRIDGE_IN_SGX_GETMMU_PDADDR {
 118         u32 ui32BridgeFlags;
 119         void *hDevCookie;
 120         void *hDevMemContext;
 121 };
 122
 123 struct PVRSRV_BRIDGE_OUT_SGX_GETMMU_PDADDR {
 124         struct IMG_DEV_PHYADDR sPDDevPAddr;
 125         enum PVRSRV_ERROR eError;
 126 };
 127
 128 struct PVRSRV_BRIDGE_IN_GETCLIENTINFO {
 129         u32 ui32BridgeFlags;
 130         void *hDevCookie;
 131 };
 132
 133 struct PVRSRV_BRIDGE_OUT_GETINTERNALDEVINFO {
 134         struct SGX_INTERNAL_DEVINFO sSGXInternalDevInfo;
 135         enum PVRSRV_ERROR eError;
 136 };
 137
 138 struct PVRSRV_BRIDGE_IN_GETINTERNALDEVINFO {
 139         u32 ui32BridgeFlags;
 140         void *hDevCookie;
 141 };
 142
 143 struct PVRSRV_BRIDGE_OUT_GETCLIENTINFO {
 144         struct SGX_CLIENT_INFO sClientInfo;
 145         enum PVRSRV_ERROR eError;
 146 };
 147
 148 struct PVRSRV_BRIDGE_IN_RELEASECLIENTINFO {
 149         u32 ui32BridgeFlags;
 150         void *hDevCookie;
 151         struct SGX_CLIENT_INFO sClientInfo;
 152 };
 153
 154 struct PVRSRV_BRIDGE_IN_ISPBREAKPOLL {
 155         u32 ui32BridgeFlags;
 156         void *hDevCookie;
 157 };
 158
 159 struct PVRSRV_BRIDGE_IN_DOKICK {
 160         u32 ui32BridgeFlags;
 161         void *hDevCookie;
 162         struct SGX_CCB_KICK sCCBKick;
 163 };
 164
 165 struct PVRSRV_BRIDGE_IN_SGX_SCHEDULE_PROCESS_QUEUES {
 166         u32 ui32BridgeFlags;
 167         void *hDevCookie;
 168 };
 169
 170 struct PVRSRV_BRIDGE_IN_SUBMITTRANSFER {
 171         u32 ui32BridgeFlags;
 172         void *hDevCookie;
 173         struct PVRSRV_TRANSFER_SGX_KICK sKick;
 174 };
 175
 176
 177 struct PVRSRV_BRIDGE_IN_READREGDWORD {
 178         u32 ui32BridgeFlags;
 179         void *hDevCookie;
 180         char *pszKey;
 181         char *pszValue;
 182 };
 183
 184 struct PVRSRV_BRIDGE_OUT_READREGDWORD {
 185         enum PVRSRV_ERROR eError;
 186         u32 ui32Data;
 187 };
 188
 189 struct PVRSRV_BRIDGE_IN_SCHEDULECOMMAND {
 190         u32 ui32BridgeFlags;
 191         void *hDevCookie;
 192         enum SGXMKIF_COMMAND_TYPE eCommandType;
 193         struct SGXMKIF_COMMAND *psCommandData;
 194
 195 };
 196
 197 struct PVRSRV_BRIDGE_IN_SGXGETMISCINFO {
 198         u32 ui32BridgeFlags;
 199         void *hDevCookie;
 200         struct SGX_MISC_INFO __user *psMiscInfo;
 201 };
 202
 203 struct PVRSRV_BRIDGE_IN_SGXINFO_FOR_SRVINIT {
 204         u32 ui32BridgeFlags;
 205         void *hDevCookie;
 206 };
 207
 208 struct PVRSRV_BRIDGE_OUT_SGXINFO_FOR_SRVINIT {
 209         enum PVRSRV_ERROR eError;
 210         struct SGX_BRIDGE_INFO_FOR_SRVINIT sInitInfo;
 211 };
 212
 213 struct PVRSRV_BRIDGE_IN_SGXDEVINITPART2 {
 214         u32 ui32BridgeFlags;
 215         void *hDevCookie;
 216         struct SGX_BRIDGE_INIT_INFO sInitInfo;
 217 };
 218
 219 enum pvr_sync_wait_seq_type {
 220         _PVR_SYNC_WAIT_BLOCK,
 221         _PVR_SYNC_WAIT_NONBLOCK,
 222         _PVR_SYNC_WAIT_EVENT,
 223         _PVR_SYNC_WAIT_FLIP,
 224         _PVR_SYNC_WAIT_UPDATE,
 225 };
 226
 227 struct PVRSRV_BRIDGE_IN_2DQUERYBLTSCOMPLETE {
 228         u32 ui32BridgeFlags;
 229         void *hDevCookie;
 230         void *hKernSyncInfo;
 231         u64 user_data;
 232         enum pvr_sync_wait_seq_type type;
 233 };
 234
 235 #define PVRSRV_BRIDGE_SGX_SHAREDPBDESC_MAX_SUBMEMINFOS 10
 236
 237 struct PVRSRV_BRIDGE_IN_SGXFINDSHAREDPBDESC {
 238         u32 ui32BridgeFlags;
 239         void *hDevCookie;
 240         IMG_BOOL bLockOnFailure;
 241         u32 ui32TotalPBSize;
 242 };
 243
 244 struct PVRSRV_BRIDGE_OUT_SGXFINDSHAREDPBDESC {
 245         void *hKernelMemInfo;
 246         void *hSharedPBDesc;
 247         void *hSharedPBDescKernelMemInfoHandle;
 248         void *hHWPBDescKernelMemInfoHandle;
 249         void *hBlockKernelMemInfoHandle;
 250         void *ahSharedPBDescSubKernelMemInfoHandles
 251             [PVRSRV_BRIDGE_SGX_SHAREDPBDESC_MAX_SUBMEMINFOS];
 252         u32 ui32SharedPBDescSubKernelMemInfoHandlesCount;
 253         enum PVRSRV_ERROR eError;
 254 };
 255
 256 struct PVRSRV_BRIDGE_IN_SGXUNREFSHAREDPBDESC {
 257         u32 ui32BridgeFlags;
 258         void *hSharedPBDesc;
 259 };
 260
 261 struct PVRSRV_BRIDGE_OUT_SGXUNREFSHAREDPBDESC {
 262         enum PVRSRV_ERROR eError;
 263 };
 264
 265 struct PVRSRV_BRIDGE_IN_SGXADDSHAREDPBDESC {
 266         u32 ui32BridgeFlags;
 267         void *hDevCookie;
 268         void *hSharedPBDescKernelMemInfo;
 269         void *hHWPBDescKernelMemInfo;
 270         void *hBlockKernelMemInfo;
 271         u32 ui32TotalPBSize;
 272         void * __user *phKernelMemInfoHandles;
 273         u32 ui32KernelMemInfoHandlesCount;
 274 };
 275
 276 struct PVRSRV_BRIDGE_OUT_SGXADDSHAREDPBDESC {
 277         enum PVRSRV_ERROR eError;
 278         void *hSharedPBDesc;
 279 };
 280
 281 #ifdef  PDUMP
 282 struct PVRSRV_BRIDGE_IN_PDUMP_BUFFER_ARRAY {
 283         u32 ui32BridgeFlags;
 284         struct SGX_KICKTA_DUMP_BUFFER __user *psBufferArray;
 285         u32 ui32BufferArrayLength;
 286         IMG_BOOL bDumpPolls;
 287 };
 288
 289 struct PVRSRV_BRIDGE_IN_PDUMP_3D_SIGNATURE_REGISTERS {
 290         u32 ui32BridgeFlags;
 291         u32 ui32DumpFrameNum;
 292         IMG_BOOL bLastFrame;
 293         u32 __user *pui32Registers;
 294         u32 ui32NumRegisters;
 295 };
 296
 297 struct PVRSRV_BRIDGE_IN_PDUMP_COUNTER_REGISTERS {
 298         u32 ui32BridgeFlags;
 299         u32 ui32DumpFrameNum;
 300         IMG_BOOL bLastFrame;
 301         u32 __user *pui32Registers;
 302         u32 ui32NumRegisters;
 303 };
 304
 305 struct PVRSRV_BRIDGE_IN_PDUMP_TA_SIGNATURE_REGISTERS {
 306         u32 ui32BridgeFlags;
 307         u32 ui32DumpFrameNum;
 308         u32 ui32TAKickCount;
 309         IMG_BOOL bLastFrame;
 310         u32 __user *pui32Registers;
 311         u32 ui32NumRegisters;
 312 };
 313
 314 struct PVRSRV_BRIDGE_IN_PDUMP_HWPERFCB {
 315         u32 ui32BridgeFlags;
 316         void *hDevCookie;
 317         char szFileName[PVRSRV_PDUMP_MAX_FILENAME_SIZE];
 318         u32 ui32FileOffset;
 319         u32 ui32PDumpFlags;
 320
 321 };
 322
 323 #endif
 324
 325 struct PVRSRV_BRIDGE_IN_SGX_REGISTER_HW_RENDER_CONTEXT {
 326         u32 ui32BridgeFlags;
 327         void *hDevCookie;
 328         struct IMG_DEV_VIRTADDR sHWRenderContextDevVAddr;
 329 };
 330
 331 struct PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_RENDER_CONTEXT {
 332         enum PVRSRV_ERROR eError;
 333         void *hHWRenderContext;
 334 };
 335
 336 struct PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_RENDER_CONTEXT {
 337         u32 ui32BridgeFlags;
 338         void *hDevCookie;
 339         void *hHWRenderContext;
 340 };
 341
 342 struct PVRSRV_BRIDGE_IN_SGX_REGISTER_HW_TRANSFER_CONTEXT {
 343         u32 ui32BridgeFlags;
 344         void *hDevCookie;
 345         struct IMG_DEV_VIRTADDR sHWTransferContextDevVAddr;
 346 };
 347
 348 struct PVRSRV_BRIDGE_OUT_SGX_REGISTER_HW_TRANSFER_CONTEXT {
 349         enum PVRSRV_ERROR eError;
 350         void *hHWTransferContext;
 351 };
 352
 353 struct PVRSRV_BRIDGE_IN_SGX_UNREGISTER_HW_TRANSFER_CONTEXT {
 354         u32 ui32BridgeFlags;
 355         void *hDevCookie;
 356         void *hHWTransferContext;
 357 };
 358
 359 struct PVRSRV_BRIDGE_IN_SGX_FLUSH_HW_RENDER_TARGET {
 360         u32 ui32BridgeFlags;
 361         void *hDevCookie;
 362         struct IMG_DEV_VIRTADDR sHWRTDataSetDevVAddr;
 363 };
 364
 365 struct PVRSRV_BRIDGE_IN_SGX_READ_DIFF_COUNTERS {
 366         u32 ui32BridgeFlags;
 367         void *hDevCookie;
 368         u32 ui32Reg;
 369         IMG_BOOL bNew;
 370         u32 ui32New;
 371         u32 ui32NewReset;
 372         u32 ui32CountersReg;
 373 };
 374
 375 struct PVRSRV_BRIDGE_OUT_SGX_READ_DIFF_COUNTERS {
 376         enum PVRSRV_ERROR eError;
 377         u32 ui32Old;
 378         u32 ui32Time;
 379         IMG_BOOL bActive;
 380         struct PVRSRV_SGXDEV_DIFF_INFO sDiffs;
 381 };
 382
 383 struct PVRSRV_BRIDGE_IN_SGX_READ_HWPERF_CB {
 384         u32 ui32BridgeFlags;
 385         void *hDevCookie;
 386         u32 ui32ArraySize;
 387         struct PVRSRV_SGX_HWPERF_CB_ENTRY __user *psHWPerfCBData;
 388 };
 389
 390 struct PVRSRV_BRIDGE_OUT_SGX_READ_HWPERF_CB {
 391         enum PVRSRV_ERROR eError;
 392         u32 ui32DataCount;
 393         u32 ui32ClockSpeed;
 394         u32 ui32HostTimeStamp;
 395 };
 396
 397 #endif