gpu: pvr: pdumpfs: add Kconfig and debugfs pdump mode handling
[sgx.git] / pvr / servicesext.h
1 /**********************************************************************
2  *
3  * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms and conditions of the GNU General Public License,
7  * version 2, as published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope it will be useful but, except
10  * as otherwise stated in writing, without any warranty; without even the
11  * implied warranty of merchantability or fitness for a particular purpose.
12  * See the GNU General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program; if not, write to the Free Software Foundation, Inc.,
16  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
17  *
18  * The full GNU General Public License is included in this distribution in
19  * the file called "COPYING".
20  *
21  * Contact Information:
22  * Imagination Technologies Ltd. <gpl-support@imgtec.com>
23  * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
24  *
25  ******************************************************************************/
26
27 #if !defined(__SERVICESEXT_H__)
28 #define __SERVICESEXT_H__
29
30 #include "img_types.h"
31
32 #define PVRSRV_LOCKFLG_READONLY                 1
33
34 enum PVRSRV_ERROR {
35         PVRSRV_OK                               =  0,
36         PVRSRV_ERROR_GENERIC                    =  1,
37         PVRSRV_ERROR_OUT_OF_MEMORY              =  2,
38         PVRSRV_ERROR_TOO_FEW_BUFFERS            =  3,
39         PVRSRV_ERROR_SYMBOL_NOT_FOUND           =  4,
40         PVRSRV_ERROR_OUT_OF_HSPACE              =  5,
41         PVRSRV_ERROR_INVALID_PARAMS             =  6,
42         PVRSRV_ERROR_TILE_MAP_FAILED            =  7,
43         PVRSRV_ERROR_INIT_FAILURE               =  8,
44         PVRSRV_ERROR_CANT_REGISTER_CALLBACK     =  9,
45         PVRSRV_ERROR_INVALID_DEVICE             =  10,
46         PVRSRV_ERROR_NOT_OWNER                  =  11,
47         PVRSRV_ERROR_BAD_MAPPING                =  12,
48         PVRSRV_ERROR_TIMEOUT                    =  13,
49         PVRSRV_ERROR_NO_PRIMARY                 =  14,
50         PVRSRV_ERROR_FLIP_CHAIN_EXISTS          =  15,
51         PVRSRV_ERROR_CANNOT_ACQUIRE_SYSDATA     =  16,
52         PVRSRV_ERROR_SCENE_INVALID              =  17,
53         PVRSRV_ERROR_STREAM_ERROR               =  18,
54         PVRSRV_ERROR_INVALID_INTERRUPT          =  19,
55         PVRSRV_ERROR_FAILED_DEPENDENCIES        =  20,
56         PVRSRV_ERROR_CMD_NOT_PROCESSED          =  21,
57         PVRSRV_ERROR_CMD_TOO_BIG                =  22,
58         PVRSRV_ERROR_DEVICE_REGISTER_FAILED     =  23,
59         PVRSRV_ERROR_FIFO_SPACE                 =  24,
60         PVRSRV_ERROR_TA_RECOVERY                =  25,
61         PVRSRV_ERROR_INDOSORLOWPOWER            =  26,
62         PVRSRV_ERROR_TOOMANYBUFFERS             =  27,
63         PVRSRV_ERROR_NOT_SUPPORTED              =  28,
64         PVRSRV_ERROR_PROCESSING_BLOCKED         =  29,
65
66         PVRSRV_ERROR_CANNOT_FLUSH_QUEUE         =  31,
67         PVRSRV_ERROR_CANNOT_GET_QUEUE_SPACE             =  32,
68         PVRSRV_ERROR_CANNOT_GET_RENDERDETAILS           =  33,
69         PVRSRV_ERROR_RETRY              =  34,
70
71         PVRSRV_ERROR_DDK_VERSION_MISMATCH       =  35,
72         PVRSRV_ERROR_BUILD_MISMATCH     =  36,
73
74         PVRSRV_ERROR_FORCE_I32  =  0x7fffffff
75 };
76
77 enum PVRSRV_DEVICE_CLASS {
78         PVRSRV_DEVICE_CLASS_3D = 0,
79         PVRSRV_DEVICE_CLASS_DISPLAY = 1,
80         PVRSRV_DEVICE_CLASS_BUFFER = 2,
81         PVRSRV_DEVICE_CLASS_VIDEO = 3,
82
83         PVRSRV_DEVICE_CLASS_FORCE_I32 = 0x7fffffff
84 };
85
86 enum PVR_POWER_STATE {
87         PVRSRV_POWER_Unspecified = -1,
88         PVRSRV_POWER_STATE_D0 = 0,
89         PVRSRV_POWER_STATE_D1 = 1,
90         PVRSRV_POWER_STATE_D2 = 2,
91         PVRSRV_POWER_STATE_D3 = 3,
92         PVRSRV_POWER_STATE_D4 = 4,
93
94         PVRSRV_POWER_STATE_FORCE_I32 = 0x7fffffff
95 };
96
97 enum PVRSRV_PIXEL_FORMAT {
98         PVRSRV_PIXEL_FORMAT_UNKNOWN = 0,
99         PVRSRV_PIXEL_FORMAT_RGB565 = 1,
100         PVRSRV_PIXEL_FORMAT_RGB555 = 2,
101         PVRSRV_PIXEL_FORMAT_RGB888 = 3,
102         PVRSRV_PIXEL_FORMAT_BGR888 = 4,
103         PVRSRV_PIXEL_FORMAT_GREY_SCALE = 8,
104         PVRSRV_PIXEL_FORMAT_PAL12 = 13,
105         PVRSRV_PIXEL_FORMAT_PAL8 = 14,
106         PVRSRV_PIXEL_FORMAT_PAL4 = 15,
107         PVRSRV_PIXEL_FORMAT_PAL2 = 16,
108         PVRSRV_PIXEL_FORMAT_PAL1 = 17,
109         PVRSRV_PIXEL_FORMAT_ARGB1555 = 18,
110         PVRSRV_PIXEL_FORMAT_ARGB4444 = 19,
111         PVRSRV_PIXEL_FORMAT_ARGB8888 = 20,
112         PVRSRV_PIXEL_FORMAT_ABGR8888 = 21,
113         PVRSRV_PIXEL_FORMAT_YV12 = 22,
114         PVRSRV_PIXEL_FORMAT_I420 = 23,
115         PVRSRV_PIXEL_FORMAT_IMC2 = 25,
116
117         PVRSRV_PIXEL_FORMAT_XRGB8888,
118         PVRSRV_PIXEL_FORMAT_XBGR8888,
119         PVRSRV_PIXEL_FORMAT_XRGB4444,
120         PVRSRV_PIXEL_FORMAT_ARGB8332,
121         PVRSRV_PIXEL_FORMAT_A2RGB10,
122         PVRSRV_PIXEL_FORMAT_A2BGR10,
123         PVRSRV_PIXEL_FORMAT_P8,
124         PVRSRV_PIXEL_FORMAT_L8,
125         PVRSRV_PIXEL_FORMAT_A8L8,
126         PVRSRV_PIXEL_FORMAT_A4L4,
127         PVRSRV_PIXEL_FORMAT_L16,
128         PVRSRV_PIXEL_FORMAT_L6V5U5,
129         PVRSRV_PIXEL_FORMAT_V8U8,
130         PVRSRV_PIXEL_FORMAT_V16U16,
131         PVRSRV_PIXEL_FORMAT_QWVU8888,
132         PVRSRV_PIXEL_FORMAT_XLVU8888,
133         PVRSRV_PIXEL_FORMAT_QWVU16,
134         PVRSRV_PIXEL_FORMAT_D16,
135         PVRSRV_PIXEL_FORMAT_D24S8,
136         PVRSRV_PIXEL_FORMAT_D24X8,
137
138         PVRSRV_PIXEL_FORMAT_ABGR16,
139         PVRSRV_PIXEL_FORMAT_ABGR16F,
140         PVRSRV_PIXEL_FORMAT_ABGR32,
141         PVRSRV_PIXEL_FORMAT_ABGR32F,
142         PVRSRV_PIXEL_FORMAT_B10GR11,
143         PVRSRV_PIXEL_FORMAT_GR88,
144         PVRSRV_PIXEL_FORMAT_BGR32,
145         PVRSRV_PIXEL_FORMAT_GR32,
146         PVRSRV_PIXEL_FORMAT_E5BGR9,
147
148         PVRSRV_PIXEL_FORMAT_DXT1,
149         PVRSRV_PIXEL_FORMAT_DXT23,
150         PVRSRV_PIXEL_FORMAT_DXT45,
151
152         PVRSRV_PIXEL_FORMAT_R8G8_B8G8,
153         PVRSRV_PIXEL_FORMAT_G8R8_G8B8,
154
155         PVRSRV_PIXEL_FORMAT_NV11,
156         PVRSRV_PIXEL_FORMAT_NV12,
157
158         PVRSRV_PIXEL_FORMAT_YUY2,
159         PVRSRV_PIXEL_FORMAT_YUV420,
160         PVRSRV_PIXEL_FORMAT_YUV444,
161         PVRSRV_PIXEL_FORMAT_VUY444,
162         PVRSRV_PIXEL_FORMAT_YUYV,
163         PVRSRV_PIXEL_FORMAT_YVYU,
164         PVRSRV_PIXEL_FORMAT_UYVY,
165         PVRSRV_PIXEL_FORMAT_VYUY,
166
167         PVRSRV_PIXEL_FORMAT_FOURCC_ORG_UYVY,
168         PVRSRV_PIXEL_FORMAT_FOURCC_ORG_YUYV,
169         PVRSRV_PIXEL_FORMAT_FOURCC_ORG_YVYU,
170         PVRSRV_PIXEL_FORMAT_FOURCC_ORG_VYUY,
171
172         PVRSRV_PIXEL_FORMAT_A32B32G32R32,
173         PVRSRV_PIXEL_FORMAT_A32B32G32R32F,
174         PVRSRV_PIXEL_FORMAT_A32B32G32R32_UINT,
175         PVRSRV_PIXEL_FORMAT_A32B32G32R32_SINT,
176
177         PVRSRV_PIXEL_FORMAT_B32G32R32,
178         PVRSRV_PIXEL_FORMAT_B32G32R32F,
179         PVRSRV_PIXEL_FORMAT_B32G32R32_UINT,
180         PVRSRV_PIXEL_FORMAT_B32G32R32_SINT,
181
182         PVRSRV_PIXEL_FORMAT_G32R32,
183         PVRSRV_PIXEL_FORMAT_G32R32F,
184         PVRSRV_PIXEL_FORMAT_G32R32_UINT,
185         PVRSRV_PIXEL_FORMAT_G32R32_SINT,
186
187         PVRSRV_PIXEL_FORMAT_D32F,
188         PVRSRV_PIXEL_FORMAT_R32,
189         PVRSRV_PIXEL_FORMAT_R32F,
190         PVRSRV_PIXEL_FORMAT_R32_UINT,
191         PVRSRV_PIXEL_FORMAT_R32_SINT,
192
193         PVRSRV_PIXEL_FORMAT_A16B16G16R16,
194         PVRSRV_PIXEL_FORMAT_A16B16G16R16F,
195         PVRSRV_PIXEL_FORMAT_A16B16G16R16_SINT,
196         PVRSRV_PIXEL_FORMAT_A16B16G16R16_SNORM,
197         PVRSRV_PIXEL_FORMAT_A16B16G16R16_UINT,
198         PVRSRV_PIXEL_FORMAT_A16B16G16R16_UNORM,
199
200         PVRSRV_PIXEL_FORMAT_G16R16,
201         PVRSRV_PIXEL_FORMAT_G16R16F,
202         PVRSRV_PIXEL_FORMAT_G16R16_UINT,
203         PVRSRV_PIXEL_FORMAT_G16R16_UNORM,
204         PVRSRV_PIXEL_FORMAT_G16R16_SINT,
205         PVRSRV_PIXEL_FORMAT_G16R16_SNORM,
206
207         PVRSRV_PIXEL_FORMAT_R16,
208         PVRSRV_PIXEL_FORMAT_R16F,
209         PVRSRV_PIXEL_FORMAT_R16_UINT,
210         PVRSRV_PIXEL_FORMAT_R16_UNORM,
211         PVRSRV_PIXEL_FORMAT_R16_SINT,
212         PVRSRV_PIXEL_FORMAT_R16_SNORM,
213
214         PVRSRV_PIXEL_FORMAT_A8B8G8R8,
215         PVRSRV_PIXEL_FORMAT_A8B8G8R8_UINT,
216         PVRSRV_PIXEL_FORMAT_A8B8G8R8_UNORM,
217         PVRSRV_PIXEL_FORMAT_A8B8G8R8_SINT,
218         PVRSRV_PIXEL_FORMAT_A8B8G8R8_SNORM,
219
220         PVRSRV_PIXEL_FORMAT_G8R8,
221         PVRSRV_PIXEL_FORMAT_G8R8_UINT,
222         PVRSRV_PIXEL_FORMAT_G8R8_UNORM,
223         PVRSRV_PIXEL_FORMAT_G8R8_SINT,
224         PVRSRV_PIXEL_FORMAT_G8R8_SNORM,
225
226         PVRSRV_PIXEL_FORMAT_A8,
227         PVRSRV_PIXEL_FORMAT_R8,
228         PVRSRV_PIXEL_FORMAT_R8_UINT,
229         PVRSRV_PIXEL_FORMAT_R8_UNORM,
230         PVRSRV_PIXEL_FORMAT_R8_SINT,
231         PVRSRV_PIXEL_FORMAT_R8_SNORM,
232
233         PVRSRV_PIXEL_FORMAT_A2B10G10R10,
234         PVRSRV_PIXEL_FORMAT_A2B10G10R10_UNORM,
235         PVRSRV_PIXEL_FORMAT_A2B10G10R10_UINT,
236
237         PVRSRV_PIXEL_FORMAT_B10G11R11,
238         PVRSRV_PIXEL_FORMAT_B10G11R11F,
239
240         PVRSRV_PIXEL_FORMAT_X24G8R32,
241         PVRSRV_PIXEL_FORMAT_G8R24,
242         PVRSRV_PIXEL_FORMAT_E5B9G9R9,
243         PVRSRV_PIXEL_FORMAT_R1,
244
245         PVRSRV_PIXEL_FORMAT_BC1,
246         PVRSRV_PIXEL_FORMAT_BC1_UNORM,
247         PVRSRV_PIXEL_FORMAT_BC1_SRGB,
248         PVRSRV_PIXEL_FORMAT_BC2,
249         PVRSRV_PIXEL_FORMAT_BC2_UNORM,
250         PVRSRV_PIXEL_FORMAT_BC2_SRGB,
251         PVRSRV_PIXEL_FORMAT_BC3,
252         PVRSRV_PIXEL_FORMAT_BC3_UNORM,
253         PVRSRV_PIXEL_FORMAT_BC3_SRGB,
254         PVRSRV_PIXEL_FORMAT_BC4,
255         PVRSRV_PIXEL_FORMAT_BC4_UNORM,
256         PVRSRV_PIXEL_FORMAT_BC4_SNORM,
257         PVRSRV_PIXEL_FORMAT_BC5,
258         PVRSRV_PIXEL_FORMAT_BC5_UNORM,
259         PVRSRV_PIXEL_FORMAT_BC5_SNORM,
260
261         PVRSRV_PIXEL_FORMAT_FORCE_I32 = 0x7fffffff,
262 };
263
264 enum PVRSRV_ALPHA_FORMAT {
265         PVRSRV_ALPHA_FORMAT_UNKNOWN = 0x00000000,
266         PVRSRV_ALPHA_FORMAT_PRE = 0x00000001,
267         PVRSRV_ALPHA_FORMAT_NONPRE = 0x00000002,
268         PVRSRV_ALPHA_FORMAT_MASK = 0x0000000F,
269 };
270
271 enum PVRSRV_COLOURSPACE_FORMAT {
272         PVRSRV_COLOURSPACE_FORMAT_UNKNOWN = 0x00000000,
273         PVRSRV_COLOURSPACE_FORMAT_LINEAR = 0x00010000,
274         PVRSRV_COLOURSPACE_FORMAT_NONLINEAR = 0x00020000,
275         PVRSRV_COLOURSPACE_FORMAT_MASK = 0x000F0000,
276 };
277
278 enum PVRSRV_ROTATION {
279         PVRSRV_ROTATE_0 = 0,
280         PVRSRV_ROTATE_90 = 1,
281         PVRSRV_ROTATE_180 = 2,
282         PVRSRV_ROTATE_270 = 3,
283         PVRSRV_FLIP_Y
284 };
285
286 #define PVRSRV_CREATE_SWAPCHAIN_SHARED          (1<<0)
287 #define PVRSRV_CREATE_SWAPCHAIN_QUERY           (1<<1)
288 #define PVRSRV_CREATE_SWAPCHAIN_OEMOVERLAY      (1<<2)
289
290 struct PVRSRV_SYNC_DATA {
291
292         u32 ui32WriteOpsPending;
293         volatile u32 ui32WriteOpsComplete;
294
295         u32 ui32ReadOpsPending;
296         volatile u32 ui32ReadOpsComplete;
297
298         u32 ui32LastOpDumpVal;
299         u32 ui32LastReadOpDumpVal;
300
301 };
302
303 struct PVRSRV_CLIENT_SYNC_INFO {
304         struct PVRSRV_SYNC_DATA *psSyncData;
305         struct IMG_DEV_VIRTADDR sWriteOpsCompleteDevVAddr;
306         struct IMG_DEV_VIRTADDR sReadOpsCompleteDevVAddr;
307         void *hMappingInfo;
308         void *hKernelSyncInfo;
309 };
310
311 struct PVRSRV_RESOURCE {
312         volatile u32 ui32Lock;
313         u32 ui32ID;
314 };
315
316 struct IMG_RECT {
317         s32 x0;
318         s32 y0;
319         s32 x1;
320         s32 y1;
321 };
322
323 struct IMG_RECT_16 {
324         s16 x0;
325         s16 y0;
326         s16 x1;
327         s16 y1;
328 };
329
330 struct DISPLAY_DIMS {
331         u32 ui32ByteStride;
332         u32 ui32Width;
333         u32 ui32Height;
334 };
335
336 struct DISPLAY_FORMAT {
337         enum PVRSRV_PIXEL_FORMAT pixelformat;
338 };
339
340 struct DISPLAY_SURF_ATTRIBUTES {
341         enum PVRSRV_PIXEL_FORMAT pixelformat;
342         struct DISPLAY_DIMS sDims;
343 };
344
345 struct DISPLAY_MODE_INFO {
346         enum PVRSRV_PIXEL_FORMAT pixelformat;
347         struct DISPLAY_DIMS sDims;
348         u32 ui32RefreshHZ;
349         u32 ui32OEMFlags;
350 };
351
352 #define MAX_DISPLAY_NAME_SIZE   (50)
353
354 struct DISPLAY_INFO {
355         u32 ui32MaxSwapChains;
356         u32 ui32MaxSwapChainBuffers;
357         u32 ui32MinSwapInterval;
358         u32 ui32MaxSwapInterval;
359         char szDisplayName[MAX_DISPLAY_NAME_SIZE];
360 };
361
362 struct ACCESS_INFO {
363         u32 ui32Size;
364         u32 ui32FBPhysBaseAddress;
365         u32 ui32FBMemAvailable;
366         u32 ui32SysPhysBaseAddress;
367         u32 ui32SysSize;
368         u32 ui32DevIRQ;
369 };
370
371 struct PVRSRV_CURSOR_SHAPE {
372         u16 ui16Width;
373         u16 ui16Height;
374         s16 i16XHot;
375         s16 i16YHot;
376
377         void *pvMask;
378         s16 i16MaskByteStride;
379
380         void *pvColour;
381         s16 i16ColourByteStride;
382         enum PVRSRV_PIXEL_FORMAT eColourPixelFormat;
383 };
384
385 #define PVRSRV_SET_CURSOR_VISIBILITY    (1<<0)
386 #define PVRSRV_SET_CURSOR_POSITION              (1<<1)
387 #define PVRSRV_SET_CURSOR_SHAPE                 (1<<2)
388 #define PVRSRV_SET_CURSOR_ROTATION              (1<<3)
389
390 struct PVRSRV_CURSOR_INFO {
391         u32 ui32Flags;
392         IMG_BOOL bVisible;
393         s16 i16XPos;
394         s16 i16YPos;
395         struct PVRSRV_CURSOR_SHAPE sCursorShape;
396         u32 ui32Rotation;
397 };
398
399 struct PVRSRV_REGISTRY_INFO {
400         u32 ui32DevCookie;
401         char *pszKey;
402         char *pszValue;
403         char *pszBuf;
404         u32 ui32BufSize;
405 };
406
407 enum PVRSRV_ERROR PVRSRVReadRegistryString(
408                                 struct PVRSRV_REGISTRY_INFO *psRegInfo);
409 enum PVRSRV_ERROR PVRSRVWriteRegistryString(
410                                 struct PVRSRV_REGISTRY_INFO *psRegInfo);
411
412 #define PVRSRV_BC_FLAGS_YUVCSC_CONFORMANT_RANGE (0 << 0)
413 #define PVRSRV_BC_FLAGS_YUVCSC_FULL_RANGE               (1 << 0)
414
415 #define PVRSRV_BC_FLAGS_YUVCSC_BT601                    (0 << 1)
416 #define PVRSRV_BC_FLAGS_YUVCSC_BT709                    (1 << 1)
417
418 struct BUFFER_INFO {
419         u32 ui32BufferCount;
420         u32 ui32BufferDeviceID;
421         enum PVRSRV_PIXEL_FORMAT pixelformat;
422         u32 ui32ByteStride;
423         u32 ui32Width;
424         u32 ui32Height;
425         u32 ui32Flags;
426 };
427
428 enum OVERLAY_DEINTERLACE_MODE {
429         WEAVE = 0x0,
430         BOB_ODD,
431         BOB_EVEN,
432         BOB_EVEN_NONINTERLEAVED
433 };
434
435 #endif