1 /**********************************************************************
3 * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful but, except
10 * as otherwise stated in writing, without any warranty; without even the
11 * implied warranty of merchantability or fitness for a particular purpose.
12 * See the GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * Imagination Technologies Ltd. <gpl-support@imgtec.com>
23 * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
25 ******************************************************************************/
28 #include <asm/atomic.h>
31 #include "services_headers.h"
33 #include "pvrversion.h"
34 #include "pvr_debug.h"
40 #include <linux/tty.h>
43 * There is no sense in having SGX_MMU_PAGE_SIZE differ from PAGE_SIZE.
44 * Especially the calculations in this file, while obviously an attempt to work
45 * around possibly differing host and gpu page sizes, are impossible when
46 * page size is not the same everywhere.
48 #if PAGE_SIZE != SGX_MMU_PAGE_SIZE
49 #error Host page size differs from GPU page size!
52 #define DEBUG_CAPMODE_FRAMED 0x00000001
53 #define DEBUG_CAPMODE_CONTINUOUS 0x00000002
54 #define DEBUG_CAPMODE_HOTKEY 0x00000004
55 #define DEBUG_CAPMODE_POSTMORTEM 0x00000008
57 #define DEBUG_OUTMODE_STREAMENABLE 0x00000004
63 IMG_BOOL bInitPhaseComplete;
66 static atomic_t gsPDumpSuspended = ATOMIC_INIT(0);
68 #define PDUMP_STREAM_PARAM2 0
69 #define PDUMP_STREAM_SCRIPT2 1
70 #define PDUMP_NUM_STREAMS 2
72 static char *pszStreamName[PDUMP_NUM_STREAMS] = { "ParamStream2",
76 static struct DBG_STREAM *gpsStream[PDUMP_NUM_STREAMS] = {NULL};
78 #define SZ_COMMENT_SIZE_MAX PVRSRV_PDUMP_MAX_COMMENT_SIZE
79 #define SZ_SCRIPT_SIZE_MAX (SZ_COMMENT_SIZE_MAX + 5)
80 #define SZ_FILENAME_SIZE_MAX SZ_COMMENT_SIZE_MAX
81 static char *gpszComment;
82 static char *gpszScript;
83 static char *gpszFile;
85 void PDumpSuspendKM(void)
87 atomic_inc(&gsPDumpSuspended);
90 void PDumpResumeKM(void)
92 atomic_dec(&gsPDumpSuspended);
95 static inline IMG_BOOL PDumpSuspended(void)
97 return atomic_read(&gsPDumpSuspended) != 0;
101 * empty pdump backend.
104 DbgDrvCreateStream(char *pszName, u32 ui32CapMode, u32 ui32OutMode,
105 u32 ui32Flags, u32 ui32Pages)
111 DbgDrvDestroyStream(struct DBG_STREAM *psStream)
117 DbgDrvSetCaptureMode(struct DBG_STREAM *psStream, u32 ui32CapMode,
118 u32 ui32Start, u32 ui32Stop, u32 ui32SampleRate)
124 DbgDrvSetFrame(struct DBG_STREAM *psStream, u32 ui32Frame)
130 DbgDrvDBGDrivWrite2(struct DBG_STREAM *psStream, u8 *pui8InBuf,
131 u32 ui32InBuffSize, u32 ui32Level)
137 DbgDrvWriteBINCM(struct DBG_STREAM *psStream, u8 *pui8InBuf,
138 u32 ui32InBuffSize, u32 ui32Level)
144 DbgDrvIsCaptureFrame(struct DBG_STREAM *psStream, IMG_BOOL bCheckPreviousFrame)
149 static enum PVRSRV_ERROR
150 pdump_write(struct DBG_STREAM *psStream, void *pui8Data, u32 ui32Count,
153 if (!psStream) /* will always hit with the empty backend. */
156 if (PDumpSuspended() || (ui32Flags & PDUMP_FLAGS_NEVER))
159 if (ui32Flags & PDUMP_FLAGS_CONTINUOUS) {
160 if ((psStream->ui32CapMode & DEBUG_CAPMODE_FRAMED) &&
161 (psStream->ui32Start == 0xFFFFFFFF) &&
162 (psStream->ui32End == 0xFFFFFFFF) &&
163 psStream->bInitPhaseComplete)
166 DbgDrvDBGDrivWrite2(psStream, pui8Data,
169 DbgDrvWriteBINCM(psStream, pui8Data, ui32Count, 1);
171 /* placeholder, will get proper error handling later. */
176 pdump_print(u32 flags, char *pszFormat, ...)
180 va_start(ap, pszFormat);
181 vsnprintf(gpszScript, SZ_SCRIPT_SIZE_MAX, pszFormat, ap);
184 (void) pdump_write(gpsStream[PDUMP_STREAM_SCRIPT2],
185 gpszScript, strlen(gpszScript), flags);
188 void PDumpCommentKM(char *pszComment, u32 ui32Flags)
190 int len = strlen(pszComment);
192 if ((len > 1) && (pszComment[len - 1] == '\n'))
193 pszComment[len - 1] = 0;
195 if ((len > 2) && (pszComment[len - 2] == '\r'))
196 pszComment[len - 2] = 0;
198 pdump_print(ui32Flags, "-- %s\r\n", pszComment);
201 void PDumpComment(char *pszFormat, ...)
205 va_start(ap, pszFormat);
206 vsnprintf(gpszComment, SZ_COMMENT_SIZE_MAX, pszFormat, ap);
209 PDumpCommentKM(gpszComment, PDUMP_FLAGS_CONTINUOUS);
212 void PDumpCommentWithFlags(u32 ui32Flags, char *pszFormat, ...)
216 va_start(ap, pszFormat);
217 vsnprintf(gpszComment, SZ_COMMENT_SIZE_MAX, pszFormat, ap);
220 PDumpCommentKM(gpszComment, ui32Flags);
223 void PDumpSetFrameKM(u32 ui32Frame)
227 if (PDumpSuspended())
230 for (ui32Stream = 0; ui32Stream < PDUMP_NUM_STREAMS; ui32Stream++)
231 if (gpsStream[ui32Stream])
232 DbgDrvSetFrame(gpsStream[ui32Stream], ui32Frame);
235 IMG_BOOL PDumpIsCaptureFrameKM(void)
237 if (PDumpSuspended())
239 return DbgDrvIsCaptureFrame(gpsStream[PDUMP_STREAM_SCRIPT2],
248 if (OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
249 SZ_FILENAME_SIZE_MAX,
255 if (OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
257 (void **)&gpszComment,
262 if (OSAllocMem(PVRSRV_OS_PAGEABLE_HEAP,
264 (void **)&gpszScript,
268 for (i = 0; i < PDUMP_NUM_STREAMS; i++) {
270 DbgDrvCreateStream(pszStreamName[i],
271 DEBUG_CAPMODE_FRAMED,
272 DEBUG_OUTMODE_STREAMENABLE,
275 DbgDrvSetCaptureMode(gpsStream[i],
276 DEBUG_CAPMODE_FRAMED,
277 0xFFFFFFFF, 0xFFFFFFFF, 1);
278 DbgDrvSetFrame(gpsStream[i], 0);
281 PDumpComment("Driver Product Name: %s", VS_PRODUCT_NAME);
282 PDumpComment("Driver Product Version: %s (%s)",
283 PVRVERSION_STRING, PVRVERSION_FILE);
284 PDumpComment("Start of Init Phase");
291 OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP, SZ_FILENAME_SIZE_MAX,
292 (void *)gpszFile, NULL);
297 OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP, SZ_SCRIPT_SIZE_MAX,
298 (void *)gpszScript, NULL);
303 OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP, SZ_COMMENT_SIZE_MAX,
304 (void *)gpszComment, NULL);
309 void PDumpDeInit(void)
313 for (i = 0; i < PDUMP_NUM_STREAMS; i++)
314 DbgDrvDestroyStream(gpsStream[i]);
317 OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP, SZ_FILENAME_SIZE_MAX,
318 (void *)gpszFile, NULL);
323 OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP, SZ_SCRIPT_SIZE_MAX,
324 (void *)gpszScript, NULL);
329 OSFreeMem(PVRSRV_OS_PAGEABLE_HEAP, SZ_COMMENT_SIZE_MAX,
330 (void *)gpszComment, NULL);
335 void PDumpRegWithFlagsKM(u32 ui32Reg, u32 ui32Data, u32 ui32Flags)
337 pdump_print(ui32Flags,
338 "WRW :SGXREG:0x%8.8X 0x%8.8X\r\n", ui32Reg, ui32Data);
341 void PDumpReg(u32 ui32Reg, u32 ui32Data)
343 PDumpRegWithFlagsKM(ui32Reg, ui32Data, PDUMP_FLAGS_CONTINUOUS);
346 void PDumpRegPolWithFlagsKM(u32 ui32RegAddr, u32 ui32RegValue,
347 u32 ui32Mask, u32 ui32Flags)
349 #define POLL_DELAY 1000
350 #define POLL_COUNT_LONG (2000000000 / POLL_DELAY)
351 #define POLL_COUNT_SHORT (1000000 / POLL_DELAY)
355 if ((ui32RegAddr == EUR_CR_EVENT_STATUS) &&
356 ((ui32RegValue & ui32Mask) &
357 (EUR_CR_EVENT_STATUS_TA_FINISHED_MASK |
358 EUR_CR_EVENT_STATUS_PIXELBE_END_RENDER_MASK |
359 EUR_CR_EVENT_STATUS_DPM_3D_MEM_FREE_MASK)))
360 ui32PollCount = POLL_COUNT_LONG;
362 ui32PollCount = POLL_COUNT_SHORT;
364 pdump_print(ui32Flags,
365 "POL :SGXREG:0x%8.8X 0x%8.8X 0x%8.8X %d %u %d\r\n",
366 ui32RegAddr, ui32RegValue, ui32Mask, 0, ui32PollCount,
370 void PDumpRegPolKM(u32 ui32RegAddr, u32 ui32RegValue, u32 ui32Mask)
372 PDumpRegPolWithFlagsKM(ui32RegAddr, ui32RegValue, ui32Mask,
373 PDUMP_FLAGS_CONTINUOUS);
376 void PDumpMallocPages(enum PVRSRV_DEVICE_TYPE eDeviceType, u32 ui32DevVAddr,
377 void *pvLinAddr, void *hOSMemHandle, u32 ui32NumBytes,
380 struct IMG_CPU_PHYADDR sCpuPAddr;
381 struct IMG_DEV_PHYADDR sDevPAddr;
384 PVR_UNREFERENCED_PARAMETER(pvLinAddr);
386 PVR_ASSERT(((u32) ui32DevVAddr & ~PAGE_MASK) == 0);
387 PVR_ASSERT(hOSMemHandle);
388 PVR_ASSERT(((u32) ui32NumBytes & ~PAGE_MASK) == 0);
390 PDumpComment("MALLOC :SGXMEM:VA_%8.8X 0x%8.8X %u\r\n",
391 ui32DevVAddr, ui32NumBytes, PAGE_SIZE);
393 for (ui32Offset = 0; ui32Offset < ui32NumBytes;
394 ui32Offset += PAGE_SIZE) {
395 sCpuPAddr = OSMemHandleToCpuPAddr(hOSMemHandle, ui32Offset);
396 PVR_ASSERT((sCpuPAddr.uiAddr & ~PAGE_MASK) == 0);
397 sDevPAddr = SysCpuPAddrToDevPAddr(eDeviceType, sCpuPAddr);
399 pdump_print(PDUMP_FLAGS_CONTINUOUS,
400 "MALLOC :SGXMEM:PA_%8.8X%8.8X %u %u 0x%8.8X\r\n",
401 (u32)hUniqueTag, sDevPAddr.uiAddr & PAGE_MASK,
402 PAGE_SIZE, PAGE_SIZE, sDevPAddr.uiAddr & PAGE_MASK);
406 void PDumpMallocPageTable(enum PVRSRV_DEVICE_TYPE eDeviceType,
407 void *pvLinAddr, void *hUniqueTag)
409 struct IMG_CPU_PHYADDR sCpuPAddr;
410 struct IMG_DEV_PHYADDR sDevPAddr;
412 PVR_ASSERT(((u32) pvLinAddr & ~PAGE_MASK) == 0);
414 PDumpComment("MALLOC :SGXMEM:PAGE_TABLE 0x%8.8X %lu\r\n",
415 PAGE_SIZE, PAGE_SIZE);
417 sCpuPAddr = OSMapLinToCPUPhys(pvLinAddr);
418 sDevPAddr = SysCpuPAddrToDevPAddr(eDeviceType, sCpuPAddr);
420 pdump_print(PDUMP_FLAGS_CONTINUOUS, "MALLOC :SGXMEM:PA_%8.8X%8.8lX "
421 "0x%lX %lu 0x%8.8lX\r\n", (u32)hUniqueTag,
422 sDevPAddr.uiAddr & PAGE_MASK, PAGE_SIZE, PAGE_SIZE,
423 sDevPAddr.uiAddr & PAGE_MASK);
426 void PDumpFreePages(struct BM_HEAP *psBMHeap, struct IMG_DEV_VIRTADDR sDevVAddr,
427 u32 ui32NumBytes, void *hUniqueTag, IMG_BOOL bInterleaved)
429 struct IMG_DEV_PHYADDR sDevPAddr;
430 struct PVRSRV_DEVICE_NODE *psDeviceNode =
431 psBMHeap->pBMContext->psDeviceNode;
434 PVR_ASSERT(((u32) sDevVAddr.uiAddr & ~PAGE_MASK) == 0);
435 PVR_ASSERT(((u32) ui32NumBytes & ~PAGE_MASK) == 0);
437 PDumpComment("FREE :SGXMEM:VA_%8.8X\r\n", sDevVAddr.uiAddr);
439 for (i = 0; (i * PAGE_SIZE) < ui32NumBytes; i++) {
440 if (!bInterleaved || (i % 2) == 0) {
442 psDeviceNode->pfnMMUGetPhysPageAddr(psBMHeap->
445 pdump_print(PDUMP_FLAGS_CONTINUOUS,
446 "FREE :SGXMEM:PA_%8.8X%8.8X\r\n",
447 (u32)hUniqueTag, sDevPAddr.uiAddr);
450 sDevVAddr.uiAddr += PAGE_SIZE;
454 void PDumpFreePageTable(enum PVRSRV_DEVICE_TYPE eDeviceType,
455 void *pvLinAddr, void *hUniqueTag)
457 struct IMG_CPU_PHYADDR sCpuPAddr;
458 struct IMG_DEV_PHYADDR sDevPAddr;
460 PVR_ASSERT(((u32) pvLinAddr & ~PAGE_MASK) == 0);
462 PDumpComment("FREE :SGXMEM:PAGE_TABLE\r\n");
464 sCpuPAddr = OSMapLinToCPUPhys(pvLinAddr);
465 sDevPAddr = SysCpuPAddrToDevPAddr(eDeviceType, sCpuPAddr);
467 pdump_print(PDUMP_FLAGS_CONTINUOUS, "FREE :SGXMEM:PA_%8.8X%8.8lX\r\n",
468 (u32)hUniqueTag, sDevPAddr.uiAddr & PAGE_MASK);
471 void PDumpPDRegWithFlags(u32 ui32Reg, u32 ui32Data, u32 ui32Flags,
474 pdump_print(ui32Flags,
475 "WRW :SGXREG:0x%8.8X :SGXMEM:PA_%8.8X%8.8lX:0x%8.8lX\r\n",
476 ui32Reg, (u32)hUniqueTag,
477 ui32Data & PAGE_MASK,
478 ui32Data & ~PAGE_MASK);
481 void PDumpPDReg(u32 ui32Reg, u32 ui32Data, void *hUniqueTag)
483 PDumpPDRegWithFlags(ui32Reg, ui32Data, PDUMP_FLAGS_CONTINUOUS,
487 void PDumpMemPolKM(struct PVRSRV_KERNEL_MEM_INFO *psMemInfo,
488 u32 ui32Offset, u32 ui32Value, u32 ui32Mask,
489 enum PDUMP_POLL_OPERATOR eOperator, void *hUniqueTag)
491 #define MEMPOLL_DELAY (1000)
492 #define MEMPOLL_COUNT (2000000000 / MEMPOLL_DELAY)
495 struct IMG_DEV_PHYADDR sDevPAddr;
496 struct IMG_DEV_VIRTADDR sDevVPageAddr;
497 struct IMG_CPU_PHYADDR CpuPAddr;
499 PVR_ASSERT((ui32Offset + sizeof(u32)) <=
500 psMemInfo->ui32AllocSize);
503 OSMemHandleToCpuPAddr(psMemInfo->sMemBlk.hOSMemHandle, ui32Offset);
504 ui32PageOffset = CpuPAddr.uiAddr & ~PAGE_MASK;
506 sDevVPageAddr.uiAddr =
507 psMemInfo->sDevVAddr.uiAddr + ui32Offset - ui32PageOffset;
509 BM_GetPhysPageAddr(psMemInfo, sDevVPageAddr, &sDevPAddr);
511 sDevPAddr.uiAddr += ui32PageOffset;
513 pdump_print(0, "POL :SGXMEM:PA_%8.8X%8.8lX:0x%8.8lX 0x%8.8X "
514 "0x%8.8X %d %d %d\r\n", (u32)hUniqueTag,
515 sDevPAddr.uiAddr & PAGE_MASK,
516 sDevPAddr.uiAddr & ~PAGE_MASK,
517 ui32Value, ui32Mask, eOperator,
518 MEMPOLL_COUNT, MEMPOLL_DELAY);
522 PDumpMemKM(void *pvAltLinAddr, struct PVRSRV_KERNEL_MEM_INFO *psMemInfo,
523 u32 ui32Offset, u32 ui32Bytes, u32 ui32Flags, void *hUniqueTag)
525 struct IMG_DEV_VIRTADDR sDevVPageAddr;
526 struct IMG_DEV_PHYADDR sDevPAddr;
527 struct IMG_CPU_PHYADDR CpuPAddr;
529 enum PVRSRV_ERROR eError;
531 PVR_ASSERT((ui32Offset + ui32Bytes) <= psMemInfo->ui32AllocSize);
534 return PVRSRV_ERROR_GENERIC;
537 eError = pdump_write(gpsStream[PDUMP_STREAM_PARAM2],
538 pvAltLinAddr, ui32Bytes, ui32Flags);
539 else if (psMemInfo->pvLinAddrKM)
540 eError = pdump_write(gpsStream[PDUMP_STREAM_PARAM2],
541 psMemInfo->pvLinAddrKM + ui32Offset,
542 ui32Bytes, ui32Flags);
544 return PVRSRV_ERROR_GENERIC;
546 if (eError != PVRSRV_OK)
549 PDumpCommentWithFlags(ui32Flags, "LDB :SGXMEM:VA_%8.8X:0x%8.8X "
551 psMemInfo->sDevVAddr.uiAddr, ui32Offset,
555 OSMemHandleToCpuPAddr(psMemInfo->sMemBlk.hOSMemHandle, ui32Offset);
556 ui32PageOffset = CpuPAddr.uiAddr & ~PAGE_MASK;
560 min(ui32Bytes, (u32)PAGE_SIZE - ui32PageOffset);
562 sDevVPageAddr.uiAddr =
563 psMemInfo->sDevVAddr.uiAddr + ui32Offset -
566 BM_GetPhysPageAddr(psMemInfo, sDevVPageAddr, &sDevPAddr);
568 sDevPAddr.uiAddr += ui32PageOffset;
570 pdump_print(ui32Flags, "LDB :SGXMEM:PA_%8.8X%8.8lX:0x%8.8lX"
571 " 0x%8.8X\r\n", (u32) hUniqueTag,
572 sDevPAddr.uiAddr & PAGE_MASK,
573 sDevPAddr.uiAddr & ~PAGE_MASK,
577 ui32Bytes -= ui32BlockBytes;
578 ui32Offset += ui32BlockBytes;
585 PDumpMem2KM(enum PVRSRV_DEVICE_TYPE eDeviceType, void *pvLinAddr,
586 u32 ui32Bytes, u32 ui32Flags, IMG_BOOL bInitialisePages,
587 void *hUniqueTag1, void *hUniqueTag2)
589 struct IMG_DEV_PHYADDR sDevPAddr;
590 struct IMG_CPU_PHYADDR sCpuPAddr;
592 enum PVRSRV_ERROR eError;
595 return PVRSRV_ERROR_GENERIC;
597 if (bInitialisePages) {
598 eError = pdump_write(gpsStream[PDUMP_STREAM_PARAM2], pvLinAddr,
599 ui32Bytes, PDUMP_FLAGS_CONTINUOUS);
600 if (eError != PVRSRV_OK)
604 ui32PageOffset = (u32)pvLinAddr & ~PAGE_MASK;
608 min(ui32Bytes, (u32)PAGE_SIZE - ui32PageOffset);
610 sCpuPAddr = OSMapLinToCPUPhys(pvLinAddr);
611 sDevPAddr = SysCpuPAddrToDevPAddr(eDeviceType, sCpuPAddr);
613 if (bInitialisePages) {
614 pdump_print(PDUMP_FLAGS_CONTINUOUS, "LDB :SGXMEM:"
615 "PA_%8.8X%8.8lX:0x%8.8lX 0x%8.8X\r\n",
617 sDevPAddr.uiAddr & PAGE_MASK,
618 sDevPAddr.uiAddr & ~PAGE_MASK,
623 for (ui32Offset = 0; ui32Offset < ui32BlockBytes;
624 ui32Offset += sizeof(u32)) {
626 *((u32 *)(pvLinAddr + ui32Offset));
628 if ((ui32PTE & PAGE_MASK) != 0) {
629 pdump_print(PDUMP_FLAGS_CONTINUOUS,
630 "WRW :SGXMEM:PA_%8.8X%8.8lX:0x%8.8lX :SGXMEM:PA_%8.8X%8.8lX:0x%8.8lX\r\n",
632 sDevPAddr.uiAddr & PAGE_MASK,
633 sDevPAddr.uiAddr & ~PAGE_MASK,
636 ui32PTE & ~PAGE_MASK);
641 pdump_print(PDUMP_FLAGS_CONTINUOUS,
642 "WRW :SGXMEM:PA_%8.8X%8.8lX:0x%8.8lX 0x%8.8X%8.8X\r\n",
644 sDevPAddr.uiAddr & PAGE_MASK,
645 sDevPAddr.uiAddr & ~PAGE_MASK,
646 ui32PTE, (u32)hUniqueTag2);
649 sDevPAddr.uiAddr += sizeof(u32);
654 ui32Bytes -= ui32BlockBytes;
655 pvLinAddr += ui32BlockBytes;
662 PDumpPDDevPAddrKM(struct PVRSRV_KERNEL_MEM_INFO *psMemInfo,
663 u32 ui32Offset, struct IMG_DEV_PHYADDR sPDDevPAddr,
664 void *hUniqueTag1, void *hUniqueTag2)
666 struct IMG_CPU_PHYADDR CpuPAddr;
667 struct IMG_DEV_VIRTADDR sDevVPageAddr;
668 struct IMG_DEV_PHYADDR sDevPAddr;
672 OSMemHandleToCpuPAddr(psMemInfo->sMemBlk.hOSMemHandle, ui32Offset);
673 ui32PageOffset = CpuPAddr.uiAddr & ~PAGE_MASK;
675 sDevVPageAddr.uiAddr =
676 psMemInfo->sDevVAddr.uiAddr + ui32Offset - ui32PageOffset;
677 BM_GetPhysPageAddr(psMemInfo, sDevVPageAddr, &sDevPAddr);
678 sDevPAddr.uiAddr += ui32PageOffset;
680 if ((sPDDevPAddr.uiAddr & PAGE_MASK) != 0) {
681 pdump_print(PDUMP_FLAGS_CONTINUOUS,
682 "WRW :SGXMEM:PA_%8.8X%8.8lX:0x%8.8lX :SGXMEM:PA_%8.8X%8.8lX:0x%8.8lX\r\n",
684 sDevPAddr.uiAddr & PAGE_MASK,
685 sDevPAddr.uiAddr & ~PAGE_MASK,
687 sPDDevPAddr.uiAddr & PAGE_MASK,
688 sPDDevPAddr.uiAddr & ~PAGE_MASK);
690 PVR_ASSERT(!(sDevPAddr.uiAddr & SGX_MMU_PTE_VALID));
691 pdump_print(PDUMP_FLAGS_CONTINUOUS,
692 "WRW :SGXMEM:PA_%8.8X%8.8lX:0x%8.8lX 0x%8.8X\r\n",
694 sDevPAddr.uiAddr & PAGE_MASK,
695 sDevPAddr.uiAddr & ~PAGE_MASK,
700 void PDumpBitmapKM(char *pszFileName, u32 ui32FileOffset,
701 u32 ui32Width, u32 ui32Height, u32 ui32StrideInBytes,
702 struct IMG_DEV_VIRTADDR sDevBaseAddr,
703 u32 ui32Size, enum PDUMP_PIXEL_FORMAT ePixelFormat,
704 enum PDUMP_MEM_FORMAT eMemFormat, u32 ui32PDumpFlags)
706 PDumpCommentWithFlags(ui32PDumpFlags, "Dump bitmap of render\r\n");
708 pdump_print(ui32PDumpFlags,
709 "SII %s %s.bin :SGXMEM:v:0x%08X 0x%08X "
710 "0x%08X 0x%08X 0x%08X 0x%08X 0x%08X 0x%08X\r\n",
711 pszFileName, pszFileName, sDevBaseAddr.uiAddr, ui32Size,
712 ui32FileOffset, ePixelFormat, ui32Width, ui32Height,
713 ui32StrideInBytes, eMemFormat);
717 PDumpReadRegKM(char *pszFileName, u32 ui32FileOffset, u32 ui32Address)
719 pdump_print(0, "SAB :SGXREG:0x%08X 0x%08X %s\r\n",
720 ui32Address, ui32FileOffset, pszFileName);
723 void PDump3DSignatureRegisters(u32 ui32DumpFrameNum,
724 u32 *pui32Registers, u32 ui32NumRegisters)
728 PDumpCommentWithFlags(0, "Dump 3D signature registers\r\n");
729 snprintf(gpszFile, SZ_FILENAME_SIZE_MAX, "out%u_3d.sig",
732 for (i = 0; i < ui32NumRegisters; i++)
733 PDumpReadRegKM(gpszFile, i * sizeof(u32), pui32Registers[i]);
736 void PDumpCounterRegisters(u32 ui32DumpFrameNum,
737 u32 *pui32Registers, u32 ui32NumRegisters)
741 PDumpCommentWithFlags(0, "Dump counter registers\r\n");
742 snprintf(gpszFile, SZ_FILENAME_SIZE_MAX, "out%u.perf",
745 for (i = 0; i < ui32NumRegisters; i++)
746 PDumpReadRegKM(gpszFile, i * sizeof(u32), pui32Registers[i]);
749 void PDumpTASignatureRegisters(u32 ui32DumpFrameNum, u32 ui32TAKickCount,
750 u32 *pui32Registers, u32 ui32NumRegisters)
752 u32 i, ui32FileOffset;
754 PDumpCommentWithFlags(0, "Dump TA signature registers\r\n");
755 snprintf(gpszFile, SZ_FILENAME_SIZE_MAX, "out%u_ta.sig",
758 ui32FileOffset = ui32TAKickCount * ui32NumRegisters * sizeof(u32);
760 for (i = 0; i < ui32NumRegisters; i++)
761 PDumpReadRegKM(gpszFile, ui32FileOffset + i * sizeof(u32),
765 void PDumpRegRead(const u32 ui32RegOffset, u32 ui32Flags)
767 pdump_print(ui32Flags, "RDW :SGXREG:0x%X\r\n", ui32RegOffset);
770 void PDumpCycleCountRegRead(const u32 ui32RegOffset)
772 PDumpRegRead(ui32RegOffset, 0);
775 void PDumpHWPerfCBKM(char *pszFileName, u32 ui32FileOffset,
776 struct IMG_DEV_VIRTADDR sDevBaseAddr, u32 ui32Size,
779 PDumpCommentWithFlags(ui32PDumpFlags,
780 "Dump Hardware Performance Circular Buffer\r\n");
781 pdump_print(ui32PDumpFlags,
782 "SAB :SGXMEM:v:0x%08X 0x%08X 0x%08X %s.bin\r\n",
783 sDevBaseAddr.uiAddr, ui32Size, ui32FileOffset, pszFileName);
786 void PDumpCBP(struct PVRSRV_KERNEL_MEM_INFO *psROffMemInfo,
787 u32 ui32ROffOffset, u32 ui32WPosVal, u32 ui32PacketSize,
788 u32 ui32BufferSize, u32 ui32Flags, void *hUniqueTag)
790 struct IMG_DEV_PHYADDR sDevPAddr;
791 struct IMG_DEV_VIRTADDR sDevVPageAddr;
792 struct IMG_CPU_PHYADDR CpuPAddr;
795 PVR_ASSERT((ui32ROffOffset + sizeof(u32)) <=
796 psROffMemInfo->ui32AllocSize);
799 OSMemHandleToCpuPAddr(psROffMemInfo->sMemBlk.hOSMemHandle,
801 ui32PageOffset = CpuPAddr.uiAddr & ~PAGE_MASK;
803 sDevVPageAddr.uiAddr = psROffMemInfo->sDevVAddr.uiAddr +
804 ui32ROffOffset - ui32PageOffset;
805 BM_GetPhysPageAddr(psROffMemInfo, sDevVPageAddr, &sDevPAddr);
806 sDevPAddr.uiAddr += ui32PageOffset;
808 pdump_print(ui32Flags, "CBP :SGXMEM:PA_%8.8X%8.8lX:0x%8.8lX 0x%8.8X"
809 " 0x%8.8X 0x%8.8X\r\n", (u32) hUniqueTag,
810 sDevPAddr.uiAddr & PAGE_MASK,
811 sDevPAddr.uiAddr & ~PAGE_MASK,
812 ui32WPosVal, ui32PacketSize, ui32BufferSize);
815 void PDumpIDLWithFlags(u32 ui32Clocks, u32 ui32Flags)
817 pdump_print(ui32Flags, "IDL %u\r\n", ui32Clocks);