compat-wireless-2010-03-10
[pandora-wifi.git] / drivers / net / wireless / p54 / p54pci.c
1
2 /*
3  * Linux device driver for PCI based Prism54
4  *
5  * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
6  * Copyright (c) 2008, Christian Lamparter <chunkeey@web.de>
7  *
8  * Based on the islsm (softmac prism54) driver, which is:
9  * Copyright 2004-2006 Jean-Baptiste Note <jean-baptiste.note@m4x.org>, et al.
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License version 2 as
13  * published by the Free Software Foundation.
14  */
15
16 #include <linux/init.h>
17 #include <linux/pci.h>
18 #include <linux/firmware.h>
19 #include <linux/etherdevice.h>
20 #include <linux/delay.h>
21 #include <linux/completion.h>
22 #include <net/mac80211.h>
23
24 #include "p54.h"
25 #include "lmac.h"
26 #include "p54pci.h"
27
28 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
29 MODULE_DESCRIPTION("Prism54 PCI wireless driver");
30 MODULE_LICENSE("GPL");
31 MODULE_ALIAS("prism54pci");
32 MODULE_FIRMWARE("isl3886pci");
33
34 static DEFINE_PCI_DEVICE_TABLE(p54p_table) = {
35         /* Intersil PRISM Duette/Prism GT Wireless LAN adapter */
36         { PCI_DEVICE(0x1260, 0x3890) },
37         /* 3COM 3CRWE154G72 Wireless LAN adapter */
38         { PCI_DEVICE(0x10b7, 0x6001) },
39         /* Intersil PRISM Indigo Wireless LAN adapter */
40         { PCI_DEVICE(0x1260, 0x3877) },
41         /* Intersil PRISM Javelin/Xbow Wireless LAN adapter */
42         { PCI_DEVICE(0x1260, 0x3886) },
43         { },
44 };
45
46 MODULE_DEVICE_TABLE(pci, p54p_table);
47
48 static int p54p_upload_firmware(struct ieee80211_hw *dev)
49 {
50         struct p54p_priv *priv = dev->priv;
51         __le32 reg;
52         int err;
53         __le32 *data;
54         u32 remains, left, device_addr;
55
56         P54P_WRITE(int_enable, cpu_to_le32(0));
57         P54P_READ(int_enable);
58         udelay(10);
59
60         reg = P54P_READ(ctrl_stat);
61         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
62         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RAMBOOT);
63         P54P_WRITE(ctrl_stat, reg);
64         P54P_READ(ctrl_stat);
65         udelay(10);
66
67         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RESET);
68         P54P_WRITE(ctrl_stat, reg);
69         wmb();
70         udelay(10);
71
72         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
73         P54P_WRITE(ctrl_stat, reg);
74         wmb();
75
76         /* wait for the firmware to reset properly */
77         mdelay(10);
78
79         err = p54_parse_firmware(dev, priv->firmware);
80         if (err)
81                 return err;
82
83         if (priv->common.fw_interface != FW_LM86) {
84                 dev_err(&priv->pdev->dev, "wrong firmware, "
85                         "please get a LM86(PCI) firmware a try again.\n");
86                 return -EINVAL;
87         }
88
89         data = (__le32 *) priv->firmware->data;
90         remains = priv->firmware->size;
91         device_addr = ISL38XX_DEV_FIRMWARE_ADDR;
92         while (remains) {
93                 u32 i = 0;
94                 left = min((u32)0x1000, remains);
95                 P54P_WRITE(direct_mem_base, cpu_to_le32(device_addr));
96                 P54P_READ(int_enable);
97
98                 device_addr += 0x1000;
99                 while (i < left) {
100                         P54P_WRITE(direct_mem_win[i], *data++);
101                         i += sizeof(u32);
102                 }
103
104                 remains -= left;
105                 P54P_READ(int_enable);
106         }
107
108         reg = P54P_READ(ctrl_stat);
109         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_CLKRUN);
110         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
111         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RAMBOOT);
112         P54P_WRITE(ctrl_stat, reg);
113         P54P_READ(ctrl_stat);
114         udelay(10);
115
116         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RESET);
117         P54P_WRITE(ctrl_stat, reg);
118         wmb();
119         udelay(10);
120
121         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
122         P54P_WRITE(ctrl_stat, reg);
123         wmb();
124         udelay(10);
125
126         /* wait for the firmware to boot properly */
127         mdelay(100);
128
129         return 0;
130 }
131
132 static void p54p_refill_rx_ring(struct ieee80211_hw *dev,
133         int ring_index, struct p54p_desc *ring, u32 ring_limit,
134         struct sk_buff **rx_buf)
135 {
136         struct p54p_priv *priv = dev->priv;
137         struct p54p_ring_control *ring_control = priv->ring_control;
138         u32 limit, idx, i;
139
140         idx = le32_to_cpu(ring_control->host_idx[ring_index]);
141         limit = idx;
142         limit -= le32_to_cpu(ring_control->device_idx[ring_index]);
143         limit = ring_limit - limit;
144
145         i = idx % ring_limit;
146         while (limit-- > 1) {
147                 struct p54p_desc *desc = &ring[i];
148
149                 if (!desc->host_addr) {
150                         struct sk_buff *skb;
151                         dma_addr_t mapping;
152                         skb = dev_alloc_skb(priv->common.rx_mtu + 32);
153                         if (!skb)
154                                 break;
155
156                         mapping = pci_map_single(priv->pdev,
157                                                  skb_tail_pointer(skb),
158                                                  priv->common.rx_mtu + 32,
159                                                  PCI_DMA_FROMDEVICE);
160
161                         if (pci_dma_mapping_error(priv->pdev, mapping)) {
162                                 dev_kfree_skb_any(skb);
163                                 dev_err(&priv->pdev->dev,
164                                         "RX DMA Mapping error\n");
165                                 break;
166                         }
167
168                         desc->host_addr = cpu_to_le32(mapping);
169                         desc->device_addr = 0;  // FIXME: necessary?
170                         desc->len = cpu_to_le16(priv->common.rx_mtu + 32);
171                         desc->flags = 0;
172                         rx_buf[i] = skb;
173                 }
174
175                 i++;
176                 idx++;
177                 i %= ring_limit;
178         }
179
180         wmb();
181         ring_control->host_idx[ring_index] = cpu_to_le32(idx);
182 }
183
184 static void p54p_check_rx_ring(struct ieee80211_hw *dev, u32 *index,
185         int ring_index, struct p54p_desc *ring, u32 ring_limit,
186         struct sk_buff **rx_buf)
187 {
188         struct p54p_priv *priv = dev->priv;
189         struct p54p_ring_control *ring_control = priv->ring_control;
190         struct p54p_desc *desc;
191         u32 idx, i;
192
193         i = (*index) % ring_limit;
194         (*index) = idx = le32_to_cpu(ring_control->device_idx[ring_index]);
195         idx %= ring_limit;
196         while (i != idx) {
197                 u16 len;
198                 struct sk_buff *skb;
199                 desc = &ring[i];
200                 len = le16_to_cpu(desc->len);
201                 skb = rx_buf[i];
202
203                 if (!skb) {
204                         i++;
205                         i %= ring_limit;
206                         continue;
207                 }
208
209                 if (unlikely(len > priv->common.rx_mtu)) {
210                         if (net_ratelimit())
211                                 dev_err(&priv->pdev->dev, "rx'd frame size "
212                                         "exceeds length threshold.\n");
213
214                         len = priv->common.rx_mtu;
215                 }
216                 skb_put(skb, len);
217
218                 if (p54_rx(dev, skb)) {
219                         pci_unmap_single(priv->pdev,
220                                          le32_to_cpu(desc->host_addr),
221                                          priv->common.rx_mtu + 32,
222                                          PCI_DMA_FROMDEVICE);
223                         rx_buf[i] = NULL;
224                         desc->host_addr = 0;
225                 } else {
226                         skb_trim(skb, 0);
227                         desc->len = cpu_to_le16(priv->common.rx_mtu + 32);
228                 }
229
230                 i++;
231                 i %= ring_limit;
232         }
233
234         p54p_refill_rx_ring(dev, ring_index, ring, ring_limit, rx_buf);
235 }
236
237 static void p54p_check_tx_ring(struct ieee80211_hw *dev, u32 *index,
238         int ring_index, struct p54p_desc *ring, u32 ring_limit,
239         struct sk_buff **tx_buf)
240 {
241         struct p54p_priv *priv = dev->priv;
242         struct p54p_ring_control *ring_control = priv->ring_control;
243         struct p54p_desc *desc;
244         struct sk_buff *skb;
245         u32 idx, i;
246
247         i = (*index) % ring_limit;
248         (*index) = idx = le32_to_cpu(ring_control->device_idx[1]);
249         idx %= ring_limit;
250
251         while (i != idx) {
252                 desc = &ring[i];
253
254                 skb = tx_buf[i];
255                 tx_buf[i] = NULL;
256
257                 pci_unmap_single(priv->pdev, le32_to_cpu(desc->host_addr),
258                                  le16_to_cpu(desc->len), PCI_DMA_TODEVICE);
259
260                 desc->host_addr = 0;
261                 desc->device_addr = 0;
262                 desc->len = 0;
263                 desc->flags = 0;
264
265                 if (skb && FREE_AFTER_TX(skb))
266                         p54_free_skb(dev, skb);
267
268                 i++;
269                 i %= ring_limit;
270         }
271 }
272
273 static void p54p_tasklet(unsigned long dev_id)
274 {
275         struct ieee80211_hw *dev = (struct ieee80211_hw *)dev_id;
276         struct p54p_priv *priv = dev->priv;
277         struct p54p_ring_control *ring_control = priv->ring_control;
278
279         p54p_check_tx_ring(dev, &priv->tx_idx_mgmt, 3, ring_control->tx_mgmt,
280                            ARRAY_SIZE(ring_control->tx_mgmt),
281                            priv->tx_buf_mgmt);
282
283         p54p_check_tx_ring(dev, &priv->tx_idx_data, 1, ring_control->tx_data,
284                            ARRAY_SIZE(ring_control->tx_data),
285                            priv->tx_buf_data);
286
287         p54p_check_rx_ring(dev, &priv->rx_idx_mgmt, 2, ring_control->rx_mgmt,
288                 ARRAY_SIZE(ring_control->rx_mgmt), priv->rx_buf_mgmt);
289
290         p54p_check_rx_ring(dev, &priv->rx_idx_data, 0, ring_control->rx_data,
291                 ARRAY_SIZE(ring_control->rx_data), priv->rx_buf_data);
292
293         wmb();
294         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
295 }
296
297 static irqreturn_t p54p_interrupt(int irq, void *dev_id)
298 {
299         struct ieee80211_hw *dev = dev_id;
300         struct p54p_priv *priv = dev->priv;
301         __le32 reg;
302
303         reg = P54P_READ(int_ident);
304         if (unlikely(reg == cpu_to_le32(0xFFFFFFFF))) {
305                 goto out;
306         }
307         P54P_WRITE(int_ack, reg);
308
309         reg &= P54P_READ(int_enable);
310
311         if (reg & cpu_to_le32(ISL38XX_INT_IDENT_UPDATE))
312                 tasklet_schedule(&priv->tasklet);
313         else if (reg & cpu_to_le32(ISL38XX_INT_IDENT_INIT))
314                 complete(&priv->boot_comp);
315
316 out:
317         return reg ? IRQ_HANDLED : IRQ_NONE;
318 }
319
320 static void p54p_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
321 {
322         unsigned long flags;
323         struct p54p_priv *priv = dev->priv;
324         struct p54p_ring_control *ring_control = priv->ring_control;
325         struct p54p_desc *desc;
326         dma_addr_t mapping;
327         u32 device_idx, idx, i;
328
329         spin_lock_irqsave(&priv->lock, flags);
330         device_idx = le32_to_cpu(ring_control->device_idx[1]);
331         idx = le32_to_cpu(ring_control->host_idx[1]);
332         i = idx % ARRAY_SIZE(ring_control->tx_data);
333
334         mapping = pci_map_single(priv->pdev, skb->data, skb->len,
335                                  PCI_DMA_TODEVICE);
336         if (pci_dma_mapping_error(priv->pdev, mapping)) {
337                 spin_unlock_irqrestore(&priv->lock, flags);
338                 p54_free_skb(dev, skb);
339                 dev_err(&priv->pdev->dev, "TX DMA mapping error\n");
340                 return ;
341         }
342         priv->tx_buf_data[i] = skb;
343
344         desc = &ring_control->tx_data[i];
345         desc->host_addr = cpu_to_le32(mapping);
346         desc->device_addr = ((struct p54_hdr *)skb->data)->req_id;
347         desc->len = cpu_to_le16(skb->len);
348         desc->flags = 0;
349
350         wmb();
351         ring_control->host_idx[1] = cpu_to_le32(idx + 1);
352         spin_unlock_irqrestore(&priv->lock, flags);
353
354         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
355         P54P_READ(dev_int);
356 }
357
358 static void p54p_stop(struct ieee80211_hw *dev)
359 {
360         struct p54p_priv *priv = dev->priv;
361         struct p54p_ring_control *ring_control = priv->ring_control;
362         unsigned int i;
363         struct p54p_desc *desc;
364
365         P54P_WRITE(int_enable, cpu_to_le32(0));
366         P54P_READ(int_enable);
367         udelay(10);
368
369         free_irq(priv->pdev->irq, dev);
370
371         tasklet_kill(&priv->tasklet);
372
373         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
374
375         for (i = 0; i < ARRAY_SIZE(priv->rx_buf_data); i++) {
376                 desc = &ring_control->rx_data[i];
377                 if (desc->host_addr)
378                         pci_unmap_single(priv->pdev,
379                                          le32_to_cpu(desc->host_addr),
380                                          priv->common.rx_mtu + 32,
381                                          PCI_DMA_FROMDEVICE);
382                 kfree_skb(priv->rx_buf_data[i]);
383                 priv->rx_buf_data[i] = NULL;
384         }
385
386         for (i = 0; i < ARRAY_SIZE(priv->rx_buf_mgmt); i++) {
387                 desc = &ring_control->rx_mgmt[i];
388                 if (desc->host_addr)
389                         pci_unmap_single(priv->pdev,
390                                          le32_to_cpu(desc->host_addr),
391                                          priv->common.rx_mtu + 32,
392                                          PCI_DMA_FROMDEVICE);
393                 kfree_skb(priv->rx_buf_mgmt[i]);
394                 priv->rx_buf_mgmt[i] = NULL;
395         }
396
397         for (i = 0; i < ARRAY_SIZE(priv->tx_buf_data); i++) {
398                 desc = &ring_control->tx_data[i];
399                 if (desc->host_addr)
400                         pci_unmap_single(priv->pdev,
401                                          le32_to_cpu(desc->host_addr),
402                                          le16_to_cpu(desc->len),
403                                          PCI_DMA_TODEVICE);
404
405                 p54_free_skb(dev, priv->tx_buf_data[i]);
406                 priv->tx_buf_data[i] = NULL;
407         }
408
409         for (i = 0; i < ARRAY_SIZE(priv->tx_buf_mgmt); i++) {
410                 desc = &ring_control->tx_mgmt[i];
411                 if (desc->host_addr)
412                         pci_unmap_single(priv->pdev,
413                                          le32_to_cpu(desc->host_addr),
414                                          le16_to_cpu(desc->len),
415                                          PCI_DMA_TODEVICE);
416
417                 p54_free_skb(dev, priv->tx_buf_mgmt[i]);
418                 priv->tx_buf_mgmt[i] = NULL;
419         }
420
421         memset(ring_control, 0, sizeof(*ring_control));
422 }
423
424 static int p54p_open(struct ieee80211_hw *dev)
425 {
426         struct p54p_priv *priv = dev->priv;
427         int err;
428
429         init_completion(&priv->boot_comp);
430         err = request_irq(priv->pdev->irq, p54p_interrupt,
431                           IRQF_SHARED, "p54pci", dev);
432         if (err) {
433                 dev_err(&priv->pdev->dev, "failed to register IRQ handler\n");
434                 return err;
435         }
436
437         memset(priv->ring_control, 0, sizeof(*priv->ring_control));
438         err = p54p_upload_firmware(dev);
439         if (err) {
440                 free_irq(priv->pdev->irq, dev);
441                 return err;
442         }
443         priv->rx_idx_data = priv->tx_idx_data = 0;
444         priv->rx_idx_mgmt = priv->tx_idx_mgmt = 0;
445
446         p54p_refill_rx_ring(dev, 0, priv->ring_control->rx_data,
447                 ARRAY_SIZE(priv->ring_control->rx_data), priv->rx_buf_data);
448
449         p54p_refill_rx_ring(dev, 2, priv->ring_control->rx_mgmt,
450                 ARRAY_SIZE(priv->ring_control->rx_mgmt), priv->rx_buf_mgmt);
451
452         P54P_WRITE(ring_control_base, cpu_to_le32(priv->ring_control_dma));
453         P54P_READ(ring_control_base);
454         wmb();
455         udelay(10);
456
457         P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_INIT));
458         P54P_READ(int_enable);
459         wmb();
460         udelay(10);
461
462         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
463         P54P_READ(dev_int);
464
465         if (!wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ)) {
466                 printk(KERN_ERR "%s: Cannot boot firmware!\n",
467                        wiphy_name(dev->wiphy));
468                 p54p_stop(dev);
469                 return -ETIMEDOUT;
470         }
471
472         P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_UPDATE));
473         P54P_READ(int_enable);
474         wmb();
475         udelay(10);
476
477         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
478         P54P_READ(dev_int);
479         wmb();
480         udelay(10);
481
482         return 0;
483 }
484
485 static int __devinit p54p_probe(struct pci_dev *pdev,
486                                 const struct pci_device_id *id)
487 {
488         struct p54p_priv *priv;
489         struct ieee80211_hw *dev;
490         unsigned long mem_addr, mem_len;
491         int err;
492
493         err = pci_enable_device(pdev);
494         if (err) {
495                 dev_err(&pdev->dev, "Cannot enable new PCI device\n");
496                 return err;
497         }
498
499         mem_addr = pci_resource_start(pdev, 0);
500         mem_len = pci_resource_len(pdev, 0);
501         if (mem_len < sizeof(struct p54p_csr)) {
502                 dev_err(&pdev->dev, "Too short PCI resources\n");
503                 goto err_disable_dev;
504         }
505
506         err = pci_request_regions(pdev, "p54pci");
507         if (err) {
508                 dev_err(&pdev->dev, "Cannot obtain PCI resources\n");
509                 goto err_disable_dev;
510         }
511
512         if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) ||
513             pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
514                 dev_err(&pdev->dev, "No suitable DMA available\n");
515                 goto err_free_reg;
516         }
517
518         pci_set_master(pdev);
519         pci_try_set_mwi(pdev);
520
521         pci_write_config_byte(pdev, 0x40, 0);
522         pci_write_config_byte(pdev, 0x41, 0);
523
524         dev = p54_init_common(sizeof(*priv));
525         if (!dev) {
526                 dev_err(&pdev->dev, "ieee80211 alloc failed\n");
527                 err = -ENOMEM;
528                 goto err_free_reg;
529         }
530
531         priv = dev->priv;
532         priv->pdev = pdev;
533
534         SET_IEEE80211_DEV(dev, &pdev->dev);
535         pci_set_drvdata(pdev, dev);
536
537         priv->map = ioremap(mem_addr, mem_len);
538         if (!priv->map) {
539                 dev_err(&pdev->dev, "Cannot map device memory\n");
540                 err = -ENOMEM;
541                 goto err_free_dev;
542         }
543
544         priv->ring_control = pci_alloc_consistent(pdev, sizeof(*priv->ring_control),
545                                                   &priv->ring_control_dma);
546         if (!priv->ring_control) {
547                 dev_err(&pdev->dev, "Cannot allocate rings\n");
548                 err = -ENOMEM;
549                 goto err_iounmap;
550         }
551         priv->common.open = p54p_open;
552         priv->common.stop = p54p_stop;
553         priv->common.tx = p54p_tx;
554
555         spin_lock_init(&priv->lock);
556         tasklet_init(&priv->tasklet, p54p_tasklet, (unsigned long)dev);
557
558         err = request_firmware(&priv->firmware, "isl3886pci",
559                                &priv->pdev->dev);
560         if (err) {
561                 dev_err(&pdev->dev, "Cannot find firmware (isl3886pci)\n");
562                 err = request_firmware(&priv->firmware, "isl3886",
563                                        &priv->pdev->dev);
564                 if (err)
565                         goto err_free_common;
566         }
567
568         err = p54p_open(dev);
569         if (err)
570                 goto err_free_common;
571         err = p54_read_eeprom(dev);
572         p54p_stop(dev);
573         if (err)
574                 goto err_free_common;
575
576         err = p54_register_common(dev, &pdev->dev);
577         if (err)
578                 goto err_free_common;
579
580         return 0;
581
582  err_free_common:
583         release_firmware(priv->firmware);
584         pci_free_consistent(pdev, sizeof(*priv->ring_control),
585                             priv->ring_control, priv->ring_control_dma);
586
587  err_iounmap:
588         iounmap(priv->map);
589
590  err_free_dev:
591         pci_set_drvdata(pdev, NULL);
592         p54_free_common(dev);
593
594  err_free_reg:
595         pci_release_regions(pdev);
596  err_disable_dev:
597         pci_disable_device(pdev);
598         return err;
599 }
600
601 static void __devexit p54p_remove(struct pci_dev *pdev)
602 {
603         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
604         struct p54p_priv *priv;
605
606         if (!dev)
607                 return;
608
609         p54_unregister_common(dev);
610         priv = dev->priv;
611         release_firmware(priv->firmware);
612         pci_free_consistent(pdev, sizeof(*priv->ring_control),
613                             priv->ring_control, priv->ring_control_dma);
614         iounmap(priv->map);
615         pci_release_regions(pdev);
616         pci_disable_device(pdev);
617         p54_free_common(dev);
618 }
619
620 #ifdef CONFIG_PM
621 static int p54p_suspend(struct pci_dev *pdev, pm_message_t state)
622 {
623         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
624         struct p54p_priv *priv = dev->priv;
625
626         if (priv->common.mode != NL80211_IFTYPE_UNSPECIFIED) {
627                 ieee80211_stop_queues(dev);
628                 p54p_stop(dev);
629         }
630
631         pci_save_state(pdev);
632         pci_set_power_state(pdev, pci_choose_state(pdev, state));
633         return 0;
634 }
635
636 static int p54p_resume(struct pci_dev *pdev)
637 {
638         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
639         struct p54p_priv *priv = dev->priv;
640
641         pci_set_power_state(pdev, PCI_D0);
642         pci_restore_state(pdev);
643
644         if (priv->common.mode != NL80211_IFTYPE_UNSPECIFIED) {
645                 p54p_open(dev);
646                 ieee80211_wake_queues(dev);
647         }
648
649         return 0;
650 }
651 #endif /* CONFIG_PM */
652
653 static struct pci_driver p54p_driver = {
654         .name           = "p54pci",
655         .id_table       = p54p_table,
656         .probe          = p54p_probe,
657         .remove         = __devexit_p(p54p_remove),
658 #ifdef CONFIG_PM
659         .suspend        = p54p_suspend,
660         .resume         = p54p_resume,
661 #endif /* CONFIG_PM */
662 };
663
664 static int __init p54p_init(void)
665 {
666         return pci_register_driver(&p54p_driver);
667 }
668
669 static void __exit p54p_exit(void)
670 {
671         pci_unregister_driver(&p54p_driver);
672 }
673
674 module_init(p54p_init);
675 module_exit(p54p_exit);