2 * Copyright(c) 2006 - 2007 Atheros Corporation. All rights reserved.
3 * Copyright(c) 2007 - 2008 Chris Snook <csnook@redhat.com>
5 * Derived from Intel e1000 driver
6 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the Free
10 * Software Foundation; either version 2 of the License, or (at your option)
13 * This program is distributed in the hope that it will be useful, but WITHOUT
14 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
18 * You should have received a copy of the GNU General Public License along with
19 * this program; if not, write to the Free Software Foundation, Inc., 59
20 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
23 #include <asm/atomic.h>
24 #include <linux/crc32.h>
25 #include <linux/dma-mapping.h>
26 #include <linux/etherdevice.h>
27 #include <linux/ethtool.h>
28 #include <linux/hardirq.h>
29 #include <linux/if_vlan.h>
31 #include <linux/interrupt.h>
33 #include <linux/irqflags.h>
34 #include <linux/irqreturn.h>
35 #include <linux/mii.h>
36 #include <linux/net.h>
37 #include <linux/netdevice.h>
38 #include <linux/pci.h>
39 #include <linux/pci_ids.h>
41 #include <linux/skbuff.h>
42 #include <linux/spinlock.h>
43 #include <linux/string.h>
44 #include <linux/tcp.h>
45 #include <linux/timer.h>
46 #include <linux/types.h>
47 #include <linux/workqueue.h>
51 #define ATL2_DRV_VERSION "2.2.3"
53 static char atl2_driver_name[] = "atl2";
54 static const char atl2_driver_string[] = "Atheros(R) L2 Ethernet Driver";
55 static char atl2_copyright[] = "Copyright (c) 2007 Atheros Corporation.";
56 static char atl2_driver_version[] = ATL2_DRV_VERSION;
58 MODULE_AUTHOR("Atheros Corporation <xiong.huang@atheros.com>, Chris Snook <csnook@redhat.com>");
59 MODULE_DESCRIPTION("Atheros Fast Ethernet Network Driver");
60 MODULE_LICENSE("GPL");
61 MODULE_VERSION(ATL2_DRV_VERSION);
64 * atl2_pci_tbl - PCI Device ID Table
66 static DEFINE_PCI_DEVICE_TABLE(atl2_pci_tbl) = {
67 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2)},
68 /* required last entry */
71 MODULE_DEVICE_TABLE(pci, atl2_pci_tbl);
73 static void atl2_set_ethtool_ops(struct net_device *netdev);
75 static void atl2_check_options(struct atl2_adapter *adapter);
78 * atl2_sw_init - Initialize general software structures (struct atl2_adapter)
79 * @adapter: board private structure to initialize
81 * atl2_sw_init initializes the Adapter private data structure.
82 * Fields are initialized based on PCI device information and
83 * OS network device settings (MTU size).
85 static int __devinit atl2_sw_init(struct atl2_adapter *adapter)
87 struct atl2_hw *hw = &adapter->hw;
88 struct pci_dev *pdev = adapter->pdev;
90 /* PCI config space info */
91 hw->vendor_id = pdev->vendor;
92 hw->device_id = pdev->device;
93 hw->subsystem_vendor_id = pdev->subsystem_vendor;
94 hw->subsystem_id = pdev->subsystem_device;
96 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
97 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
100 adapter->ict = 50000; /* ~100ms */
101 adapter->link_speed = SPEED_0; /* hardware init */
102 adapter->link_duplex = FULL_DUPLEX;
104 hw->phy_configured = false;
105 hw->preamble_len = 7;
116 hw->max_frame_size = adapter->netdev->mtu;
118 spin_lock_init(&adapter->stats_lock);
120 set_bit(__ATL2_DOWN, &adapter->flags);
126 * atl2_set_multi - Multicast and Promiscuous mode set
127 * @netdev: network interface device structure
129 * The set_multi entry point is called whenever the multicast address
130 * list or the network interface flags are updated. This routine is
131 * responsible for configuring the hardware for proper multicast,
132 * promiscuous mode, and all-multi behavior.
134 static void atl2_set_multi(struct net_device *netdev)
136 struct atl2_adapter *adapter = netdev_priv(netdev);
137 struct atl2_hw *hw = &adapter->hw;
138 struct dev_mc_list *mc_ptr;
142 /* Check for Promiscuous and All Multicast modes */
143 rctl = ATL2_READ_REG(hw, REG_MAC_CTRL);
145 if (netdev->flags & IFF_PROMISC) {
146 rctl |= MAC_CTRL_PROMIS_EN;
147 } else if (netdev->flags & IFF_ALLMULTI) {
148 rctl |= MAC_CTRL_MC_ALL_EN;
149 rctl &= ~MAC_CTRL_PROMIS_EN;
151 rctl &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
153 ATL2_WRITE_REG(hw, REG_MAC_CTRL, rctl);
155 /* clear the old settings from the multicast hash table */
156 ATL2_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
157 ATL2_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
159 /* comoute mc addresses' hash value ,and put it into hash table */
160 netdev_for_each_mc_addr(mc_ptr, netdev) {
161 hash_value = atl2_hash_mc_addr(hw, mc_ptr->dmi_addr);
162 atl2_hash_set(hw, hash_value);
166 static void init_ring_ptrs(struct atl2_adapter *adapter)
168 /* Read / Write Ptr Initialize: */
169 adapter->txd_write_ptr = 0;
170 atomic_set(&adapter->txd_read_ptr, 0);
172 adapter->rxd_read_ptr = 0;
173 adapter->rxd_write_ptr = 0;
175 atomic_set(&adapter->txs_write_ptr, 0);
176 adapter->txs_next_clear = 0;
180 * atl2_configure - Configure Transmit&Receive Unit after Reset
181 * @adapter: board private structure
183 * Configure the Tx /Rx unit of the MAC after a reset.
185 static int atl2_configure(struct atl2_adapter *adapter)
187 struct atl2_hw *hw = &adapter->hw;
190 /* clear interrupt status */
191 ATL2_WRITE_REG(&adapter->hw, REG_ISR, 0xffffffff);
193 /* set MAC Address */
194 value = (((u32)hw->mac_addr[2]) << 24) |
195 (((u32)hw->mac_addr[3]) << 16) |
196 (((u32)hw->mac_addr[4]) << 8) |
197 (((u32)hw->mac_addr[5]));
198 ATL2_WRITE_REG(hw, REG_MAC_STA_ADDR, value);
199 value = (((u32)hw->mac_addr[0]) << 8) |
200 (((u32)hw->mac_addr[1]));
201 ATL2_WRITE_REG(hw, (REG_MAC_STA_ADDR+4), value);
203 /* HI base address */
204 ATL2_WRITE_REG(hw, REG_DESC_BASE_ADDR_HI,
205 (u32)((adapter->ring_dma & 0xffffffff00000000ULL) >> 32));
207 /* LO base address */
208 ATL2_WRITE_REG(hw, REG_TXD_BASE_ADDR_LO,
209 (u32)(adapter->txd_dma & 0x00000000ffffffffULL));
210 ATL2_WRITE_REG(hw, REG_TXS_BASE_ADDR_LO,
211 (u32)(adapter->txs_dma & 0x00000000ffffffffULL));
212 ATL2_WRITE_REG(hw, REG_RXD_BASE_ADDR_LO,
213 (u32)(adapter->rxd_dma & 0x00000000ffffffffULL));
216 ATL2_WRITE_REGW(hw, REG_TXD_MEM_SIZE, (u16)(adapter->txd_ring_size/4));
217 ATL2_WRITE_REGW(hw, REG_TXS_MEM_SIZE, (u16)adapter->txs_ring_size);
218 ATL2_WRITE_REGW(hw, REG_RXD_BUF_NUM, (u16)adapter->rxd_ring_size);
220 /* config Internal SRAM */
222 ATL2_WRITE_REGW(hw, REG_SRAM_TXRAM_END, sram_tx_end);
223 ATL2_WRITE_REGW(hw, REG_SRAM_TXRAM_END, sram_rx_end);
227 value = (((u32)hw->ipgt & MAC_IPG_IFG_IPGT_MASK) <<
228 MAC_IPG_IFG_IPGT_SHIFT) |
229 (((u32)hw->min_ifg & MAC_IPG_IFG_MIFG_MASK) <<
230 MAC_IPG_IFG_MIFG_SHIFT) |
231 (((u32)hw->ipgr1 & MAC_IPG_IFG_IPGR1_MASK) <<
232 MAC_IPG_IFG_IPGR1_SHIFT)|
233 (((u32)hw->ipgr2 & MAC_IPG_IFG_IPGR2_MASK) <<
234 MAC_IPG_IFG_IPGR2_SHIFT);
235 ATL2_WRITE_REG(hw, REG_MAC_IPG_IFG, value);
237 /* config Half-Duplex Control */
238 value = ((u32)hw->lcol & MAC_HALF_DUPLX_CTRL_LCOL_MASK) |
239 (((u32)hw->max_retry & MAC_HALF_DUPLX_CTRL_RETRY_MASK) <<
240 MAC_HALF_DUPLX_CTRL_RETRY_SHIFT) |
241 MAC_HALF_DUPLX_CTRL_EXC_DEF_EN |
242 (0xa << MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT) |
243 (((u32)hw->jam_ipg & MAC_HALF_DUPLX_CTRL_JAMIPG_MASK) <<
244 MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT);
245 ATL2_WRITE_REG(hw, REG_MAC_HALF_DUPLX_CTRL, value);
247 /* set Interrupt Moderator Timer */
248 ATL2_WRITE_REGW(hw, REG_IRQ_MODU_TIMER_INIT, adapter->imt);
249 ATL2_WRITE_REG(hw, REG_MASTER_CTRL, MASTER_CTRL_ITIMER_EN);
251 /* set Interrupt Clear Timer */
252 ATL2_WRITE_REGW(hw, REG_CMBDISDMA_TIMER, adapter->ict);
255 ATL2_WRITE_REG(hw, REG_MTU, adapter->netdev->mtu +
256 ENET_HEADER_SIZE + VLAN_SIZE + ETHERNET_FCS_SIZE);
259 ATL2_WRITE_REG(hw, REG_TX_CUT_THRESH, 0x177);
262 ATL2_WRITE_REGW(hw, REG_PAUSE_ON_TH, hw->fc_rxd_hi);
263 ATL2_WRITE_REGW(hw, REG_PAUSE_OFF_TH, hw->fc_rxd_lo);
266 ATL2_WRITE_REGW(hw, REG_MB_TXD_WR_IDX, (u16)adapter->txd_write_ptr);
267 ATL2_WRITE_REGW(hw, REG_MB_RXD_RD_IDX, (u16)adapter->rxd_read_ptr);
269 /* enable DMA read/write */
270 ATL2_WRITE_REGB(hw, REG_DMAR, DMAR_EN);
271 ATL2_WRITE_REGB(hw, REG_DMAW, DMAW_EN);
273 value = ATL2_READ_REG(&adapter->hw, REG_ISR);
274 if ((value & ISR_PHY_LINKDOWN) != 0)
275 value = 1; /* config failed */
279 /* clear all interrupt status */
280 ATL2_WRITE_REG(&adapter->hw, REG_ISR, 0x3fffffff);
281 ATL2_WRITE_REG(&adapter->hw, REG_ISR, 0);
286 * atl2_setup_ring_resources - allocate Tx / RX descriptor resources
287 * @adapter: board private structure
289 * Return 0 on success, negative on failure
291 static s32 atl2_setup_ring_resources(struct atl2_adapter *adapter)
293 struct pci_dev *pdev = adapter->pdev;
297 /* real ring DMA buffer */
298 adapter->ring_size = size =
299 adapter->txd_ring_size * 1 + 7 + /* dword align */
300 adapter->txs_ring_size * 4 + 7 + /* dword align */
301 adapter->rxd_ring_size * 1536 + 127; /* 128bytes align */
303 adapter->ring_vir_addr = pci_alloc_consistent(pdev, size,
305 if (!adapter->ring_vir_addr)
307 memset(adapter->ring_vir_addr, 0, adapter->ring_size);
310 adapter->txd_dma = adapter->ring_dma ;
311 offset = (adapter->txd_dma & 0x7) ? (8 - (adapter->txd_dma & 0x7)) : 0;
312 adapter->txd_dma += offset;
313 adapter->txd_ring = (struct tx_pkt_header *) (adapter->ring_vir_addr +
317 adapter->txs_dma = adapter->txd_dma + adapter->txd_ring_size;
318 offset = (adapter->txs_dma & 0x7) ? (8 - (adapter->txs_dma & 0x7)) : 0;
319 adapter->txs_dma += offset;
320 adapter->txs_ring = (struct tx_pkt_status *)
321 (((u8 *)adapter->txd_ring) + (adapter->txd_ring_size + offset));
324 adapter->rxd_dma = adapter->txs_dma + adapter->txs_ring_size * 4;
325 offset = (adapter->rxd_dma & 127) ?
326 (128 - (adapter->rxd_dma & 127)) : 0;
332 adapter->rxd_dma += offset;
333 adapter->rxd_ring = (struct rx_desc *) (((u8 *)adapter->txs_ring) +
334 (adapter->txs_ring_size * 4 + offset));
337 * Read / Write Ptr Initialize:
338 * init_ring_ptrs(adapter);
344 * atl2_irq_enable - Enable default interrupt generation settings
345 * @adapter: board private structure
347 static inline void atl2_irq_enable(struct atl2_adapter *adapter)
349 ATL2_WRITE_REG(&adapter->hw, REG_IMR, IMR_NORMAL_MASK);
350 ATL2_WRITE_FLUSH(&adapter->hw);
354 * atl2_irq_disable - Mask off interrupt generation on the NIC
355 * @adapter: board private structure
357 static inline void atl2_irq_disable(struct atl2_adapter *adapter)
359 ATL2_WRITE_REG(&adapter->hw, REG_IMR, 0);
360 ATL2_WRITE_FLUSH(&adapter->hw);
361 synchronize_irq(adapter->pdev->irq);
364 #ifdef NETIF_F_HW_VLAN_TX
365 static void atl2_vlan_rx_register(struct net_device *netdev,
366 struct vlan_group *grp)
368 struct atl2_adapter *adapter = netdev_priv(netdev);
371 atl2_irq_disable(adapter);
372 adapter->vlgrp = grp;
375 /* enable VLAN tag insert/strip */
376 ctrl = ATL2_READ_REG(&adapter->hw, REG_MAC_CTRL);
377 ctrl |= MAC_CTRL_RMV_VLAN;
378 ATL2_WRITE_REG(&adapter->hw, REG_MAC_CTRL, ctrl);
380 /* disable VLAN tag insert/strip */
381 ctrl = ATL2_READ_REG(&adapter->hw, REG_MAC_CTRL);
382 ctrl &= ~MAC_CTRL_RMV_VLAN;
383 ATL2_WRITE_REG(&adapter->hw, REG_MAC_CTRL, ctrl);
386 atl2_irq_enable(adapter);
389 static void atl2_restore_vlan(struct atl2_adapter *adapter)
391 atl2_vlan_rx_register(adapter->netdev, adapter->vlgrp);
395 static void atl2_intr_rx(struct atl2_adapter *adapter)
397 struct net_device *netdev = adapter->netdev;
402 rxd = adapter->rxd_ring+adapter->rxd_write_ptr;
403 if (!rxd->status.update)
404 break; /* end of tx */
406 /* clear this flag at once */
407 rxd->status.update = 0;
409 if (rxd->status.ok && rxd->status.pkt_size >= 60) {
410 int rx_size = (int)(rxd->status.pkt_size - 4);
411 /* alloc new buffer */
412 skb = netdev_alloc_skb_ip_align(netdev, rx_size);
415 "%s: Mem squeeze, deferring packet.\n",
418 * Check that some rx space is free. If not,
419 * free one and mark stats->rx_dropped++.
421 netdev->stats.rx_dropped++;
425 memcpy(skb->data, rxd->packet, rx_size);
426 skb_put(skb, rx_size);
427 skb->protocol = eth_type_trans(skb, netdev);
428 #ifdef NETIF_F_HW_VLAN_TX
429 if (adapter->vlgrp && (rxd->status.vlan)) {
430 u16 vlan_tag = (rxd->status.vtag>>4) |
431 ((rxd->status.vtag&7) << 13) |
432 ((rxd->status.vtag&8) << 9);
433 vlan_hwaccel_rx(skb, adapter->vlgrp, vlan_tag);
437 netdev->stats.rx_bytes += rx_size;
438 netdev->stats.rx_packets++;
440 netdev->stats.rx_errors++;
442 if (rxd->status.ok && rxd->status.pkt_size <= 60)
443 netdev->stats.rx_length_errors++;
444 if (rxd->status.mcast)
445 netdev->stats.multicast++;
447 netdev->stats.rx_crc_errors++;
448 if (rxd->status.align)
449 netdev->stats.rx_frame_errors++;
452 /* advance write ptr */
453 if (++adapter->rxd_write_ptr == adapter->rxd_ring_size)
454 adapter->rxd_write_ptr = 0;
457 /* update mailbox? */
458 adapter->rxd_read_ptr = adapter->rxd_write_ptr;
459 ATL2_WRITE_REGW(&adapter->hw, REG_MB_RXD_RD_IDX, adapter->rxd_read_ptr);
462 static void atl2_intr_tx(struct atl2_adapter *adapter)
464 struct net_device *netdev = adapter->netdev;
467 struct tx_pkt_status *txs;
468 struct tx_pkt_header *txph;
472 txs_write_ptr = (u32) atomic_read(&adapter->txs_write_ptr);
473 txs = adapter->txs_ring + txs_write_ptr;
475 break; /* tx stop here */
480 if (++txs_write_ptr == adapter->txs_ring_size)
482 atomic_set(&adapter->txs_write_ptr, (int)txs_write_ptr);
484 txd_read_ptr = (u32) atomic_read(&adapter->txd_read_ptr);
485 txph = (struct tx_pkt_header *)
486 (((u8 *)adapter->txd_ring) + txd_read_ptr);
488 if (txph->pkt_size != txs->pkt_size) {
489 struct tx_pkt_status *old_txs = txs;
491 "%s: txs packet size not consistent with txd"
492 " txd_:0x%08x, txs_:0x%08x!\n",
493 adapter->netdev->name,
494 *(u32 *)txph, *(u32 *)txs);
496 "txd read ptr: 0x%x\n",
498 txs = adapter->txs_ring + txs_write_ptr;
500 "txs-behind:0x%08x\n",
502 if (txs_write_ptr < 2) {
503 txs = adapter->txs_ring +
504 (adapter->txs_ring_size +
507 txs = adapter->txs_ring + (txs_write_ptr - 2);
510 "txs-before:0x%08x\n",
516 txd_read_ptr += (((u32)(txph->pkt_size) + 7) & ~3);
517 if (txd_read_ptr >= adapter->txd_ring_size)
518 txd_read_ptr -= adapter->txd_ring_size;
520 atomic_set(&adapter->txd_read_ptr, (int)txd_read_ptr);
524 netdev->stats.tx_bytes += txs->pkt_size;
525 netdev->stats.tx_packets++;
528 netdev->stats.tx_errors++;
531 netdev->stats.collisions++;
533 netdev->stats.tx_aborted_errors++;
535 netdev->stats.tx_window_errors++;
537 netdev->stats.tx_fifo_errors++;
541 if (netif_queue_stopped(adapter->netdev) &&
542 netif_carrier_ok(adapter->netdev))
543 netif_wake_queue(adapter->netdev);
547 static void atl2_check_for_link(struct atl2_adapter *adapter)
549 struct net_device *netdev = adapter->netdev;
552 spin_lock(&adapter->stats_lock);
553 atl2_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
554 atl2_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
555 spin_unlock(&adapter->stats_lock);
557 /* notify upper layer link down ASAP */
558 if (!(phy_data & BMSR_LSTATUS)) { /* Link Down */
559 if (netif_carrier_ok(netdev)) { /* old link state: Up */
560 printk(KERN_INFO "%s: %s NIC Link is Down\n",
561 atl2_driver_name, netdev->name);
562 adapter->link_speed = SPEED_0;
563 netif_carrier_off(netdev);
564 netif_stop_queue(netdev);
567 schedule_work(&adapter->link_chg_task);
570 static inline void atl2_clear_phy_int(struct atl2_adapter *adapter)
573 spin_lock(&adapter->stats_lock);
574 atl2_read_phy_reg(&adapter->hw, 19, &phy_data);
575 spin_unlock(&adapter->stats_lock);
579 * atl2_intr - Interrupt Handler
580 * @irq: interrupt number
581 * @data: pointer to a network interface device structure
582 * @pt_regs: CPU registers structure
584 static irqreturn_t atl2_intr(int irq, void *data)
586 struct atl2_adapter *adapter = netdev_priv(data);
587 struct atl2_hw *hw = &adapter->hw;
590 status = ATL2_READ_REG(hw, REG_ISR);
595 if (status & ISR_PHY)
596 atl2_clear_phy_int(adapter);
598 /* clear ISR status, and Enable CMB DMA/Disable Interrupt */
599 ATL2_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
601 /* check if PCIE PHY Link down */
602 if (status & ISR_PHY_LINKDOWN) {
603 if (netif_running(adapter->netdev)) { /* reset MAC */
604 ATL2_WRITE_REG(hw, REG_ISR, 0);
605 ATL2_WRITE_REG(hw, REG_IMR, 0);
606 ATL2_WRITE_FLUSH(hw);
607 schedule_work(&adapter->reset_task);
612 /* check if DMA read/write error? */
613 if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) {
614 ATL2_WRITE_REG(hw, REG_ISR, 0);
615 ATL2_WRITE_REG(hw, REG_IMR, 0);
616 ATL2_WRITE_FLUSH(hw);
617 schedule_work(&adapter->reset_task);
622 if (status & (ISR_PHY | ISR_MANUAL)) {
623 adapter->netdev->stats.tx_carrier_errors++;
624 atl2_check_for_link(adapter);
628 if (status & ISR_TX_EVENT)
629 atl2_intr_tx(adapter);
632 if (status & ISR_RX_EVENT)
633 atl2_intr_rx(adapter);
635 /* re-enable Interrupt */
636 ATL2_WRITE_REG(&adapter->hw, REG_ISR, 0);
640 static int atl2_request_irq(struct atl2_adapter *adapter)
642 struct net_device *netdev = adapter->netdev;
646 adapter->have_msi = true;
647 err = pci_enable_msi(adapter->pdev);
649 adapter->have_msi = false;
651 if (adapter->have_msi)
652 flags &= ~IRQF_SHARED;
654 return request_irq(adapter->pdev->irq, atl2_intr, flags, netdev->name,
659 * atl2_free_ring_resources - Free Tx / RX descriptor Resources
660 * @adapter: board private structure
662 * Free all transmit software resources
664 static void atl2_free_ring_resources(struct atl2_adapter *adapter)
666 struct pci_dev *pdev = adapter->pdev;
667 pci_free_consistent(pdev, adapter->ring_size, adapter->ring_vir_addr,
672 * atl2_open - Called when a network interface is made active
673 * @netdev: network interface device structure
675 * Returns 0 on success, negative value on failure
677 * The open entry point is called when a network interface is made
678 * active by the system (IFF_UP). At this point all resources needed
679 * for transmit and receive operations are allocated, the interrupt
680 * handler is registered with the OS, the watchdog timer is started,
681 * and the stack is notified that the interface is ready.
683 static int atl2_open(struct net_device *netdev)
685 struct atl2_adapter *adapter = netdev_priv(netdev);
689 /* disallow open during test */
690 if (test_bit(__ATL2_TESTING, &adapter->flags))
693 /* allocate transmit descriptors */
694 err = atl2_setup_ring_resources(adapter);
698 err = atl2_init_hw(&adapter->hw);
704 /* hardware has been reset, we need to reload some things */
705 atl2_set_multi(netdev);
706 init_ring_ptrs(adapter);
708 #ifdef NETIF_F_HW_VLAN_TX
709 atl2_restore_vlan(adapter);
712 if (atl2_configure(adapter)) {
717 err = atl2_request_irq(adapter);
721 clear_bit(__ATL2_DOWN, &adapter->flags);
723 mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 4*HZ));
725 val = ATL2_READ_REG(&adapter->hw, REG_MASTER_CTRL);
726 ATL2_WRITE_REG(&adapter->hw, REG_MASTER_CTRL,
727 val | MASTER_CTRL_MANUAL_INT);
729 atl2_irq_enable(adapter);
736 atl2_free_ring_resources(adapter);
737 atl2_reset_hw(&adapter->hw);
742 static void atl2_down(struct atl2_adapter *adapter)
744 struct net_device *netdev = adapter->netdev;
746 /* signal that we're down so the interrupt handler does not
747 * reschedule our watchdog timer */
748 set_bit(__ATL2_DOWN, &adapter->flags);
750 netif_tx_disable(netdev);
752 /* reset MAC to disable all RX/TX */
753 atl2_reset_hw(&adapter->hw);
756 atl2_irq_disable(adapter);
758 del_timer_sync(&adapter->watchdog_timer);
759 del_timer_sync(&adapter->phy_config_timer);
760 clear_bit(0, &adapter->cfg_phy);
762 netif_carrier_off(netdev);
763 adapter->link_speed = SPEED_0;
764 adapter->link_duplex = -1;
767 static void atl2_free_irq(struct atl2_adapter *adapter)
769 struct net_device *netdev = adapter->netdev;
771 free_irq(adapter->pdev->irq, netdev);
773 #ifdef CONFIG_PCI_MSI
774 if (adapter->have_msi)
775 pci_disable_msi(adapter->pdev);
780 * atl2_close - Disables a network interface
781 * @netdev: network interface device structure
783 * Returns 0, this is not allowed to fail
785 * The close entry point is called when an interface is de-activated
786 * by the OS. The hardware is still under the drivers control, but
787 * needs to be disabled. A global MAC reset is issued to stop the
788 * hardware, and all transmit and receive resources are freed.
790 static int atl2_close(struct net_device *netdev)
792 struct atl2_adapter *adapter = netdev_priv(netdev);
794 WARN_ON(test_bit(__ATL2_RESETTING, &adapter->flags));
797 atl2_free_irq(adapter);
798 atl2_free_ring_resources(adapter);
803 static inline int TxsFreeUnit(struct atl2_adapter *adapter)
805 u32 txs_write_ptr = (u32) atomic_read(&adapter->txs_write_ptr);
807 return (adapter->txs_next_clear >= txs_write_ptr) ?
808 (int) (adapter->txs_ring_size - adapter->txs_next_clear +
810 (int) (txs_write_ptr - adapter->txs_next_clear - 1);
813 static inline int TxdFreeBytes(struct atl2_adapter *adapter)
815 u32 txd_read_ptr = (u32)atomic_read(&adapter->txd_read_ptr);
817 return (adapter->txd_write_ptr >= txd_read_ptr) ?
818 (int) (adapter->txd_ring_size - adapter->txd_write_ptr +
820 (int) (txd_read_ptr - adapter->txd_write_ptr - 1);
823 static netdev_tx_t atl2_xmit_frame(struct sk_buff *skb,
824 struct net_device *netdev)
826 struct atl2_adapter *adapter = netdev_priv(netdev);
827 struct tx_pkt_header *txph;
828 u32 offset, copy_len;
832 if (test_bit(__ATL2_DOWN, &adapter->flags)) {
833 dev_kfree_skb_any(skb);
837 if (unlikely(skb->len <= 0)) {
838 dev_kfree_skb_any(skb);
842 txs_unused = TxsFreeUnit(adapter);
843 txbuf_unused = TxdFreeBytes(adapter);
845 if (skb->len + sizeof(struct tx_pkt_header) + 4 > txbuf_unused ||
847 /* not enough resources */
848 netif_stop_queue(netdev);
849 return NETDEV_TX_BUSY;
852 offset = adapter->txd_write_ptr;
854 txph = (struct tx_pkt_header *) (((u8 *)adapter->txd_ring) + offset);
857 txph->pkt_size = skb->len;
860 if (offset >= adapter->txd_ring_size)
861 offset -= adapter->txd_ring_size;
862 copy_len = adapter->txd_ring_size - offset;
863 if (copy_len >= skb->len) {
864 memcpy(((u8 *)adapter->txd_ring) + offset, skb->data, skb->len);
865 offset += ((u32)(skb->len + 3) & ~3);
867 memcpy(((u8 *)adapter->txd_ring)+offset, skb->data, copy_len);
868 memcpy((u8 *)adapter->txd_ring, skb->data+copy_len,
870 offset = ((u32)(skb->len-copy_len + 3) & ~3);
872 #ifdef NETIF_F_HW_VLAN_TX
873 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
874 u16 vlan_tag = vlan_tx_tag_get(skb);
875 vlan_tag = (vlan_tag << 4) |
877 ((vlan_tag >> 9) & 0x8);
879 txph->vlan = vlan_tag;
882 if (offset >= adapter->txd_ring_size)
883 offset -= adapter->txd_ring_size;
884 adapter->txd_write_ptr = offset;
886 /* clear txs before send */
887 adapter->txs_ring[adapter->txs_next_clear].update = 0;
888 if (++adapter->txs_next_clear == adapter->txs_ring_size)
889 adapter->txs_next_clear = 0;
891 ATL2_WRITE_REGW(&adapter->hw, REG_MB_TXD_WR_IDX,
892 (adapter->txd_write_ptr >> 2));
895 netdev->trans_start = jiffies;
896 dev_kfree_skb_any(skb);
901 * atl2_change_mtu - Change the Maximum Transfer Unit
902 * @netdev: network interface device structure
903 * @new_mtu: new value for maximum frame size
905 * Returns 0 on success, negative on failure
907 static int atl2_change_mtu(struct net_device *netdev, int new_mtu)
909 struct atl2_adapter *adapter = netdev_priv(netdev);
910 struct atl2_hw *hw = &adapter->hw;
912 if ((new_mtu < 40) || (new_mtu > (ETH_DATA_LEN + VLAN_SIZE)))
916 if (hw->max_frame_size != new_mtu) {
917 netdev->mtu = new_mtu;
918 ATL2_WRITE_REG(hw, REG_MTU, new_mtu + ENET_HEADER_SIZE +
919 VLAN_SIZE + ETHERNET_FCS_SIZE);
926 * atl2_set_mac - Change the Ethernet Address of the NIC
927 * @netdev: network interface device structure
928 * @p: pointer to an address structure
930 * Returns 0 on success, negative on failure
932 static int atl2_set_mac(struct net_device *netdev, void *p)
934 struct atl2_adapter *adapter = netdev_priv(netdev);
935 struct sockaddr *addr = p;
937 if (!is_valid_ether_addr(addr->sa_data))
938 return -EADDRNOTAVAIL;
940 if (netif_running(netdev))
943 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
944 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
946 atl2_set_mac_addr(&adapter->hw);
957 static int atl2_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
959 struct atl2_adapter *adapter = netdev_priv(netdev);
960 struct mii_ioctl_data *data = if_mii(ifr);
968 spin_lock_irqsave(&adapter->stats_lock, flags);
969 if (atl2_read_phy_reg(&adapter->hw,
970 data->reg_num & 0x1F, &data->val_out)) {
971 spin_unlock_irqrestore(&adapter->stats_lock, flags);
974 spin_unlock_irqrestore(&adapter->stats_lock, flags);
977 if (data->reg_num & ~(0x1F))
979 spin_lock_irqsave(&adapter->stats_lock, flags);
980 if (atl2_write_phy_reg(&adapter->hw, data->reg_num,
982 spin_unlock_irqrestore(&adapter->stats_lock, flags);
985 spin_unlock_irqrestore(&adapter->stats_lock, flags);
999 static int atl2_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1005 return atl2_mii_ioctl(netdev, ifr, cmd);
1006 #ifdef ETHTOOL_OPS_COMPAT
1008 return ethtool_ioctl(ifr);
1016 * atl2_tx_timeout - Respond to a Tx Hang
1017 * @netdev: network interface device structure
1019 static void atl2_tx_timeout(struct net_device *netdev)
1021 struct atl2_adapter *adapter = netdev_priv(netdev);
1023 /* Do the reset outside of interrupt context */
1024 schedule_work(&adapter->reset_task);
1028 * atl2_watchdog - Timer Call-back
1029 * @data: pointer to netdev cast into an unsigned long
1031 static void atl2_watchdog(unsigned long data)
1033 struct atl2_adapter *adapter = (struct atl2_adapter *) data;
1035 if (!test_bit(__ATL2_DOWN, &adapter->flags)) {
1036 u32 drop_rxd, drop_rxs;
1037 unsigned long flags;
1039 spin_lock_irqsave(&adapter->stats_lock, flags);
1040 drop_rxd = ATL2_READ_REG(&adapter->hw, REG_STS_RXD_OV);
1041 drop_rxs = ATL2_READ_REG(&adapter->hw, REG_STS_RXS_OV);
1042 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1044 adapter->netdev->stats.rx_over_errors += drop_rxd + drop_rxs;
1046 /* Reset the timer */
1047 mod_timer(&adapter->watchdog_timer,
1048 round_jiffies(jiffies + 4 * HZ));
1053 * atl2_phy_config - Timer Call-back
1054 * @data: pointer to netdev cast into an unsigned long
1056 static void atl2_phy_config(unsigned long data)
1058 struct atl2_adapter *adapter = (struct atl2_adapter *) data;
1059 struct atl2_hw *hw = &adapter->hw;
1060 unsigned long flags;
1062 spin_lock_irqsave(&adapter->stats_lock, flags);
1063 atl2_write_phy_reg(hw, MII_ADVERTISE, hw->mii_autoneg_adv_reg);
1064 atl2_write_phy_reg(hw, MII_BMCR, MII_CR_RESET | MII_CR_AUTO_NEG_EN |
1065 MII_CR_RESTART_AUTO_NEG);
1066 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1067 clear_bit(0, &adapter->cfg_phy);
1070 static int atl2_up(struct atl2_adapter *adapter)
1072 struct net_device *netdev = adapter->netdev;
1076 /* hardware has been reset, we need to reload some things */
1078 err = atl2_init_hw(&adapter->hw);
1084 atl2_set_multi(netdev);
1085 init_ring_ptrs(adapter);
1087 #ifdef NETIF_F_HW_VLAN_TX
1088 atl2_restore_vlan(adapter);
1091 if (atl2_configure(adapter)) {
1096 clear_bit(__ATL2_DOWN, &adapter->flags);
1098 val = ATL2_READ_REG(&adapter->hw, REG_MASTER_CTRL);
1099 ATL2_WRITE_REG(&adapter->hw, REG_MASTER_CTRL, val |
1100 MASTER_CTRL_MANUAL_INT);
1102 atl2_irq_enable(adapter);
1108 static void atl2_reinit_locked(struct atl2_adapter *adapter)
1110 WARN_ON(in_interrupt());
1111 while (test_and_set_bit(__ATL2_RESETTING, &adapter->flags))
1115 clear_bit(__ATL2_RESETTING, &adapter->flags);
1118 static void atl2_reset_task(struct work_struct *work)
1120 struct atl2_adapter *adapter;
1121 adapter = container_of(work, struct atl2_adapter, reset_task);
1123 atl2_reinit_locked(adapter);
1126 static void atl2_setup_mac_ctrl(struct atl2_adapter *adapter)
1129 struct atl2_hw *hw = &adapter->hw;
1130 struct net_device *netdev = adapter->netdev;
1132 /* Config MAC CTRL Register */
1133 value = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN | MAC_CTRL_MACLP_CLK_PHY;
1136 if (FULL_DUPLEX == adapter->link_duplex)
1137 value |= MAC_CTRL_DUPLX;
1140 value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
1143 value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1145 /* preamble length */
1146 value |= (((u32)adapter->hw.preamble_len & MAC_CTRL_PRMLEN_MASK) <<
1147 MAC_CTRL_PRMLEN_SHIFT);
1151 value |= MAC_CTRL_RMV_VLAN;
1154 value |= MAC_CTRL_BC_EN;
1155 if (netdev->flags & IFF_PROMISC)
1156 value |= MAC_CTRL_PROMIS_EN;
1157 else if (netdev->flags & IFF_ALLMULTI)
1158 value |= MAC_CTRL_MC_ALL_EN;
1160 /* half retry buffer */
1161 value |= (((u32)(adapter->hw.retry_buf &
1162 MAC_CTRL_HALF_LEFT_BUF_MASK)) << MAC_CTRL_HALF_LEFT_BUF_SHIFT);
1164 ATL2_WRITE_REG(hw, REG_MAC_CTRL, value);
1167 static int atl2_check_link(struct atl2_adapter *adapter)
1169 struct atl2_hw *hw = &adapter->hw;
1170 struct net_device *netdev = adapter->netdev;
1172 u16 speed, duplex, phy_data;
1175 /* MII_BMSR must read twise */
1176 atl2_read_phy_reg(hw, MII_BMSR, &phy_data);
1177 atl2_read_phy_reg(hw, MII_BMSR, &phy_data);
1178 if (!(phy_data&BMSR_LSTATUS)) { /* link down */
1179 if (netif_carrier_ok(netdev)) { /* old link state: Up */
1182 value = ATL2_READ_REG(hw, REG_MAC_CTRL);
1183 value &= ~MAC_CTRL_RX_EN;
1184 ATL2_WRITE_REG(hw, REG_MAC_CTRL, value);
1185 adapter->link_speed = SPEED_0;
1186 netif_carrier_off(netdev);
1187 netif_stop_queue(netdev);
1193 ret_val = atl2_get_speed_and_duplex(hw, &speed, &duplex);
1196 switch (hw->MediaType) {
1197 case MEDIA_TYPE_100M_FULL:
1198 if (speed != SPEED_100 || duplex != FULL_DUPLEX)
1201 case MEDIA_TYPE_100M_HALF:
1202 if (speed != SPEED_100 || duplex != HALF_DUPLEX)
1205 case MEDIA_TYPE_10M_FULL:
1206 if (speed != SPEED_10 || duplex != FULL_DUPLEX)
1209 case MEDIA_TYPE_10M_HALF:
1210 if (speed != SPEED_10 || duplex != HALF_DUPLEX)
1214 /* link result is our setting */
1215 if (reconfig == 0) {
1216 if (adapter->link_speed != speed ||
1217 adapter->link_duplex != duplex) {
1218 adapter->link_speed = speed;
1219 adapter->link_duplex = duplex;
1220 atl2_setup_mac_ctrl(adapter);
1221 printk(KERN_INFO "%s: %s NIC Link is Up<%d Mbps %s>\n",
1222 atl2_driver_name, netdev->name,
1223 adapter->link_speed,
1224 adapter->link_duplex == FULL_DUPLEX ?
1225 "Full Duplex" : "Half Duplex");
1228 if (!netif_carrier_ok(netdev)) { /* Link down -> Up */
1229 netif_carrier_on(netdev);
1230 netif_wake_queue(netdev);
1235 /* change original link status */
1236 if (netif_carrier_ok(netdev)) {
1239 value = ATL2_READ_REG(hw, REG_MAC_CTRL);
1240 value &= ~MAC_CTRL_RX_EN;
1241 ATL2_WRITE_REG(hw, REG_MAC_CTRL, value);
1243 adapter->link_speed = SPEED_0;
1244 netif_carrier_off(netdev);
1245 netif_stop_queue(netdev);
1248 /* auto-neg, insert timer to re-config phy
1249 * (if interval smaller than 5 seconds, something strange) */
1250 if (!test_bit(__ATL2_DOWN, &adapter->flags)) {
1251 if (!test_and_set_bit(0, &adapter->cfg_phy))
1252 mod_timer(&adapter->phy_config_timer,
1253 round_jiffies(jiffies + 5 * HZ));
1260 * atl2_link_chg_task - deal with link change event Out of interrupt context
1261 * @netdev: network interface device structure
1263 static void atl2_link_chg_task(struct work_struct *work)
1265 struct atl2_adapter *adapter;
1266 unsigned long flags;
1268 adapter = container_of(work, struct atl2_adapter, link_chg_task);
1270 spin_lock_irqsave(&adapter->stats_lock, flags);
1271 atl2_check_link(adapter);
1272 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1275 static void atl2_setup_pcicmd(struct pci_dev *pdev)
1279 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
1281 if (cmd & PCI_COMMAND_INTX_DISABLE)
1282 cmd &= ~PCI_COMMAND_INTX_DISABLE;
1283 if (cmd & PCI_COMMAND_IO)
1284 cmd &= ~PCI_COMMAND_IO;
1285 if (0 == (cmd & PCI_COMMAND_MEMORY))
1286 cmd |= PCI_COMMAND_MEMORY;
1287 if (0 == (cmd & PCI_COMMAND_MASTER))
1288 cmd |= PCI_COMMAND_MASTER;
1289 pci_write_config_word(pdev, PCI_COMMAND, cmd);
1292 * some motherboards BIOS(PXE/EFI) driver may set PME
1293 * while they transfer control to OS (Windows/Linux)
1294 * so we should clear this bit before NIC work normally
1296 pci_write_config_dword(pdev, REG_PM_CTRLSTAT, 0);
1299 #ifdef CONFIG_NET_POLL_CONTROLLER
1300 static void atl2_poll_controller(struct net_device *netdev)
1302 disable_irq(netdev->irq);
1303 atl2_intr(netdev->irq, netdev);
1304 enable_irq(netdev->irq);
1309 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29))
1310 static const struct net_device_ops atl2_netdev_ops = {
1311 .ndo_open = atl2_open,
1312 .ndo_stop = atl2_close,
1313 .ndo_start_xmit = atl2_xmit_frame,
1314 .ndo_set_multicast_list = atl2_set_multi,
1315 .ndo_validate_addr = eth_validate_addr,
1316 .ndo_set_mac_address = atl2_set_mac,
1317 .ndo_change_mtu = atl2_change_mtu,
1318 .ndo_do_ioctl = atl2_ioctl,
1319 .ndo_tx_timeout = atl2_tx_timeout,
1320 .ndo_vlan_rx_register = atl2_vlan_rx_register,
1321 #ifdef CONFIG_NET_POLL_CONTROLLER
1322 .ndo_poll_controller = atl2_poll_controller,
1328 * atl2_probe - Device Initialization Routine
1329 * @pdev: PCI device information struct
1330 * @ent: entry in atl2_pci_tbl
1332 * Returns 0 on success, negative on failure
1334 * atl2_probe initializes an adapter identified by a pci_dev structure.
1335 * The OS initialization, configuring of the adapter private structure,
1336 * and a hardware reset occur.
1338 static int __devinit atl2_probe(struct pci_dev *pdev,
1339 const struct pci_device_id *ent)
1341 struct net_device *netdev;
1342 struct atl2_adapter *adapter;
1343 static int cards_found;
1344 unsigned long mmio_start;
1350 err = pci_enable_device(pdev);
1355 * atl2 is a shared-high-32-bit device, so we're stuck with 32-bit DMA
1356 * until the kernel has the proper infrastructure to support 64-bit DMA
1359 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) &&
1360 pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
1361 printk(KERN_ERR "atl2: No usable DMA configuration, aborting\n");
1365 /* Mark all PCI regions associated with PCI device
1366 * pdev as being reserved by owner atl2_driver_name */
1367 err = pci_request_regions(pdev, atl2_driver_name);
1371 /* Enables bus-mastering on the device and calls
1372 * pcibios_set_master to do the needed arch specific settings */
1373 pci_set_master(pdev);
1376 netdev = alloc_etherdev(sizeof(struct atl2_adapter));
1378 goto err_alloc_etherdev;
1380 SET_NETDEV_DEV(netdev, &pdev->dev);
1382 pci_set_drvdata(pdev, netdev);
1383 adapter = netdev_priv(netdev);
1384 adapter->netdev = netdev;
1385 adapter->pdev = pdev;
1386 adapter->hw.back = adapter;
1388 mmio_start = pci_resource_start(pdev, 0x0);
1389 mmio_len = pci_resource_len(pdev, 0x0);
1391 adapter->hw.mem_rang = (u32)mmio_len;
1392 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
1393 if (!adapter->hw.hw_addr) {
1398 atl2_setup_pcicmd(pdev);
1400 #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29))
1401 netdev->netdev_ops = &atl2_netdev_ops;
1403 netdev->change_mtu = atl2_change_mtu;
1404 netdev->hard_start_xmit = atl2_xmit_frame;
1405 netdev->open = atl2_open;
1406 netdev->stop = atl2_close;
1407 netdev->tx_timeout = atl2_tx_timeout;
1408 netdev->set_mac_address = atl2_set_mac;
1409 netdev->do_ioctl = atl2_ioctl;
1410 netdev->set_multicast_list = atl2_set_multi;
1411 netdev->vlan_rx_register = atl2_vlan_rx_register;
1412 #ifdef CONFIG_NET_POLL_CONTROLLER
1413 netdev->poll_controller = atl2_poll_controller;
1416 atl2_set_ethtool_ops(netdev);
1417 netdev->watchdog_timeo = 5 * HZ;
1418 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1420 netdev->mem_start = mmio_start;
1421 netdev->mem_end = mmio_start + mmio_len;
1422 adapter->bd_number = cards_found;
1423 adapter->pci_using_64 = false;
1425 /* setup the private structure */
1426 err = atl2_sw_init(adapter);
1432 #ifdef NETIF_F_HW_VLAN_TX
1433 netdev->features |= (NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX);
1436 /* Init PHY as early as possible due to power saving issue */
1437 atl2_phy_init(&adapter->hw);
1439 /* reset the controller to
1440 * put the device in a known good starting state */
1442 if (atl2_reset_hw(&adapter->hw)) {
1447 /* copy the MAC address out of the EEPROM */
1448 atl2_read_mac_addr(&adapter->hw);
1449 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
1450 /* FIXME: do we still need this? */
1451 #ifdef ETHTOOL_GPERMADDR
1452 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1454 if (!is_valid_ether_addr(netdev->perm_addr)) {
1456 if (!is_valid_ether_addr(netdev->dev_addr)) {
1462 atl2_check_options(adapter);
1464 init_timer(&adapter->watchdog_timer);
1465 adapter->watchdog_timer.function = &atl2_watchdog;
1466 adapter->watchdog_timer.data = (unsigned long) adapter;
1468 init_timer(&adapter->phy_config_timer);
1469 adapter->phy_config_timer.function = &atl2_phy_config;
1470 adapter->phy_config_timer.data = (unsigned long) adapter;
1472 INIT_WORK(&adapter->reset_task, atl2_reset_task);
1473 INIT_WORK(&adapter->link_chg_task, atl2_link_chg_task);
1475 strcpy(netdev->name, "eth%d"); /* ?? */
1476 err = register_netdev(netdev);
1480 /* assume we have no link for now */
1481 netif_carrier_off(netdev);
1482 netif_stop_queue(netdev);
1492 iounmap(adapter->hw.hw_addr);
1494 free_netdev(netdev);
1496 pci_release_regions(pdev);
1499 pci_disable_device(pdev);
1504 * atl2_remove - Device Removal Routine
1505 * @pdev: PCI device information struct
1507 * atl2_remove is called by the PCI subsystem to alert the driver
1508 * that it should release a PCI device. The could be caused by a
1509 * Hot-Plug event, or because the driver is going to be removed from
1512 /* FIXME: write the original MAC address back in case it was changed from a
1513 * BIOS-set value, as in atl1 -- CHS */
1514 static void __devexit atl2_remove(struct pci_dev *pdev)
1516 struct net_device *netdev = pci_get_drvdata(pdev);
1517 struct atl2_adapter *adapter = netdev_priv(netdev);
1519 /* flush_scheduled work may reschedule our watchdog task, so
1520 * explicitly disable watchdog tasks from being rescheduled */
1521 set_bit(__ATL2_DOWN, &adapter->flags);
1523 del_timer_sync(&adapter->watchdog_timer);
1524 del_timer_sync(&adapter->phy_config_timer);
1526 flush_scheduled_work();
1528 unregister_netdev(netdev);
1530 atl2_force_ps(&adapter->hw);
1532 iounmap(adapter->hw.hw_addr);
1533 pci_release_regions(pdev);
1535 free_netdev(netdev);
1537 pci_disable_device(pdev);
1540 static int atl2_suspend(struct pci_dev *pdev, pm_message_t state)
1542 struct net_device *netdev = pci_get_drvdata(pdev);
1543 struct atl2_adapter *adapter = netdev_priv(netdev);
1544 struct atl2_hw *hw = &adapter->hw;
1547 u32 wufc = adapter->wol;
1553 netif_device_detach(netdev);
1555 if (netif_running(netdev)) {
1556 WARN_ON(test_bit(__ATL2_RESETTING, &adapter->flags));
1561 retval = pci_save_state(pdev);
1566 atl2_read_phy_reg(hw, MII_BMSR, (u16 *)&ctrl);
1567 atl2_read_phy_reg(hw, MII_BMSR, (u16 *)&ctrl);
1568 if (ctrl & BMSR_LSTATUS)
1569 wufc &= ~ATLX_WUFC_LNKC;
1571 if (0 != (ctrl & BMSR_LSTATUS) && 0 != wufc) {
1573 /* get current link speed & duplex */
1574 ret_val = atl2_get_speed_and_duplex(hw, &speed, &duplex);
1577 "%s: get speed&duplex error while suspend\n",
1584 /* turn on magic packet wol */
1585 if (wufc & ATLX_WUFC_MAG)
1586 ctrl |= (WOL_MAGIC_EN | WOL_MAGIC_PME_EN);
1588 /* ignore Link Chg event when Link is up */
1589 ATL2_WRITE_REG(hw, REG_WOL_CTRL, ctrl);
1591 /* Config MAC CTRL Register */
1592 ctrl = MAC_CTRL_RX_EN | MAC_CTRL_MACLP_CLK_PHY;
1593 if (FULL_DUPLEX == adapter->link_duplex)
1594 ctrl |= MAC_CTRL_DUPLX;
1595 ctrl |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1596 ctrl |= (((u32)adapter->hw.preamble_len &
1597 MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
1598 ctrl |= (((u32)(adapter->hw.retry_buf &
1599 MAC_CTRL_HALF_LEFT_BUF_MASK)) <<
1600 MAC_CTRL_HALF_LEFT_BUF_SHIFT);
1601 if (wufc & ATLX_WUFC_MAG) {
1602 /* magic packet maybe Broadcast&multicast&Unicast */
1603 ctrl |= MAC_CTRL_BC_EN;
1606 ATL2_WRITE_REG(hw, REG_MAC_CTRL, ctrl);
1609 ctrl = ATL2_READ_REG(hw, REG_PCIE_PHYMISC);
1610 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
1611 ATL2_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
1612 ctrl = ATL2_READ_REG(hw, REG_PCIE_DLL_TX_CTRL1);
1613 ctrl |= PCIE_DLL_TX_CTRL1_SEL_NOR_CLK;
1614 ATL2_WRITE_REG(hw, REG_PCIE_DLL_TX_CTRL1, ctrl);
1616 pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
1620 if (0 == (ctrl&BMSR_LSTATUS) && 0 != (wufc&ATLX_WUFC_LNKC)) {
1621 /* link is down, so only LINK CHG WOL event enable */
1622 ctrl |= (WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN);
1623 ATL2_WRITE_REG(hw, REG_WOL_CTRL, ctrl);
1624 ATL2_WRITE_REG(hw, REG_MAC_CTRL, 0);
1627 ctrl = ATL2_READ_REG(hw, REG_PCIE_PHYMISC);
1628 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
1629 ATL2_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
1630 ctrl = ATL2_READ_REG(hw, REG_PCIE_DLL_TX_CTRL1);
1631 ctrl |= PCIE_DLL_TX_CTRL1_SEL_NOR_CLK;
1632 ATL2_WRITE_REG(hw, REG_PCIE_DLL_TX_CTRL1, ctrl);
1634 hw->phy_configured = false; /* re-init PHY when resume */
1636 pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
1643 ATL2_WRITE_REG(hw, REG_WOL_CTRL, 0);
1646 ctrl = ATL2_READ_REG(hw, REG_PCIE_PHYMISC);
1647 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
1648 ATL2_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
1649 ctrl = ATL2_READ_REG(hw, REG_PCIE_DLL_TX_CTRL1);
1650 ctrl |= PCIE_DLL_TX_CTRL1_SEL_NOR_CLK;
1651 ATL2_WRITE_REG(hw, REG_PCIE_DLL_TX_CTRL1, ctrl);
1654 hw->phy_configured = false; /* re-init PHY when resume */
1656 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
1659 if (netif_running(netdev))
1660 atl2_free_irq(adapter);
1662 pci_disable_device(pdev);
1664 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1670 static int atl2_resume(struct pci_dev *pdev)
1672 struct net_device *netdev = pci_get_drvdata(pdev);
1673 struct atl2_adapter *adapter = netdev_priv(netdev);
1676 pci_set_power_state(pdev, PCI_D0);
1677 pci_restore_state(pdev);
1679 err = pci_enable_device(pdev);
1682 "atl2: Cannot enable PCI device from suspend\n");
1686 pci_set_master(pdev);
1688 ATL2_READ_REG(&adapter->hw, REG_WOL_CTRL); /* clear WOL status */
1690 pci_enable_wake(pdev, PCI_D3hot, 0);
1691 pci_enable_wake(pdev, PCI_D3cold, 0);
1693 ATL2_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
1695 if (netif_running(netdev)) {
1696 err = atl2_request_irq(adapter);
1701 atl2_reset_hw(&adapter->hw);
1703 if (netif_running(netdev))
1706 netif_device_attach(netdev);
1712 static void atl2_shutdown(struct pci_dev *pdev)
1714 atl2_suspend(pdev, PMSG_SUSPEND);
1717 static struct pci_driver atl2_driver = {
1718 .name = atl2_driver_name,
1719 .id_table = atl2_pci_tbl,
1720 .probe = atl2_probe,
1721 .remove = __devexit_p(atl2_remove),
1722 /* Power Managment Hooks */
1723 .suspend = atl2_suspend,
1725 .resume = atl2_resume,
1727 .shutdown = atl2_shutdown,
1731 * atl2_init_module - Driver Registration Routine
1733 * atl2_init_module is the first routine called when the driver is
1734 * loaded. All it does is register with the PCI subsystem.
1736 static int __init atl2_init_module(void)
1738 printk(KERN_INFO "%s - version %s\n", atl2_driver_string,
1739 atl2_driver_version);
1740 printk(KERN_INFO "%s\n", atl2_copyright);
1741 return pci_register_driver(&atl2_driver);
1743 module_init(atl2_init_module);
1746 * atl2_exit_module - Driver Exit Cleanup Routine
1748 * atl2_exit_module is called just before the driver is removed
1751 static void __exit atl2_exit_module(void)
1753 pci_unregister_driver(&atl2_driver);
1755 module_exit(atl2_exit_module);
1757 static void atl2_read_pci_cfg(struct atl2_hw *hw, u32 reg, u16 *value)
1759 struct atl2_adapter *adapter = hw->back;
1760 pci_read_config_word(adapter->pdev, reg, value);
1763 static void atl2_write_pci_cfg(struct atl2_hw *hw, u32 reg, u16 *value)
1765 struct atl2_adapter *adapter = hw->back;
1766 pci_write_config_word(adapter->pdev, reg, *value);
1769 static int atl2_get_settings(struct net_device *netdev,
1770 struct ethtool_cmd *ecmd)
1772 struct atl2_adapter *adapter = netdev_priv(netdev);
1773 struct atl2_hw *hw = &adapter->hw;
1775 ecmd->supported = (SUPPORTED_10baseT_Half |
1776 SUPPORTED_10baseT_Full |
1777 SUPPORTED_100baseT_Half |
1778 SUPPORTED_100baseT_Full |
1781 ecmd->advertising = ADVERTISED_TP;
1783 ecmd->advertising |= ADVERTISED_Autoneg;
1784 ecmd->advertising |= hw->autoneg_advertised;
1786 ecmd->port = PORT_TP;
1787 ecmd->phy_address = 0;
1788 ecmd->transceiver = XCVR_INTERNAL;
1790 if (adapter->link_speed != SPEED_0) {
1791 ecmd->speed = adapter->link_speed;
1792 if (adapter->link_duplex == FULL_DUPLEX)
1793 ecmd->duplex = DUPLEX_FULL;
1795 ecmd->duplex = DUPLEX_HALF;
1801 ecmd->autoneg = AUTONEG_ENABLE;
1805 static int atl2_set_settings(struct net_device *netdev,
1806 struct ethtool_cmd *ecmd)
1808 struct atl2_adapter *adapter = netdev_priv(netdev);
1809 struct atl2_hw *hw = &adapter->hw;
1811 while (test_and_set_bit(__ATL2_RESETTING, &adapter->flags))
1814 if (ecmd->autoneg == AUTONEG_ENABLE) {
1815 #define MY_ADV_MASK (ADVERTISE_10_HALF | \
1816 ADVERTISE_10_FULL | \
1817 ADVERTISE_100_HALF| \
1820 if ((ecmd->advertising & MY_ADV_MASK) == MY_ADV_MASK) {
1821 hw->MediaType = MEDIA_TYPE_AUTO_SENSOR;
1822 hw->autoneg_advertised = MY_ADV_MASK;
1823 } else if ((ecmd->advertising & MY_ADV_MASK) ==
1824 ADVERTISE_100_FULL) {
1825 hw->MediaType = MEDIA_TYPE_100M_FULL;
1826 hw->autoneg_advertised = ADVERTISE_100_FULL;
1827 } else if ((ecmd->advertising & MY_ADV_MASK) ==
1828 ADVERTISE_100_HALF) {
1829 hw->MediaType = MEDIA_TYPE_100M_HALF;
1830 hw->autoneg_advertised = ADVERTISE_100_HALF;
1831 } else if ((ecmd->advertising & MY_ADV_MASK) ==
1832 ADVERTISE_10_FULL) {
1833 hw->MediaType = MEDIA_TYPE_10M_FULL;
1834 hw->autoneg_advertised = ADVERTISE_10_FULL;
1835 } else if ((ecmd->advertising & MY_ADV_MASK) ==
1836 ADVERTISE_10_HALF) {
1837 hw->MediaType = MEDIA_TYPE_10M_HALF;
1838 hw->autoneg_advertised = ADVERTISE_10_HALF;
1840 clear_bit(__ATL2_RESETTING, &adapter->flags);
1843 ecmd->advertising = hw->autoneg_advertised |
1844 ADVERTISED_TP | ADVERTISED_Autoneg;
1846 clear_bit(__ATL2_RESETTING, &adapter->flags);
1850 /* reset the link */
1851 if (netif_running(adapter->netdev)) {
1855 atl2_reset_hw(&adapter->hw);
1857 clear_bit(__ATL2_RESETTING, &adapter->flags);
1861 static u32 atl2_get_tx_csum(struct net_device *netdev)
1863 return (netdev->features & NETIF_F_HW_CSUM) != 0;
1866 static u32 atl2_get_msglevel(struct net_device *netdev)
1872 * It's sane for this to be empty, but we might want to take advantage of this.
1874 static void atl2_set_msglevel(struct net_device *netdev, u32 data)
1878 static int atl2_get_regs_len(struct net_device *netdev)
1880 #define ATL2_REGS_LEN 42
1881 return sizeof(u32) * ATL2_REGS_LEN;
1884 static void atl2_get_regs(struct net_device *netdev,
1885 struct ethtool_regs *regs, void *p)
1887 struct atl2_adapter *adapter = netdev_priv(netdev);
1888 struct atl2_hw *hw = &adapter->hw;
1892 memset(p, 0, sizeof(u32) * ATL2_REGS_LEN);
1894 regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
1896 regs_buff[0] = ATL2_READ_REG(hw, REG_VPD_CAP);
1897 regs_buff[1] = ATL2_READ_REG(hw, REG_SPI_FLASH_CTRL);
1898 regs_buff[2] = ATL2_READ_REG(hw, REG_SPI_FLASH_CONFIG);
1899 regs_buff[3] = ATL2_READ_REG(hw, REG_TWSI_CTRL);
1900 regs_buff[4] = ATL2_READ_REG(hw, REG_PCIE_DEV_MISC_CTRL);
1901 regs_buff[5] = ATL2_READ_REG(hw, REG_MASTER_CTRL);
1902 regs_buff[6] = ATL2_READ_REG(hw, REG_MANUAL_TIMER_INIT);
1903 regs_buff[7] = ATL2_READ_REG(hw, REG_IRQ_MODU_TIMER_INIT);
1904 regs_buff[8] = ATL2_READ_REG(hw, REG_PHY_ENABLE);
1905 regs_buff[9] = ATL2_READ_REG(hw, REG_CMBDISDMA_TIMER);
1906 regs_buff[10] = ATL2_READ_REG(hw, REG_IDLE_STATUS);
1907 regs_buff[11] = ATL2_READ_REG(hw, REG_MDIO_CTRL);
1908 regs_buff[12] = ATL2_READ_REG(hw, REG_SERDES_LOCK);
1909 regs_buff[13] = ATL2_READ_REG(hw, REG_MAC_CTRL);
1910 regs_buff[14] = ATL2_READ_REG(hw, REG_MAC_IPG_IFG);
1911 regs_buff[15] = ATL2_READ_REG(hw, REG_MAC_STA_ADDR);
1912 regs_buff[16] = ATL2_READ_REG(hw, REG_MAC_STA_ADDR+4);
1913 regs_buff[17] = ATL2_READ_REG(hw, REG_RX_HASH_TABLE);
1914 regs_buff[18] = ATL2_READ_REG(hw, REG_RX_HASH_TABLE+4);
1915 regs_buff[19] = ATL2_READ_REG(hw, REG_MAC_HALF_DUPLX_CTRL);
1916 regs_buff[20] = ATL2_READ_REG(hw, REG_MTU);
1917 regs_buff[21] = ATL2_READ_REG(hw, REG_WOL_CTRL);
1918 regs_buff[22] = ATL2_READ_REG(hw, REG_SRAM_TXRAM_END);
1919 regs_buff[23] = ATL2_READ_REG(hw, REG_DESC_BASE_ADDR_HI);
1920 regs_buff[24] = ATL2_READ_REG(hw, REG_TXD_BASE_ADDR_LO);
1921 regs_buff[25] = ATL2_READ_REG(hw, REG_TXD_MEM_SIZE);
1922 regs_buff[26] = ATL2_READ_REG(hw, REG_TXS_BASE_ADDR_LO);
1923 regs_buff[27] = ATL2_READ_REG(hw, REG_TXS_MEM_SIZE);
1924 regs_buff[28] = ATL2_READ_REG(hw, REG_RXD_BASE_ADDR_LO);
1925 regs_buff[29] = ATL2_READ_REG(hw, REG_RXD_BUF_NUM);
1926 regs_buff[30] = ATL2_READ_REG(hw, REG_DMAR);
1927 regs_buff[31] = ATL2_READ_REG(hw, REG_TX_CUT_THRESH);
1928 regs_buff[32] = ATL2_READ_REG(hw, REG_DMAW);
1929 regs_buff[33] = ATL2_READ_REG(hw, REG_PAUSE_ON_TH);
1930 regs_buff[34] = ATL2_READ_REG(hw, REG_PAUSE_OFF_TH);
1931 regs_buff[35] = ATL2_READ_REG(hw, REG_MB_TXD_WR_IDX);
1932 regs_buff[36] = ATL2_READ_REG(hw, REG_MB_RXD_RD_IDX);
1933 regs_buff[38] = ATL2_READ_REG(hw, REG_ISR);
1934 regs_buff[39] = ATL2_READ_REG(hw, REG_IMR);
1936 atl2_read_phy_reg(hw, MII_BMCR, &phy_data);
1937 regs_buff[40] = (u32)phy_data;
1938 atl2_read_phy_reg(hw, MII_BMSR, &phy_data);
1939 regs_buff[41] = (u32)phy_data;
1942 static int atl2_get_eeprom_len(struct net_device *netdev)
1944 struct atl2_adapter *adapter = netdev_priv(netdev);
1946 if (!atl2_check_eeprom_exist(&adapter->hw))
1952 static int atl2_get_eeprom(struct net_device *netdev,
1953 struct ethtool_eeprom *eeprom, u8 *bytes)
1955 struct atl2_adapter *adapter = netdev_priv(netdev);
1956 struct atl2_hw *hw = &adapter->hw;
1958 int first_dword, last_dword;
1962 if (eeprom->len == 0)
1965 if (atl2_check_eeprom_exist(hw))
1968 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
1970 first_dword = eeprom->offset >> 2;
1971 last_dword = (eeprom->offset + eeprom->len - 1) >> 2;
1973 eeprom_buff = kmalloc(sizeof(u32) * (last_dword - first_dword + 1),
1978 for (i = first_dword; i < last_dword; i++) {
1979 if (!atl2_read_eeprom(hw, i*4, &(eeprom_buff[i-first_dword]))) {
1985 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 3),
1993 static int atl2_set_eeprom(struct net_device *netdev,
1994 struct ethtool_eeprom *eeprom, u8 *bytes)
1996 struct atl2_adapter *adapter = netdev_priv(netdev);
1997 struct atl2_hw *hw = &adapter->hw;
2000 int max_len, first_dword, last_dword, ret_val = 0;
2003 if (eeprom->len == 0)
2006 if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
2011 first_dword = eeprom->offset >> 2;
2012 last_dword = (eeprom->offset + eeprom->len - 1) >> 2;
2013 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
2017 ptr = (u32 *)eeprom_buff;
2019 if (eeprom->offset & 3) {
2020 /* need read/modify/write of first changed EEPROM word */
2021 /* only the second byte of the word is being modified */
2022 if (!atl2_read_eeprom(hw, first_dword*4, &(eeprom_buff[0])))
2026 if (((eeprom->offset + eeprom->len) & 3)) {
2028 * need read/modify/write of last changed EEPROM word
2029 * only the first byte of the word is being modified
2031 if (!atl2_read_eeprom(hw, last_dword * 4,
2032 &(eeprom_buff[last_dword - first_dword])))
2036 /* Device's eeprom is always little-endian, word addressable */
2037 memcpy(ptr, bytes, eeprom->len);
2039 for (i = 0; i < last_dword - first_dword + 1; i++) {
2040 if (!atl2_write_eeprom(hw, ((first_dword+i)*4), eeprom_buff[i]))
2048 static void atl2_get_drvinfo(struct net_device *netdev,
2049 struct ethtool_drvinfo *drvinfo)
2051 struct atl2_adapter *adapter = netdev_priv(netdev);
2053 strncpy(drvinfo->driver, atl2_driver_name, 32);
2054 strncpy(drvinfo->version, atl2_driver_version, 32);
2055 strncpy(drvinfo->fw_version, "L2", 32);
2056 strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
2057 drvinfo->n_stats = 0;
2058 drvinfo->testinfo_len = 0;
2059 drvinfo->regdump_len = atl2_get_regs_len(netdev);
2060 drvinfo->eedump_len = atl2_get_eeprom_len(netdev);
2063 static void atl2_get_wol(struct net_device *netdev,
2064 struct ethtool_wolinfo *wol)
2066 struct atl2_adapter *adapter = netdev_priv(netdev);
2068 wol->supported = WAKE_MAGIC;
2071 if (adapter->wol & ATLX_WUFC_EX)
2072 wol->wolopts |= WAKE_UCAST;
2073 if (adapter->wol & ATLX_WUFC_MC)
2074 wol->wolopts |= WAKE_MCAST;
2075 if (adapter->wol & ATLX_WUFC_BC)
2076 wol->wolopts |= WAKE_BCAST;
2077 if (adapter->wol & ATLX_WUFC_MAG)
2078 wol->wolopts |= WAKE_MAGIC;
2079 if (adapter->wol & ATLX_WUFC_LNKC)
2080 wol->wolopts |= WAKE_PHY;
2083 static int atl2_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2085 struct atl2_adapter *adapter = netdev_priv(netdev);
2087 if (wol->wolopts & (WAKE_ARP | WAKE_MAGICSECURE))
2090 if (wol->wolopts & (WAKE_UCAST | WAKE_BCAST | WAKE_MCAST))
2093 /* these settings will always override what we currently have */
2096 if (wol->wolopts & WAKE_MAGIC)
2097 adapter->wol |= ATLX_WUFC_MAG;
2098 if (wol->wolopts & WAKE_PHY)
2099 adapter->wol |= ATLX_WUFC_LNKC;
2104 static int atl2_nway_reset(struct net_device *netdev)
2106 struct atl2_adapter *adapter = netdev_priv(netdev);
2107 if (netif_running(netdev))
2108 atl2_reinit_locked(adapter);
2112 static const struct ethtool_ops atl2_ethtool_ops = {
2113 .get_settings = atl2_get_settings,
2114 .set_settings = atl2_set_settings,
2115 .get_drvinfo = atl2_get_drvinfo,
2116 .get_regs_len = atl2_get_regs_len,
2117 .get_regs = atl2_get_regs,
2118 .get_wol = atl2_get_wol,
2119 .set_wol = atl2_set_wol,
2120 .get_msglevel = atl2_get_msglevel,
2121 .set_msglevel = atl2_set_msglevel,
2122 .nway_reset = atl2_nway_reset,
2123 .get_link = ethtool_op_get_link,
2124 .get_eeprom_len = atl2_get_eeprom_len,
2125 .get_eeprom = atl2_get_eeprom,
2126 .set_eeprom = atl2_set_eeprom,
2127 .get_tx_csum = atl2_get_tx_csum,
2128 .get_sg = ethtool_op_get_sg,
2129 .set_sg = ethtool_op_set_sg,
2131 .get_tso = ethtool_op_get_tso,
2135 static void atl2_set_ethtool_ops(struct net_device *netdev)
2137 SET_ETHTOOL_OPS(netdev, &atl2_ethtool_ops);
2140 #define LBYTESWAP(a) ((((a) & 0x00ff00ff) << 8) | \
2141 (((a) & 0xff00ff00) >> 8))
2142 #define LONGSWAP(a) ((LBYTESWAP(a) << 16) | (LBYTESWAP(a) >> 16))
2143 #define SHORTSWAP(a) (((a) << 8) | ((a) >> 8))
2146 * Reset the transmit and receive units; mask and clear all interrupts.
2148 * hw - Struct containing variables accessed by shared code
2149 * return : 0 or idle status (if error)
2151 static s32 atl2_reset_hw(struct atl2_hw *hw)
2154 u16 pci_cfg_cmd_word;
2157 /* Workaround for PCI problem when BIOS sets MMRBC incorrectly. */
2158 atl2_read_pci_cfg(hw, PCI_REG_COMMAND, &pci_cfg_cmd_word);
2159 if ((pci_cfg_cmd_word &
2160 (CMD_IO_SPACE|CMD_MEMORY_SPACE|CMD_BUS_MASTER)) !=
2161 (CMD_IO_SPACE|CMD_MEMORY_SPACE|CMD_BUS_MASTER)) {
2163 (CMD_IO_SPACE|CMD_MEMORY_SPACE|CMD_BUS_MASTER);
2164 atl2_write_pci_cfg(hw, PCI_REG_COMMAND, &pci_cfg_cmd_word);
2167 /* Clear Interrupt mask to stop board from generating
2168 * interrupts & Clear any pending interrupt events
2171 /* ATL2_WRITE_REG(hw, REG_IMR, 0); */
2172 /* ATL2_WRITE_REG(hw, REG_ISR, 0xffffffff); */
2174 /* Issue Soft Reset to the MAC. This will reset the chip's
2175 * transmit, receive, DMA. It will not effect
2176 * the current PCI configuration. The global reset bit is self-
2177 * clearing, and should clear within a microsecond.
2179 ATL2_WRITE_REG(hw, REG_MASTER_CTRL, MASTER_CTRL_SOFT_RST);
2181 msleep(1); /* delay about 1ms */
2183 /* Wait at least 10ms for All module to be Idle */
2184 for (i = 0; i < 10; i++) {
2185 icr = ATL2_READ_REG(hw, REG_IDLE_STATUS);
2188 msleep(1); /* delay 1 ms */
2198 #define CUSTOM_SPI_CS_SETUP 2
2199 #define CUSTOM_SPI_CLK_HI 2
2200 #define CUSTOM_SPI_CLK_LO 2
2201 #define CUSTOM_SPI_CS_HOLD 2
2202 #define CUSTOM_SPI_CS_HI 3
2204 static struct atl2_spi_flash_dev flash_table[] =
2206 /* MFR WRSR READ PROGRAM WREN WRDI RDSR RDID SECTOR_ERASE CHIP_ERASE */
2207 {"Atmel", 0x0, 0x03, 0x02, 0x06, 0x04, 0x05, 0x15, 0x52, 0x62 },
2208 {"SST", 0x01, 0x03, 0x02, 0x06, 0x04, 0x05, 0x90, 0x20, 0x60 },
2209 {"ST", 0x01, 0x03, 0x02, 0x06, 0x04, 0x05, 0xAB, 0xD8, 0xC7 },
2212 static bool atl2_spi_read(struct atl2_hw *hw, u32 addr, u32 *buf)
2217 ATL2_WRITE_REG(hw, REG_SPI_DATA, 0);
2218 ATL2_WRITE_REG(hw, REG_SPI_ADDR, addr);
2220 value = SPI_FLASH_CTRL_WAIT_READY |
2221 (CUSTOM_SPI_CS_SETUP & SPI_FLASH_CTRL_CS_SETUP_MASK) <<
2222 SPI_FLASH_CTRL_CS_SETUP_SHIFT |
2223 (CUSTOM_SPI_CLK_HI & SPI_FLASH_CTRL_CLK_HI_MASK) <<
2224 SPI_FLASH_CTRL_CLK_HI_SHIFT |
2225 (CUSTOM_SPI_CLK_LO & SPI_FLASH_CTRL_CLK_LO_MASK) <<
2226 SPI_FLASH_CTRL_CLK_LO_SHIFT |
2227 (CUSTOM_SPI_CS_HOLD & SPI_FLASH_CTRL_CS_HOLD_MASK) <<
2228 SPI_FLASH_CTRL_CS_HOLD_SHIFT |
2229 (CUSTOM_SPI_CS_HI & SPI_FLASH_CTRL_CS_HI_MASK) <<
2230 SPI_FLASH_CTRL_CS_HI_SHIFT |
2231 (0x1 & SPI_FLASH_CTRL_INS_MASK) << SPI_FLASH_CTRL_INS_SHIFT;
2233 ATL2_WRITE_REG(hw, REG_SPI_FLASH_CTRL, value);
2235 value |= SPI_FLASH_CTRL_START;
2237 ATL2_WRITE_REG(hw, REG_SPI_FLASH_CTRL, value);
2239 for (i = 0; i < 10; i++) {
2241 value = ATL2_READ_REG(hw, REG_SPI_FLASH_CTRL);
2242 if (!(value & SPI_FLASH_CTRL_START))
2246 if (value & SPI_FLASH_CTRL_START)
2249 *buf = ATL2_READ_REG(hw, REG_SPI_DATA);
2255 * get_permanent_address
2256 * return 0 if get valid mac address,
2258 static int get_permanent_address(struct atl2_hw *hw)
2263 u8 EthAddr[NODE_ADDRESS_SIZE];
2266 if (is_valid_ether_addr(hw->perm_mac_addr))
2272 if (!atl2_check_eeprom_exist(hw)) { /* eeprom exists */
2276 /* Read out all EEPROM content */
2279 if (atl2_read_eeprom(hw, i + 0x100, &Control)) {
2281 if (Register == REG_MAC_STA_ADDR)
2283 else if (Register ==
2284 (REG_MAC_STA_ADDR + 4))
2287 } else if ((Control & 0xff) == 0x5A) {
2289 Register = (u16) (Control >> 16);
2291 /* assume data end while encount an invalid KEYWORD */
2295 break; /* read error */
2300 *(u32 *) &EthAddr[2] = LONGSWAP(Addr[0]);
2301 *(u16 *) &EthAddr[0] = SHORTSWAP(*(u16 *) &Addr[1]);
2303 if (is_valid_ether_addr(EthAddr)) {
2304 memcpy(hw->perm_mac_addr, EthAddr, NODE_ADDRESS_SIZE);
2310 /* see if SPI flash exists? */
2317 if (atl2_spi_read(hw, i + 0x1f000, &Control)) {
2319 if (Register == REG_MAC_STA_ADDR)
2321 else if (Register == (REG_MAC_STA_ADDR + 4))
2324 } else if ((Control & 0xff) == 0x5A) {
2326 Register = (u16) (Control >> 16);
2328 break; /* data end */
2331 break; /* read error */
2336 *(u32 *) &EthAddr[2] = LONGSWAP(Addr[0]);
2337 *(u16 *) &EthAddr[0] = SHORTSWAP(*(u16 *)&Addr[1]);
2338 if (is_valid_ether_addr(EthAddr)) {
2339 memcpy(hw->perm_mac_addr, EthAddr, NODE_ADDRESS_SIZE);
2342 /* maybe MAC-address is from BIOS */
2343 Addr[0] = ATL2_READ_REG(hw, REG_MAC_STA_ADDR);
2344 Addr[1] = ATL2_READ_REG(hw, REG_MAC_STA_ADDR + 4);
2345 *(u32 *) &EthAddr[2] = LONGSWAP(Addr[0]);
2346 *(u16 *) &EthAddr[0] = SHORTSWAP(*(u16 *) &Addr[1]);
2348 if (is_valid_ether_addr(EthAddr)) {
2349 memcpy(hw->perm_mac_addr, EthAddr, NODE_ADDRESS_SIZE);
2357 * Reads the adapter's MAC address from the EEPROM
2359 * hw - Struct containing variables accessed by shared code
2361 static s32 atl2_read_mac_addr(struct atl2_hw *hw)
2365 if (get_permanent_address(hw)) {
2367 /* FIXME: shouldn't we use random_ether_addr() here? */
2368 hw->perm_mac_addr[0] = 0x00;
2369 hw->perm_mac_addr[1] = 0x13;
2370 hw->perm_mac_addr[2] = 0x74;
2371 hw->perm_mac_addr[3] = 0x00;
2372 hw->perm_mac_addr[4] = 0x5c;
2373 hw->perm_mac_addr[5] = 0x38;
2376 for (i = 0; i < NODE_ADDRESS_SIZE; i++)
2377 hw->mac_addr[i] = hw->perm_mac_addr[i];
2383 * Hashes an address to determine its location in the multicast table
2385 * hw - Struct containing variables accessed by shared code
2386 * mc_addr - the multicast address to hash
2390 * set hash value for a multicast address
2391 * hash calcu processing :
2392 * 1. calcu 32bit CRC for multicast address
2393 * 2. reverse crc with MSB to LSB
2395 static u32 atl2_hash_mc_addr(struct atl2_hw *hw, u8 *mc_addr)
2401 crc32 = ether_crc_le(6, mc_addr);
2403 for (i = 0; i < 32; i++)
2404 value |= (((crc32 >> i) & 1) << (31 - i));
2410 * Sets the bit in the multicast table corresponding to the hash value.
2412 * hw - Struct containing variables accessed by shared code
2413 * hash_value - Multicast address hash value
2415 static void atl2_hash_set(struct atl2_hw *hw, u32 hash_value)
2417 u32 hash_bit, hash_reg;
2420 /* The HASH Table is a register array of 2 32-bit registers.
2421 * It is treated like an array of 64 bits. We want to set
2422 * bit BitArray[hash_value]. So we figure out what register
2423 * the bit is in, read it, OR in the new bit, then write
2424 * back the new value. The register is determined by the
2425 * upper 7 bits of the hash value and the bit within that
2426 * register are determined by the lower 5 bits of the value.
2428 hash_reg = (hash_value >> 31) & 0x1;
2429 hash_bit = (hash_value >> 26) & 0x1F;
2431 mta = ATL2_READ_REG_ARRAY(hw, REG_RX_HASH_TABLE, hash_reg);
2433 mta |= (1 << hash_bit);
2435 ATL2_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, hash_reg, mta);
2439 * atl2_init_pcie - init PCIE module
2441 static void atl2_init_pcie(struct atl2_hw *hw)
2444 value = LTSSM_TEST_MODE_DEF;
2445 ATL2_WRITE_REG(hw, REG_LTSSM_TEST_MODE, value);
2447 value = PCIE_DLL_TX_CTRL1_DEF;
2448 ATL2_WRITE_REG(hw, REG_PCIE_DLL_TX_CTRL1, value);
2451 static void atl2_init_flash_opcode(struct atl2_hw *hw)
2453 if (hw->flash_vendor >= ARRAY_SIZE(flash_table))
2454 hw->flash_vendor = 0; /* ATMEL */
2457 ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_PROGRAM,
2458 flash_table[hw->flash_vendor].cmdPROGRAM);
2459 ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_SC_ERASE,
2460 flash_table[hw->flash_vendor].cmdSECTOR_ERASE);
2461 ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_CHIP_ERASE,
2462 flash_table[hw->flash_vendor].cmdCHIP_ERASE);
2463 ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_RDID,
2464 flash_table[hw->flash_vendor].cmdRDID);
2465 ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_WREN,
2466 flash_table[hw->flash_vendor].cmdWREN);
2467 ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_RDSR,
2468 flash_table[hw->flash_vendor].cmdRDSR);
2469 ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_WRSR,
2470 flash_table[hw->flash_vendor].cmdWRSR);
2471 ATL2_WRITE_REGB(hw, REG_SPI_FLASH_OP_READ,
2472 flash_table[hw->flash_vendor].cmdREAD);
2475 /********************************************************************
2476 * Performs basic configuration of the adapter.
2478 * hw - Struct containing variables accessed by shared code
2479 * Assumes that the controller has previously been reset and is in a
2480 * post-reset uninitialized state. Initializes multicast table,
2481 * and Calls routines to setup link
2482 * Leaves the transmit and receive units disabled and uninitialized.
2483 ********************************************************************/
2484 static s32 atl2_init_hw(struct atl2_hw *hw)
2490 /* Zero out the Multicast HASH table */
2491 /* clear the old settings from the multicast hash table */
2492 ATL2_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
2493 ATL2_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
2495 atl2_init_flash_opcode(hw);
2497 ret_val = atl2_phy_init(hw);
2503 * Detects the current speed and duplex settings of the hardware.
2505 * hw - Struct containing variables accessed by shared code
2506 * speed - Speed of the connection
2507 * duplex - Duplex setting of the connection
2509 static s32 atl2_get_speed_and_duplex(struct atl2_hw *hw, u16 *speed,
2515 /* Read PHY Specific Status Register (17) */
2516 ret_val = atl2_read_phy_reg(hw, MII_ATLX_PSSR, &phy_data);
2520 if (!(phy_data & MII_ATLX_PSSR_SPD_DPLX_RESOLVED))
2521 return ATLX_ERR_PHY_RES;
2523 switch (phy_data & MII_ATLX_PSSR_SPEED) {
2524 case MII_ATLX_PSSR_100MBS:
2527 case MII_ATLX_PSSR_10MBS:
2531 return ATLX_ERR_PHY_SPEED;
2535 if (phy_data & MII_ATLX_PSSR_DPLX)
2536 *duplex = FULL_DUPLEX;
2538 *duplex = HALF_DUPLEX;
2544 * Reads the value from a PHY register
2545 * hw - Struct containing variables accessed by shared code
2546 * reg_addr - address of the PHY register to read
2548 static s32 atl2_read_phy_reg(struct atl2_hw *hw, u16 reg_addr, u16 *phy_data)
2553 val = ((u32)(reg_addr & MDIO_REG_ADDR_MASK)) << MDIO_REG_ADDR_SHIFT |
2557 MDIO_CLK_25_4 << MDIO_CLK_SEL_SHIFT;
2558 ATL2_WRITE_REG(hw, REG_MDIO_CTRL, val);
2562 for (i = 0; i < MDIO_WAIT_TIMES; i++) {
2564 val = ATL2_READ_REG(hw, REG_MDIO_CTRL);
2565 if (!(val & (MDIO_START | MDIO_BUSY)))
2569 if (!(val & (MDIO_START | MDIO_BUSY))) {
2570 *phy_data = (u16)val;
2574 return ATLX_ERR_PHY;
2578 * Writes a value to a PHY register
2579 * hw - Struct containing variables accessed by shared code
2580 * reg_addr - address of the PHY register to write
2581 * data - data to write to the PHY
2583 static s32 atl2_write_phy_reg(struct atl2_hw *hw, u32 reg_addr, u16 phy_data)
2588 val = ((u32)(phy_data & MDIO_DATA_MASK)) << MDIO_DATA_SHIFT |
2589 (reg_addr & MDIO_REG_ADDR_MASK) << MDIO_REG_ADDR_SHIFT |
2592 MDIO_CLK_25_4 << MDIO_CLK_SEL_SHIFT;
2593 ATL2_WRITE_REG(hw, REG_MDIO_CTRL, val);
2597 for (i = 0; i < MDIO_WAIT_TIMES; i++) {
2599 val = ATL2_READ_REG(hw, REG_MDIO_CTRL);
2600 if (!(val & (MDIO_START | MDIO_BUSY)))
2606 if (!(val & (MDIO_START | MDIO_BUSY)))
2609 return ATLX_ERR_PHY;
2613 * Configures PHY autoneg and flow control advertisement settings
2615 * hw - Struct containing variables accessed by shared code
2617 static s32 atl2_phy_setup_autoneg_adv(struct atl2_hw *hw)
2620 s16 mii_autoneg_adv_reg;
2622 /* Read the MII Auto-Neg Advertisement Register (Address 4). */
2623 mii_autoneg_adv_reg = MII_AR_DEFAULT_CAP_MASK;
2625 /* Need to parse autoneg_advertised and set up
2626 * the appropriate PHY registers. First we will parse for
2627 * autoneg_advertised software override. Since we can advertise
2628 * a plethora of combinations, we need to check each bit
2632 /* First we clear all the 10/100 mb speed bits in the Auto-Neg
2633 * Advertisement Register (Address 4) and the 1000 mb speed bits in
2634 * the 1000Base-T Control Register (Address 9). */
2635 mii_autoneg_adv_reg &= ~MII_AR_SPEED_MASK;
2637 /* Need to parse MediaType and setup the
2638 * appropriate PHY registers. */
2639 switch (hw->MediaType) {
2640 case MEDIA_TYPE_AUTO_SENSOR:
2641 mii_autoneg_adv_reg |=
2642 (MII_AR_10T_HD_CAPS |
2643 MII_AR_10T_FD_CAPS |
2644 MII_AR_100TX_HD_CAPS|
2645 MII_AR_100TX_FD_CAPS);
2646 hw->autoneg_advertised =
2652 case MEDIA_TYPE_100M_FULL:
2653 mii_autoneg_adv_reg |= MII_AR_100TX_FD_CAPS;
2654 hw->autoneg_advertised = ADVERTISE_100_FULL;
2656 case MEDIA_TYPE_100M_HALF:
2657 mii_autoneg_adv_reg |= MII_AR_100TX_HD_CAPS;
2658 hw->autoneg_advertised = ADVERTISE_100_HALF;
2660 case MEDIA_TYPE_10M_FULL:
2661 mii_autoneg_adv_reg |= MII_AR_10T_FD_CAPS;
2662 hw->autoneg_advertised = ADVERTISE_10_FULL;
2665 mii_autoneg_adv_reg |= MII_AR_10T_HD_CAPS;
2666 hw->autoneg_advertised = ADVERTISE_10_HALF;
2670 /* flow control fixed to enable all */
2671 mii_autoneg_adv_reg |= (MII_AR_ASM_DIR | MII_AR_PAUSE);
2673 hw->mii_autoneg_adv_reg = mii_autoneg_adv_reg;
2675 ret_val = atl2_write_phy_reg(hw, MII_ADVERTISE, mii_autoneg_adv_reg);
2684 * Resets the PHY and make all config validate
2686 * hw - Struct containing variables accessed by shared code
2688 * Sets bit 15 and 12 of the MII Control regiser (for F001 bug)
2690 static s32 atl2_phy_commit(struct atl2_hw *hw)
2695 phy_data = MII_CR_RESET | MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG;
2696 ret_val = atl2_write_phy_reg(hw, MII_BMCR, phy_data);
2700 /* pcie serdes link may be down ! */
2701 for (i = 0; i < 25; i++) {
2703 val = ATL2_READ_REG(hw, REG_MDIO_CTRL);
2704 if (!(val & (MDIO_START | MDIO_BUSY)))
2708 if (0 != (val & (MDIO_START | MDIO_BUSY))) {
2709 printk(KERN_ERR "atl2: PCIe link down for at least 25ms !\n");
2716 static s32 atl2_phy_init(struct atl2_hw *hw)
2721 if (hw->phy_configured)
2725 ATL2_WRITE_REGW(hw, REG_PHY_ENABLE, 1);
2726 ATL2_WRITE_FLUSH(hw);
2729 /* check if the PHY is in powersaving mode */
2730 atl2_write_phy_reg(hw, MII_DBG_ADDR, 0);
2731 atl2_read_phy_reg(hw, MII_DBG_DATA, &phy_val);
2733 /* 024E / 124E 0r 0274 / 1274 ? */
2734 if (phy_val & 0x1000) {
2736 atl2_write_phy_reg(hw, MII_DBG_DATA, phy_val);
2741 /*Enable PHY LinkChange Interrupt */
2742 ret_val = atl2_write_phy_reg(hw, 18, 0xC00);
2746 /* setup AutoNeg parameters */
2747 ret_val = atl2_phy_setup_autoneg_adv(hw);
2751 /* SW.Reset & En-Auto-Neg to restart Auto-Neg */
2752 ret_val = atl2_phy_commit(hw);
2756 hw->phy_configured = true;
2761 static void atl2_set_mac_addr(struct atl2_hw *hw)
2764 /* 00-0B-6A-F6-00-DC
2765 * 0: 6AF600DC 1: 000B
2767 value = (((u32)hw->mac_addr[2]) << 24) |
2768 (((u32)hw->mac_addr[3]) << 16) |
2769 (((u32)hw->mac_addr[4]) << 8) |
2770 (((u32)hw->mac_addr[5]));
2771 ATL2_WRITE_REG_ARRAY(hw, REG_MAC_STA_ADDR, 0, value);
2773 value = (((u32)hw->mac_addr[0]) << 8) |
2774 (((u32)hw->mac_addr[1]));
2775 ATL2_WRITE_REG_ARRAY(hw, REG_MAC_STA_ADDR, 1, value);
2779 * check_eeprom_exist
2780 * return 0 if eeprom exist
2782 static int atl2_check_eeprom_exist(struct atl2_hw *hw)
2786 value = ATL2_READ_REG(hw, REG_SPI_FLASH_CTRL);
2787 if (value & SPI_FLASH_CTRL_EN_VPD) {
2788 value &= ~SPI_FLASH_CTRL_EN_VPD;
2789 ATL2_WRITE_REG(hw, REG_SPI_FLASH_CTRL, value);
2791 value = ATL2_READ_REGW(hw, REG_PCIE_CAP_LIST);
2792 return ((value & 0xFF00) == 0x6C00) ? 0 : 1;
2795 /* FIXME: This doesn't look right. -- CHS */
2796 static bool atl2_write_eeprom(struct atl2_hw *hw, u32 offset, u32 value)
2801 static bool atl2_read_eeprom(struct atl2_hw *hw, u32 Offset, u32 *pValue)
2807 return false; /* address do not align */
2809 ATL2_WRITE_REG(hw, REG_VPD_DATA, 0);
2810 Control = (Offset & VPD_CAP_VPD_ADDR_MASK) << VPD_CAP_VPD_ADDR_SHIFT;
2811 ATL2_WRITE_REG(hw, REG_VPD_CAP, Control);
2813 for (i = 0; i < 10; i++) {
2815 Control = ATL2_READ_REG(hw, REG_VPD_CAP);
2816 if (Control & VPD_CAP_VPD_FLAG)
2820 if (Control & VPD_CAP_VPD_FLAG) {
2821 *pValue = ATL2_READ_REG(hw, REG_VPD_DATA);
2824 return false; /* timeout */
2827 static void atl2_force_ps(struct atl2_hw *hw)
2831 atl2_write_phy_reg(hw, MII_DBG_ADDR, 0);
2832 atl2_read_phy_reg(hw, MII_DBG_DATA, &phy_val);
2833 atl2_write_phy_reg(hw, MII_DBG_DATA, phy_val | 0x1000);
2835 atl2_write_phy_reg(hw, MII_DBG_ADDR, 2);
2836 atl2_write_phy_reg(hw, MII_DBG_DATA, 0x3000);
2837 atl2_write_phy_reg(hw, MII_DBG_ADDR, 3);
2838 atl2_write_phy_reg(hw, MII_DBG_DATA, 0);
2841 /* This is the only thing that needs to be changed to adjust the
2842 * maximum number of ports that the driver can manage.
2844 #define ATL2_MAX_NIC 4
2846 #define OPTION_UNSET -1
2847 #define OPTION_DISABLED 0
2848 #define OPTION_ENABLED 1
2850 /* All parameters are treated the same, as an integer array of values.
2851 * This macro just reduces the need to repeat the same declaration code
2852 * over and over (plus this helps to avoid typo bugs).
2854 #define ATL2_PARAM_INIT {[0 ... ATL2_MAX_NIC] = OPTION_UNSET}
2855 #ifndef module_param_array
2856 /* Module Parameters are always initialized to -1, so that the driver
2857 * can tell the difference between no user specified value or the
2858 * user asking for the default value.
2859 * The true default values are loaded in when atl2_check_options is called.
2861 * This is a GCC extension to ANSI C.
2862 * See the item "Labeled Elements in Initializers" in the section
2863 * "Extensions to the C Language Family" of the GCC documentation.
2866 #define ATL2_PARAM(X, desc) \
2867 static const int __devinitdata X[ATL2_MAX_NIC + 1] = ATL2_PARAM_INIT; \
2868 MODULE_PARM(X, "1-" __MODULE_STRING(ATL2_MAX_NIC) "i"); \
2869 MODULE_PARM_DESC(X, desc);
2871 #define ATL2_PARAM(X, desc) \
2872 static int __devinitdata X[ATL2_MAX_NIC+1] = ATL2_PARAM_INIT; \
2873 static unsigned int num_##X; \
2874 module_param_array_named(X, X, int, &num_##X, 0); \
2875 MODULE_PARM_DESC(X, desc);
2879 * Transmit Memory Size
2880 * Valid Range: 64-2048
2881 * Default Value: 128
2883 #define ATL2_MIN_TX_MEMSIZE 4 /* 4KB */
2884 #define ATL2_MAX_TX_MEMSIZE 64 /* 64KB */
2885 #define ATL2_DEFAULT_TX_MEMSIZE 8 /* 8KB */
2886 ATL2_PARAM(TxMemSize, "Bytes of Transmit Memory");
2889 * Receive Memory Block Count
2890 * Valid Range: 16-512
2891 * Default Value: 128
2893 #define ATL2_MIN_RXD_COUNT 16
2894 #define ATL2_MAX_RXD_COUNT 512
2895 #define ATL2_DEFAULT_RXD_COUNT 64
2896 ATL2_PARAM(RxMemBlock, "Number of receive memory block");
2899 * User Specified MediaType Override
2902 * - 0 - auto-negotiate at all supported speeds
2903 * - 1 - only link at 1000Mbps Full Duplex
2904 * - 2 - only link at 100Mbps Full Duplex
2905 * - 3 - only link at 100Mbps Half Duplex
2906 * - 4 - only link at 10Mbps Full Duplex
2907 * - 5 - only link at 10Mbps Half Duplex
2910 ATL2_PARAM(MediaType, "MediaType Select");
2913 * Interrupt Moderate Timer in units of 2048 ns (~2 us)
2914 * Valid Range: 10-65535
2915 * Default Value: 45000(90ms)
2917 #define INT_MOD_DEFAULT_CNT 100 /* 200us */
2918 #define INT_MOD_MAX_CNT 65000
2919 #define INT_MOD_MIN_CNT 50
2920 ATL2_PARAM(IntModTimer, "Interrupt Moderator Timer");
2929 ATL2_PARAM(FlashVendor, "SPI Flash Vendor");
2931 #define AUTONEG_ADV_DEFAULT 0x2F
2932 #define AUTONEG_ADV_MASK 0x2F
2933 #define FLOW_CONTROL_DEFAULT FLOW_CONTROL_FULL
2935 #define FLASH_VENDOR_DEFAULT 0
2936 #define FLASH_VENDOR_MIN 0
2937 #define FLASH_VENDOR_MAX 2
2939 struct atl2_option {
2940 enum { enable_option, range_option, list_option } type;
2945 struct { /* range_option info */
2949 struct { /* list_option info */
2951 struct atl2_opt_list { int i; char *str; } *p;
2956 static int __devinit atl2_validate_option(int *value, struct atl2_option *opt)
2959 struct atl2_opt_list *ent;
2961 if (*value == OPTION_UNSET) {
2966 switch (opt->type) {
2969 case OPTION_ENABLED:
2970 printk(KERN_INFO "%s Enabled\n", opt->name);
2973 case OPTION_DISABLED:
2974 printk(KERN_INFO "%s Disabled\n", opt->name);
2980 if (*value >= opt->arg.r.min && *value <= opt->arg.r.max) {
2981 printk(KERN_INFO "%s set to %i\n", opt->name, *value);
2986 for (i = 0; i < opt->arg.l.nr; i++) {
2987 ent = &opt->arg.l.p[i];
2988 if (*value == ent->i) {
2989 if (ent->str[0] != '\0')
2990 printk(KERN_INFO "%s\n", ent->str);
2999 printk(KERN_INFO "Invalid %s specified (%i) %s\n",
3000 opt->name, *value, opt->err);
3006 * atl2_check_options - Range Checking for Command Line Parameters
3007 * @adapter: board private structure
3009 * This routine checks all command line parameters for valid user
3010 * input. If an invalid value is given, or if no user specified
3011 * value exists, a default value is used. The final value is stored
3012 * in a variable in the adapter structure.
3014 static void __devinit atl2_check_options(struct atl2_adapter *adapter)
3017 struct atl2_option opt;
3018 int bd = adapter->bd_number;
3019 if (bd >= ATL2_MAX_NIC) {
3020 printk(KERN_NOTICE "Warning: no configuration for board #%i\n",
3022 printk(KERN_NOTICE "Using defaults for all values\n");
3023 #ifndef module_param_array
3028 /* Bytes of Transmit Memory */
3029 opt.type = range_option;
3030 opt.name = "Bytes of Transmit Memory";
3031 opt.err = "using default of " __MODULE_STRING(ATL2_DEFAULT_TX_MEMSIZE);
3032 opt.def = ATL2_DEFAULT_TX_MEMSIZE;
3033 opt.arg.r.min = ATL2_MIN_TX_MEMSIZE;
3034 opt.arg.r.max = ATL2_MAX_TX_MEMSIZE;
3035 #ifdef module_param_array
3036 if (num_TxMemSize > bd) {
3038 val = TxMemSize[bd];
3039 atl2_validate_option(&val, &opt);
3040 adapter->txd_ring_size = ((u32) val) * 1024;
3041 #ifdef module_param_array
3043 adapter->txd_ring_size = ((u32)opt.def) * 1024;
3045 /* txs ring size: */
3046 adapter->txs_ring_size = adapter->txd_ring_size / 128;
3047 if (adapter->txs_ring_size > 160)
3048 adapter->txs_ring_size = 160;
3050 /* Receive Memory Block Count */
3051 opt.type = range_option;
3052 opt.name = "Number of receive memory block";
3053 opt.err = "using default of " __MODULE_STRING(ATL2_DEFAULT_RXD_COUNT);
3054 opt.def = ATL2_DEFAULT_RXD_COUNT;
3055 opt.arg.r.min = ATL2_MIN_RXD_COUNT;
3056 opt.arg.r.max = ATL2_MAX_RXD_COUNT;
3057 #ifdef module_param_array
3058 if (num_RxMemBlock > bd) {
3060 val = RxMemBlock[bd];
3061 atl2_validate_option(&val, &opt);
3062 adapter->rxd_ring_size = (u32)val;
3064 /* ((u16)val)&~1; */ /* even number */
3065 #ifdef module_param_array
3067 adapter->rxd_ring_size = (u32)opt.def;
3069 /* init RXD Flow control value */
3070 adapter->hw.fc_rxd_hi = (adapter->rxd_ring_size / 8) * 7;
3071 adapter->hw.fc_rxd_lo = (ATL2_MIN_RXD_COUNT / 8) >
3072 (adapter->rxd_ring_size / 12) ? (ATL2_MIN_RXD_COUNT / 8) :
3073 (adapter->rxd_ring_size / 12);
3075 /* Interrupt Moderate Timer */
3076 opt.type = range_option;
3077 opt.name = "Interrupt Moderate Timer";
3078 opt.err = "using default of " __MODULE_STRING(INT_MOD_DEFAULT_CNT);
3079 opt.def = INT_MOD_DEFAULT_CNT;
3080 opt.arg.r.min = INT_MOD_MIN_CNT;
3081 opt.arg.r.max = INT_MOD_MAX_CNT;
3082 #ifdef module_param_array
3083 if (num_IntModTimer > bd) {
3085 val = IntModTimer[bd];
3086 atl2_validate_option(&val, &opt);
3087 adapter->imt = (u16) val;
3088 #ifdef module_param_array
3090 adapter->imt = (u16)(opt.def);
3093 opt.type = range_option;
3094 opt.name = "SPI Flash Vendor";
3095 opt.err = "using default of " __MODULE_STRING(FLASH_VENDOR_DEFAULT);
3096 opt.def = FLASH_VENDOR_DEFAULT;
3097 opt.arg.r.min = FLASH_VENDOR_MIN;
3098 opt.arg.r.max = FLASH_VENDOR_MAX;
3099 #ifdef module_param_array
3100 if (num_FlashVendor > bd) {
3102 val = FlashVendor[bd];
3103 atl2_validate_option(&val, &opt);
3104 adapter->hw.flash_vendor = (u8) val;
3105 #ifdef module_param_array
3107 adapter->hw.flash_vendor = (u8)(opt.def);
3110 opt.type = range_option;
3111 opt.name = "Speed/Duplex Selection";
3112 opt.err = "using default of " __MODULE_STRING(MEDIA_TYPE_AUTO_SENSOR);
3113 opt.def = MEDIA_TYPE_AUTO_SENSOR;
3114 opt.arg.r.min = MEDIA_TYPE_AUTO_SENSOR;
3115 opt.arg.r.max = MEDIA_TYPE_10M_HALF;
3116 #ifdef module_param_array
3117 if (num_MediaType > bd) {
3119 val = MediaType[bd];
3120 atl2_validate_option(&val, &opt);
3121 adapter->hw.MediaType = (u16) val;
3122 #ifdef module_param_array
3124 adapter->hw.MediaType = (u16)(opt.def);