imx6: aristainetos: add device tree from linux
authorHeiko Schocher <hs@denx.de>
Sun, 1 Dec 2019 10:23:09 +0000 (11:23 +0100)
committerStefano Babic <sbabic@denx.de>
Tue, 7 Jan 2020 09:26:55 +0000 (10:26 +0100)
Add device trees from Linux in preparation for driver model
conversions.

device tree files taken from Linux:
71ae5fc87c34: "Merge tag 'linux-kselftest-5.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/shuah/linux-kselftest"

and added SPDX license identifier.

Signed-off-by: Heiko Schocher <hs@denx.de>
arch/arm/dts/Makefile
arch/arm/dts/imx6dl-aristainetos2_4.dts [new file with mode: 0644]
arch/arm/dts/imx6dl-aristainetos2_7.dts [new file with mode: 0644]
arch/arm/dts/imx6qdl-aristainetos2.dtsi [new file with mode: 0644]
board/aristainetos/MAINTAINERS

index 0127a91..d105d66 100644 (file)
@@ -576,6 +576,8 @@ dtb-$(CONFIG_MX53) += imx53-cx9020.dtb \
 
 ifneq ($(CONFIG_MX6DL)$(CONFIG_MX6QDL)$(CONFIG_MX6S),)
 dtb-y += \
+       imx6dl-aristainetos2_4.dtb \
+       imx6dl-aristainetos2_7.dtb \
        imx6dl-brppt2.dtb \
        imx6dl-dhcom-pdk2.dtb \
        imx6dl-icore.dtb \
diff --git a/arch/arm/dts/imx6dl-aristainetos2_4.dts b/arch/arm/dts/imx6dl-aristainetos2_4.dts
new file mode 100644 (file)
index 0000000..0e28a70
--- /dev/null
@@ -0,0 +1,124 @@
+// SPDX-License-Identifier: (GPL-2.0)
+/*
+ * support for the imx6 based aristainetos2 board
+ *
+ * Copyright (C) 2019 Heiko Schocher <hs@denx.de>
+ * Copyright (C) 2015 Heiko Schocher <hs@denx.de>
+ *
+ */
+/dts-v1/;
+#include "imx6dl.dtsi"
+#include "imx6qdl-aristainetos2.dtsi"
+
+/ {
+       model = "aristainetos2 i.MX6 Dual Lite Board 4";
+       compatible = "fsl,imx6dl";
+
+       memory@10000000 {
+               device_type = "memory";
+               reg = <0x10000000 0x40000000>;
+       };
+
+       display0: disp0 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "fsl,imx-parallel-display";
+               interface-pix-fmt = "rgb24";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_ipu_disp>;
+
+               port@0 {
+                       reg = <0>;
+                       display0_in: endpoint {
+                               remote-endpoint = <&ipu1_di0_disp0>;
+                       };
+               };
+
+               port@1 {
+                       reg = <1>;
+                       display_out: endpoint {
+                               remote-endpoint = <&panel_in>;
+                       };
+               };
+       };
+};
+
+&ecspi1 {
+       lcd_panel: display@0 {
+               compatible = "lg,lg4573";
+               spi-max-frequency = <10000000>;
+               reg = <0>;
+               power-on-delay = <10>;
+
+               display-timings {
+                       480x800p57 {
+                               native-mode;
+                               clock-frequency = <27000027>;
+                               hactive = <480>;
+                               vactive = <800>;
+                               hfront-porch = <10>;
+                               hback-porch = <59>;
+                               hsync-len = <10>;
+                               vback-porch = <15>;
+                               vfront-porch = <15>;
+                               vsync-len = <15>;
+                               hsync-active = <1>;
+                               vsync-active = <1>;
+                       };
+               };
+
+               port {
+                       panel_in: endpoint {
+                               remote-endpoint = <&display_out>;
+                       };
+               };
+       };
+};
+
+&i2c3 {
+       touch: touch@4b {
+               compatible = "atmel,maxtouch";
+               reg = <0x4b>;
+               interrupt-parent = <&gpio2>;
+               interrupts = <9 8>;
+       };
+};
+
+&ipu1_di0_disp0 {
+       remote-endpoint = <&display0_in>;
+};
+
+&iomuxc {
+       pinctrl_ipu_disp: ipudisp1grp {
+               fsl,pins = <
+                       MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x31
+                       MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0xE1
+                       MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10
+                       MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10
+                       MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0xE1
+                       MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0xE1
+                       MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0xE1
+                       MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0xE1
+                       MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0xE1
+                       MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0xE1
+                       MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0xE1
+                       MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0xE1
+                       MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0xE1
+                       MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0xE1
+                       MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0xE1
+                       MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0xE1
+                       MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0xE1
+                       MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0xE1
+                       MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0xe1
+                       MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0xE1
+                       MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0xE1
+                       MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0xE1
+                       MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0xE1
+                       MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0xE1
+                       MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0xE1
+                       MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0xE1
+                       MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0xE1
+                       MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0xE1
+               >;
+       };
+};
diff --git a/arch/arm/dts/imx6dl-aristainetos2_7.dts b/arch/arm/dts/imx6dl-aristainetos2_7.dts
new file mode 100644 (file)
index 0000000..320dbcf
--- /dev/null
@@ -0,0 +1,64 @@
+// SPDX-License-Identifier: (GPL-2.0)
+/*
+ * support for the imx6 based aristainetos2 board
+ *
+ * Copyright (C) 2019 Heiko Schocher <hs@denx.de>
+ * Copyright (C) 2015 Heiko Schocher <hs@denx.de>
+ *
+ */
+/dts-v1/;
+#include "imx6dl.dtsi"
+#include "imx6qdl-aristainetos2.dtsi"
+
+/ {
+       model = "aristainetos2 i.MX6 Dual Lite Board 7";
+       compatible = "fsl,imx6dl";
+
+       memory@10000000 {
+               device_type = "memory";
+               reg = <0x10000000 0x40000000>;
+       };
+
+       panel: panel {
+               compatible = "lg,lb070wv8";
+               backlight = <&backlight>;
+               enable-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
+
+               port {
+                       panel_in: endpoint {
+                               remote-endpoint = <&lvds0_out>;
+                       };
+               };
+       };
+};
+
+&i2c3 {
+       touch: touch@4d {
+               compatible = "atmel,maxtouch";
+               reg = <0x4d>;
+               interrupt-parent = <&gpio2>;
+               interrupts = <9 8>;
+       };
+};
+
+&ldb {
+       status = "okay";
+
+       lvds-channel@0 {
+               status = "okay";
+
+               port@0 {
+                       reg = <0>;
+                       lvds0_in: endpoint {
+                               remote-endpoint = <&ipu1_di0_lvds0>;
+                       };
+               };
+
+               port@4 {
+                       reg = <4>;
+                       lvds0_out: endpoint {
+                               remote-endpoint = <&panel_in>;
+                       };
+               };
+       };
+};
diff --git a/arch/arm/dts/imx6qdl-aristainetos2.dtsi b/arch/arm/dts/imx6qdl-aristainetos2.dtsi
new file mode 100644 (file)
index 0000000..da6ab63
--- /dev/null
@@ -0,0 +1,611 @@
+// SPDX-License-Identifier: (GPL-2.0)
+/*
+ * support for the imx6 based aristainetos2 board
+ *
+ * Copyright (C) 2019 Heiko Schocher <hs@denx.de>
+ * Copyright (C) 2015 Heiko Schocher <hs@denx.de>
+ *
+ */
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/imx6qdl-clock.h>
+
+/ {
+       backlight: backlight {
+               compatible = "pwm-backlight";
+               pwms = <&pwm1 0 5000000>;
+               brightness-levels = <0 4 8 16 32 64 128 255>;
+               default-brightness-level = <7>;
+               enable-gpios = <&gpio6 31 GPIO_ACTIVE_HIGH>;
+       };
+
+       reg_2p5v: regulator-2p5v {
+               compatible = "regulator-fixed";
+               regulator-name = "2P5V";
+               regulator-min-microvolt = <2500000>;
+               regulator-max-microvolt = <2500000>;
+               regulator-always-on;
+       };
+
+       reg_3p3v: regulator-3p3v {
+               compatible = "regulator-fixed";
+               regulator-name = "3P3V";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-always-on;
+       };
+
+       reg_usbh1_vbus: regulator-usbh1-vbus {
+               compatible = "regulator-fixed";
+               enable-active-high;
+               gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_aristainetos2_usbh1_vbus>;
+               regulator-name = "usb_h1_vbus";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+       };
+
+       reg_usbotg_vbus: regulator-usbotg-vbus {
+               compatible = "regulator-fixed";
+               enable-active-high;
+               gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_aristainetos2_usbotg_vbus>;
+               regulator-name = "usb_otg_vbus";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+       };
+};
+
+&audmux {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_audmux>;
+       status = "okay";
+};
+
+&can1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_flexcan1>;
+       status = "okay";
+};
+
+&can2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_flexcan2>;
+       status = "okay";
+};
+
+&ecspi1 {
+       cs-gpios = <&gpio4 9 GPIO_ACTIVE_HIGH
+                   &gpio4 10 GPIO_ACTIVE_HIGH
+                   &gpio4 11 GPIO_ACTIVE_HIGH>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_ecspi1>;
+       status = "okay";
+};
+
+&ecspi2 {
+       cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH &gpio2 27 GPIO_ACTIVE_HIGH>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_ecspi2>;
+       status = "okay";
+};
+
+&ecspi4 {
+       cs-gpios = <&gpio3 29 GPIO_ACTIVE_HIGH &gpio5 2 GPIO_ACTIVE_HIGH>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_ecspi4>;
+       status = "okay";
+
+       flash: m25p80@1 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "micron,n25q128a11", "jedec,spi-nor";
+               spi-max-frequency = <20000000>;
+               reg = <1>;
+       };
+};
+
+&i2c1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c1>;
+       status = "okay";
+
+       pmic@58 {
+               compatible = "dlg,da9063";
+               reg = <0x58>;
+               interrupt-parent = <&gpio1>;
+               interrupts = <04 0x8>;
+
+               regulators {
+                       bcore1 {
+                               regulator-name = "bcore1";
+                               regulator-always-on = <1>;
+                               regulator-min-microvolt = <300000>;
+                               regulator-max-microvolt = <3300000>;
+                       };
+
+                       bcore2 {
+                               regulator-name = "bcore2";
+                               regulator-always-on = <1>;
+                               regulator-min-microvolt = <300000>;
+                               regulator-max-microvolt = <3300000>;
+                       };
+
+                       bpro {
+                               regulator-name = "bpro";
+                               regulator-always-on = <1>;
+                               regulator-min-microvolt = <300000>;
+                               regulator-max-microvolt = <3300000>;
+                       };
+
+                       bperi {
+                               regulator-name = "bperi";
+                               regulator-always-on = <1>;
+                               regulator-min-microvolt = <300000>;
+                               regulator-max-microvolt = <3300000>;
+                       };
+
+                       bmem {
+                               regulator-name = "bmem";
+                               regulator-always-on = <1>;
+                               regulator-min-microvolt = <300000>;
+                               regulator-max-microvolt = <3300000>;
+                       };
+
+                       ldo2 {
+                               regulator-name = "ldo2";
+                               regulator-always-on = <1>;
+                               regulator-min-microvolt = <300000>;
+                               regulator-max-microvolt = <1800000>;
+                       };
+
+                       ldo3 {
+                               regulator-name = "ldo3";
+                               regulator-always-on = <1>;
+                               regulator-min-microvolt = <300000>;
+                               regulator-max-microvolt = <3300000>;
+                       };
+
+                       ldo4 {
+                               regulator-name = "ldo4";
+                               regulator-always-on = <1>;
+                               regulator-min-microvolt = <300000>;
+                               regulator-max-microvolt = <3300000>;
+                       };
+
+                       ldo5 {
+                               regulator-name = "ldo5";
+                               regulator-always-on = <1>;
+                               regulator-min-microvolt = <300000>;
+                               regulator-max-microvolt = <3300000>;
+                       };
+
+                       ldo6 {
+                               regulator-name = "ldo6";
+                               regulator-always-on = <1>;
+                               regulator-min-microvolt = <300000>;
+                               regulator-max-microvolt = <3300000>;
+                       };
+
+                       ldo7 {
+                               regulator-name = "ldo7";
+                               regulator-always-on = <1>;
+                               regulator-min-microvolt = <300000>;
+                               regulator-max-microvolt = <3300000>;
+                       };
+
+                       ldo8 {
+                               regulator-name = "ldo8";
+                               regulator-always-on = <1>;
+                               regulator-min-microvolt = <300000>;
+                               regulator-max-microvolt = <3300000>;
+                       };
+
+                       ldo9 {
+                               regulator-name = "ldo9";
+                               regulator-always-on = <1>;
+                               regulator-min-microvolt = <300000>;
+                               regulator-max-microvolt = <3300000>;
+                       };
+
+                       ldo10 {
+                               regulator-name = "ldo10";
+                               regulator-always-on = <1>;
+                               regulator-min-microvolt = <300000>;
+                               regulator-max-microvolt = <3300000>;
+                       };
+
+                       ldo11 {
+                               regulator-name = "ldo11";
+                               regulator-always-on = <1>;
+                               regulator-min-microvolt = <300000>;
+                               regulator-max-microvolt = <3300000>;
+                       };
+
+                       bio {
+                               regulator-name = "bio";
+                               regulator-always-on = <1>;
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <1800000>;
+                       };
+               };
+       };
+
+       tmp103: tmp103@71 {
+               compatible = "ti,tmp103";
+               reg = <0x71>;
+       };
+};
+
+&i2c2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c2>;
+       status = "okay";
+};
+
+&i2c3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c3>;
+       status = "okay";
+
+       expander: tca6416@20 {
+               compatible = "ti,tca6416";
+               reg = <0x20>;
+               #gpio-cells = <2>;
+               gpio-controller;
+       };
+
+       rtc@68 {
+               compatible = "dallas,m41t00";
+               reg = <0x68>;
+       };
+};
+
+&i2c4 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_i2c4>;
+       status = "okay";
+
+       eeprom@50{
+               compatible = "atmel,24c64";
+               reg = <0x50>;
+       };
+
+       eeprom@57{
+               compatible = "atmel,24c64";
+               reg = <0x57>;
+       };
+};
+
+&fec {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_enet>;
+       phy-mode = "rgmii";
+       phy-reset-gpios = <&gpio7 18 GPIO_ACTIVE_LOW>;
+       txd0-skew-ps = <0>;
+       txd1-skew-ps = <0>;
+       txd2-skew-ps = <0>;
+       txd3-skew-ps = <0>;
+       status = "okay";
+};
+
+&gpmi {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_gpmi_nand>;
+       status = "okay";
+};
+
+&pcie {
+       reset-gpio = <&gpio2 16 GPIO_ACTIVE_LOW>;
+       status = "okay";
+};
+
+&pwm1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_pwm1>;
+       status = "okay";
+};
+
+&uart1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart1>;
+       uart-has-rtscts;
+       status = "okay";
+};
+
+&uart2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart2>;
+       status = "okay";
+};
+
+&uart3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart3>;
+       uart-has-rtscts;
+       status = "okay";
+};
+
+&uart4 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_uart4>;
+       status = "okay";
+};
+
+&usbh1 {
+       vbus-supply = <&reg_usbh1_vbus>;
+       dr_mode = "host";
+       status = "okay";
+};
+
+&usbotg {
+       vbus-supply = <&reg_usbotg_vbus>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usbotg>;
+       disable-over-current;
+       dr_mode = "host";
+       status = "okay";
+};
+
+&usdhc1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc1>;
+       cd-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
+       no-1-8-v;
+       status = "okay";
+};
+
+&usdhc2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usdhc2>;
+       cd-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
+       wp-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
+       no-1-8-v;
+       status = "okay";
+};
+
+&iomuxc {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_gpio>;
+
+       pinctrl_audmux: audmux {
+               fsl,pins = <
+                       MX6QDL_PAD_CSI0_DAT7__AUD3_RXD  0x1b0b0
+                       MX6QDL_PAD_CSI0_DAT4__AUD3_TXC  0x1b0b0
+                       MX6QDL_PAD_CSI0_DAT5__AUD3_TXD  0x1b0b0
+                       MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x1b0b0
+               >;
+       };
+
+       pinctrl_ecspi1: ecspi1grp {
+               fsl,pins = <
+                       MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
+                       MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
+                       MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
+                       MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x100b1 /* SS0# */
+                       MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x100b1 /* SS1# */
+                       MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x100b1 /* SS2# */
+               >;
+       };
+
+       pinctrl_ecspi2: ecspi2grp {
+               fsl,pins = <
+                       MX6QDL_PAD_EIM_OE__ECSPI2_MISO  0x100b1
+                       MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
+                       MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1
+                       MX6QDL_PAD_EIM_RW__GPIO2_IO26   0x100b1 /* SS0# */
+                       MX6QDL_PAD_EIM_LBA__GPIO2_IO27  0x100b1 /* SS1# */
+               >;
+       };
+
+       pinctrl_ecspi4: ecspi4grp {
+               fsl,pins = <
+                       MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1
+                       MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1
+                       MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1
+                       MX6QDL_PAD_EIM_D29__GPIO3_IO29  0x100b1 /* SS0# */
+                       MX6QDL_PAD_EIM_A25__GPIO5_IO02  0x100b1 /* SS1# */
+                       MX6QDL_PAD_SD4_DAT7__GPIO2_IO15 0x1b0b0 /* WP pin */
+               >;
+       };
+
+       pinctrl_enet: enetgrp {
+               fsl,pins = <
+                       MX6QDL_PAD_ENET_MDIO__ENET_MDIO       0x1b0b0
+                       MX6QDL_PAD_ENET_MDC__ENET_MDC         0x1b0b0
+                       MX6QDL_PAD_RGMII_TXC__RGMII_TXC       0x1b0b0
+                       MX6QDL_PAD_RGMII_TD0__RGMII_TD0       0x1b0b0
+                       MX6QDL_PAD_RGMII_TD1__RGMII_TD1       0x1b0b0
+                       MX6QDL_PAD_RGMII_TD2__RGMII_TD2       0x1b0b0
+                       MX6QDL_PAD_RGMII_TD3__RGMII_TD3       0x1b0b0
+                       MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
+                       MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK  0x1b0b0
+                       MX6QDL_PAD_RGMII_RXC__RGMII_RXC       0x1b0b0
+                       MX6QDL_PAD_RGMII_RD0__RGMII_RD0       0x1b0b0
+                       MX6QDL_PAD_RGMII_RD1__RGMII_RD1       0x1b0b0
+                       MX6QDL_PAD_RGMII_RD2__RGMII_RD2       0x1b0b0
+                       MX6QDL_PAD_RGMII_RD3__RGMII_RD3       0x1b0b0
+                       MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+               >;
+       };
+
+       pinctrl_flexcan1: flexcan1grp {
+               fsl,pins = <
+                       MX6QDL_PAD_SD3_CLK__FLEXCAN1_RX 0x1b0b0
+                       MX6QDL_PAD_SD3_CMD__FLEXCAN1_TX 0x1b0b0
+               >;
+       };
+
+       pinctrl_flexcan2: flexcan2grp {
+               fsl,pins = <
+                       MX6QDL_PAD_SD3_DAT0__FLEXCAN2_TX 0x1b0b0
+                       MX6QDL_PAD_SD3_DAT1__FLEXCAN2_RX 0x1b0b0
+               >;
+       };
+
+       pinctrl_gpio: gpiogrp {
+               fsl,pins = <
+                       /* led enable */
+                       MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25      0x1b0b0
+                       /* LCD power enable */
+                       MX6QDL_PAD_NANDF_CS2__GPIO6_IO15        0x1b0b0
+                       /* led yellow */
+                       MX6QDL_PAD_NANDF_CS3__GPIO6_IO16        0x1b0b0
+                       /* led red */
+                       MX6QDL_PAD_EIM_EB0__GPIO2_IO28          0x1b0b0
+                       /* led green */
+                       MX6QDL_PAD_EIM_A24__GPIO5_IO04          0x1b0b0
+                       /* led blue */
+                       MX6QDL_PAD_EIM_EB1__GPIO2_IO29          0x1b0b0
+                       /* Profibus IRQ */
+                       MX6QDL_PAD_SD3_DAT5__GPIO7_IO00         0x1b0b0
+                       /* FPGA IRQ */
+                       MX6QDL_PAD_SD3_DAT6__GPIO6_IO18         0x1b0b0
+                       /* spi bus #2 SS driver enable */
+                       MX6QDL_PAD_EIM_A23__GPIO6_IO06          0x1b0b0
+                       /* RST_LOC# PHY reset input (has pull-down!)*/
+                       MX6QDL_PAD_GPIO_18__GPIO7_IO13          0x1b0b0
+                       /* USB_OTG_ID = GPIO1_24*/
+                       MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID       0x80000000
+                       /* Touchscreen IRQ */
+                       MX6QDL_PAD_SD4_DAT1__GPIO2_IO09         0x1b0b0
+                       /* PCIe reset */
+                       MX6QDL_PAD_EIM_A22__GPIO2_IO16          0x1b0b0
+               >;
+       };
+
+       pinctrl_gpmi_nand: gpmi-nand {
+               fsl,pins = <
+                       MX6QDL_PAD_NANDF_CLE__NAND_CLE     0xb0b1
+                       MX6QDL_PAD_NANDF_ALE__NAND_ALE     0xb0b1
+                       MX6QDL_PAD_NANDF_WP_B__NAND_WP_B   0xb0b1
+                       MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
+                       MX6QDL_PAD_NANDF_CS0__NAND_CE0_B   0xb0b1
+                       MX6QDL_PAD_SD4_CMD__NAND_RE_B      0xb0b1
+                       MX6QDL_PAD_SD4_CLK__NAND_WE_B      0xb0b1
+                       MX6QDL_PAD_NANDF_D0__NAND_DATA00   0xb0b1
+                       MX6QDL_PAD_NANDF_D1__NAND_DATA01   0xb0b1
+                       MX6QDL_PAD_NANDF_D2__NAND_DATA02   0xb0b1
+                       MX6QDL_PAD_NANDF_D3__NAND_DATA03   0xb0b1
+                       MX6QDL_PAD_NANDF_D4__NAND_DATA04   0xb0b1
+                       MX6QDL_PAD_NANDF_D5__NAND_DATA05   0xb0b1
+                       MX6QDL_PAD_NANDF_D6__NAND_DATA06   0xb0b1
+                       MX6QDL_PAD_NANDF_D7__NAND_DATA07   0xb0b1
+               >;
+       };
+
+       pinctrl_i2c1: i2c1grp {
+               fsl,pins = <
+                       MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
+                       MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
+               >;
+       };
+
+       pinctrl_i2c2: i2c2grp {
+               fsl,pins = <
+                       MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
+                       MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+               >;
+       };
+
+       pinctrl_i2c3: i2c3grp {
+               fsl,pins = <
+                       MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
+                       MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
+               >;
+       };
+
+       pinctrl_i2c4: i2c4grp {
+               fsl,pins = <
+                       MX6QDL_PAD_GPIO_7__I2C4_SCL 0x4001b8b1
+                       MX6QDL_PAD_GPIO_8__I2C4_SDA 0x4001b8b1
+               >;
+       };
+
+       pinctrl_pwm1: pwm1grp {
+               fsl,pins = <
+                       MX6QDL_PAD_GPIO_9__PWM1_OUT     0x1b0b0
+                       /* backlight enable */
+                       MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x1b0b0
+               >;
+       };
+
+       pinctrl_uart1: uart1grp {
+               fsl,pins = <
+                       MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA    0x1b0b1
+                       MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA    0x1b0b1
+                       MX6QDL_PAD_EIM_D20__UART1_RTS_B         0x1b0b1
+                       MX6QDL_PAD_EIM_D19__UART1_CTS_B         0x1b0b1
+               >;
+       };
+
+       pinctrl_uart2: uart2grp {
+               fsl,pins = <
+                       MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
+                       MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
+               >;
+       };
+
+       pinctrl_uart3: uart3grp {
+               fsl,pins = <
+                       MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
+                       MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
+                       MX6QDL_PAD_EIM_D31__UART3_RTS_B   0x1b0b1
+                       MX6QDL_PAD_EIM_D23__UART3_CTS_B   0x1b0b1
+               >;
+       };
+
+       pinctrl_uart4: uart4grp {
+               fsl,pins = <
+                       MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
+                       MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
+               >;
+       };
+
+       pinctrl_usbotg: usbotggrp {
+               fsl,pins = <
+                       MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
+               >;
+       };
+
+       pinctrl_aristainetos2_usbh1_vbus: aristainetos-usbh1-vbus {
+               fsl,pins = <MX6QDL_PAD_GPIO_0__USB_H1_PWR 0x130b0>;
+       };
+
+       pinctrl_aristainetos2_usbotg_vbus: aristainetos-usbotg-vbus {
+               fsl,pins = <MX6QDL_PAD_KEY_ROW4__USB_OTG_PWR 0x130b0>;
+       };
+
+       pinctrl_usdhc1: usdhc1grp {
+               fsl,pins = <
+                       MX6QDL_PAD_SD1_CMD__SD1_CMD    0x17059
+                       MX6QDL_PAD_SD1_CLK__SD1_CLK    0x10059
+                       MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
+                       MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
+                       MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
+                       MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
+                       /* SD1 card detect input */
+                       MX6QDL_PAD_ENET_RXD0__GPIO1_IO27        0x1b0b0
+                       /* SD1 write protect input */
+                       MX6QDL_PAD_DI0_PIN4__GPIO4_IO20         0x1b0b0
+               >;
+       };
+
+       pinctrl_usdhc2: usdhc2grp {
+               fsl,pins = <
+                       MX6QDL_PAD_SD2_CMD__SD2_CMD    0x71
+                       MX6QDL_PAD_SD2_CLK__SD2_CLK    0x71
+                       MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x71
+                       MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x71
+                       MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x71
+                       MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x71
+                       /* SD2 level shifter output enable */
+                       MX6QDL_PAD_SD3_RST__GPIO7_IO08          0x1b0b0
+                       /* SD2 card detect input */
+                       MX6QDL_PAD_GPIO_19__GPIO4_IO05          0x1b0b0
+                       /* SD2 write protect input */
+                       MX6QDL_PAD_SD4_DAT2__GPIO2_IO10         0x1b0b0
+               >;
+       };
+};
index 7e9f38d..91c8ae0 100644 (file)
@@ -4,3 +4,6 @@ S:      Maintained
 F:     board/aristainetos/
 F:     include/configs/aristainetos2.h
 F:     configs/aristainetos2_defconfig
+F:     arch/arm/dts/imx6dl-aristainetos2_4.dts
+F:     arch/arm/dts/imx6dl-aristainetos2_7.dts
+F:     arch/arm/dts/imx6qdl-aristainetos2.dtsi