ARM: dts: UniPhier: sync device trees with the Linux kernel

[pandora-u-boot.git] / arch / arm / dts / uniphier-ph1-sld3.dtsi

diff --git a/arch/arm/dts/uniphier-ph1-sld3.dtsi b/arch/arm/dts/uniphier-ph1-sld3.dtsi
index 44b1989..1f93bb9 100644 (file)
--- a/arch/arm/dts/uniphier-ph1-sld3.dtsi
+++ b/arch/arm/dts/uniphier-ph1-sld3.dtsi
@@ -1,9 +1,7 @@
 /*
  * Device Tree Source for UniPhier PH1-sLD3 SoC
  *
- * Copyright (C) 2014-2015 Panasonic Corporation
- * Copyright (C) 2015      Socionext Inc.
- *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+ * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
  *
  * SPDX-License-Identifier:    GPL-2.0+
  */
@@ -16,6 +14,7 @@
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
+               enable-method = "socionext,uniphier-smp";
 
                cpu@0 {
                        device_type = "cpu";
@@ -30,11 +29,48 @@
                };
        };
 
+       clocks {
+               arm_timer_clk: arm_timer_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <50000000>;
+               };
+       };
+
        soc {
                compatible = "simple-bus";
                #address-cells = <1>;
                #size-cells = <1>;
                ranges;
+               interrupt-parent = <&intc>;
+
+               extbus: extbus {
+                       compatible = "simple-bus";
+                       #address-cells = <2>;
+                       #size-cells = <1>;
+               };
+
+               timer@20000200 {
+                       compatible = "arm,cortex-a9-global-timer";
+                       reg = <0x20000200 0x20>;
+                       interrupts = <1 11 0x304>;
+                       clocks = <&arm_timer_clk>;
+               };
+
+               timer@20000600 {
+                       compatible = "arm,cortex-a9-twd-timer";
+                       reg = <0x20000600 0x20>;
+                       interrupts = <1 13 0x304>;
+                       clocks = <&arm_timer_clk>;
+               };
+
+               intc: interrupt-controller@20001000 {
+                       compatible = "arm,cortex-a9-gic";
+                       #interrupt-cells = <3>;
+                       interrupt-controller;
+                       reg = <0x20001000 0x1000>,
+                             <0x20000100 0x100>;
+               };
 
                uart0: serial@54006800 {
                        compatible = "socionext,uniphier-uart";
@@ -93,6 +129,12 @@
                        status = "disabled";
                };
 
+               system-bus-controller-misc@59800000 {
+                       compatible = "socionext,uniphier-system-bus-controller-misc",
+                                    "syscon";
+                       reg = <0x59800000 0x2000>;
+               };
+
                usb0: usb@5a800100 {
                        compatible = "socionext,uniphier-ehci", "generic-ehci";
                        status = "disabled";