MIPS: Introduce board_cache_error_setup() hook.
authorDavid Daney <david.daney@cavium.com>
Tue, 15 May 2012 07:04:46 +0000 (00:04 -0700)
committerRalf Baechle <ralf@linux-mips.org>
Wed, 16 May 2012 21:34:33 +0000 (23:34 +0200)
This is used in subsequent patches.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3819/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/include/asm/traps.h
arch/mips/kernel/traps.c

index ff74aec..420ca06 100644 (file)
@@ -25,6 +25,7 @@ extern void (*board_nmi_handler_setup)(void);
 extern void (*board_ejtag_handler_setup)(void);
 extern void (*board_bind_eic_interrupt)(int irq, int regset);
 extern void (*board_ebase_setup)(void);
+extern void (*board_cache_error_setup)(void);
 
 extern int register_nmi_notifier(struct notifier_block *nb);
 
index cfdaaa4..ed46c2b 100644 (file)
@@ -91,7 +91,7 @@ void (*board_nmi_handler_setup)(void);
 void (*board_ejtag_handler_setup)(void);
 void (*board_bind_eic_interrupt)(int irq, int regset);
 void (*board_ebase_setup)(void);
-
+void __cpuinitdata(*board_cache_error_setup)(void);
 
 static void show_raw_backtrace(unsigned long reg29)
 {
@@ -1797,6 +1797,9 @@ void __init trap_init(void)
 
        set_except_vector(26, handle_dsp);
 
+       if (board_cache_error_setup)
+               board_cache_error_setup();
+
        if (cpu_has_vce)
                /* Special exception: R4[04]00 uses also the divec space. */
                memcpy((void *)(ebase + 0x180), &except_vec3_r4000, 0x100);