#ifdef ATA_ENABLE_PATA
/* Intel PIIX4 for the 430TX/440BX/MX chipset: UDMA 33 */
/* Also PIIX4E (fn3 rev 2) and PIIX4M (fn3 rev 3) */
- { 0x8086, 0x7110, PCI_ANY_ID, PCI_ANY_ID, 0, 0, piix_pata_33 },
{ 0x8086, 0x7111, PCI_ANY_ID, PCI_ANY_ID, 0, 0, piix_pata_33 },
{ 0x8086, 0x24db, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
{ 0x8086, 0x25a2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
{ PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SATA), GENERIC },
{ PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SATA2), GENERIC },
{ PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SATA3), GENERIC },
- { PCI_VDEVICE(NVIDIA, 0x045c), GENERIC },
- { PCI_VDEVICE(NVIDIA, 0x045d), GENERIC },
- { PCI_VDEVICE(NVIDIA, 0x045e), GENERIC },
- { PCI_VDEVICE(NVIDIA, 0x045f), GENERIC },
+ { PCI_VDEVICE(NVIDIA, 0x045c), GENERIC }, /* MCP65 */
+ { PCI_VDEVICE(NVIDIA, 0x045d), GENERIC }, /* MCP65 */
+ { PCI_VDEVICE(NVIDIA, 0x045e), GENERIC }, /* MCP65 */
+ { PCI_VDEVICE(NVIDIA, 0x045f), GENERIC }, /* MCP65 */
+ { PCI_VDEVICE(NVIDIA, 0x0550), GENERIC }, /* MCP67 */
+ { PCI_VDEVICE(NVIDIA, 0x0551), GENERIC }, /* MCP67 */
+ { PCI_VDEVICE(NVIDIA, 0x0552), GENERIC }, /* MCP67 */
+ { PCI_VDEVICE(NVIDIA, 0x0553), GENERIC }, /* MCP67 */
{ PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
PCI_ANY_ID, PCI_ANY_ID,
PCI_CLASS_STORAGE_IDE<<8, 0xffff00, GENERIC },
futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
{
__asm__ __volatile__(
- "\n1: lduwa [%2] %%asi, %0\n"
- "2: casa [%2] %%asi, %0, %1\n"
- "3:\n"
+ "\n1: casa [%3] %%asi, %2, %0\n"
+ "2:\n"
" .section .fixup,#alloc,#execinstr\n"
" .align 4\n"
- "4: ba 3b\n"
- " mov %3, %0\n"
+ "3: ba 2b\n"
+ " mov %4, %0\n"
" .previous\n"
" .section __ex_table,\"a\"\n"
" .align 4\n"
- " .word 1b, 4b\n"
- " .word 2b, 4b\n"
+ " .word 1b, 3b\n"
" .previous\n"
- : "=&r" (oldval)
- : "r" (newval), "r" (uaddr), "i" (-EFAULT)
+ : "=r" (newval)
+ : "0" (newval), "r" (oldval), "r" (uaddr), "i" (-EFAULT)
: "memory");
- return oldval;
+ return newval;
}
#endif /* !(_SPARC64_FUTEX_H) */