bnx2x: Fix missing pause on for 578xx
authorYaniv Rosner <yanivr@broadcom.com>
Tue, 2 Aug 2011 22:59:10 +0000 (22:59 +0000)
committerDavid S. Miller <davem@davemloft.net>
Wed, 3 Aug 2011 10:22:17 +0000 (03:22 -0700)
When link speed is 1G and below, pause weren't sent due to missing pause setting in the UMAC.

Signed-off-by: Yaniv Rosner <yanivr@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/bnx2x/bnx2x_link.c
drivers/net/bnx2x/bnx2x_reg.h

index bcd8f00..aa9958e 100644 (file)
@@ -1546,6 +1546,12 @@ static void bnx2x_umac_enable(struct link_params *params,
                               vars->line_speed);
                break;
        }
+       if (!(vars->flow_ctrl & BNX2X_FLOW_CTRL_TX))
+               val |= UMAC_COMMAND_CONFIG_REG_IGNORE_TX_PAUSE;
+
+       if (!(vars->flow_ctrl & BNX2X_FLOW_CTRL_RX))
+               val |= UMAC_COMMAND_CONFIG_REG_PAUSE_IGNORE;
+
        REG_WR(bp, umac_base + UMAC_REG_COMMAND_CONFIG, val);
        udelay(50);
 
index 02461fe..d84642a 100644 (file)
    The fields are: [4:0] - tail pointer; 10:5] - Link List size; 15:11] -
    header pointer. */
 #define UCM_REG_XX_TABLE                                        0xe0300
+#define UMAC_COMMAND_CONFIG_REG_IGNORE_TX_PAUSE                         (0x1<<28)
 #define UMAC_COMMAND_CONFIG_REG_LOOP_ENA                        (0x1<<15)
 #define UMAC_COMMAND_CONFIG_REG_NO_LGTH_CHECK                   (0x1<<24)
 #define UMAC_COMMAND_CONFIG_REG_PAD_EN                          (0x1<<5)
+#define UMAC_COMMAND_CONFIG_REG_PAUSE_IGNORE                    (0x1<<8)
 #define UMAC_COMMAND_CONFIG_REG_PROMIS_EN                       (0x1<<4)
 #define UMAC_COMMAND_CONFIG_REG_RX_ENA                          (0x1<<1)
 #define UMAC_COMMAND_CONFIG_REG_SW_RESET                        (0x1<<13)