drm/i915: Cache GT fifo count for SandyBridge
authorChris Wilson <chris@chris-wilson.co.uk>
Thu, 12 May 2011 21:17:09 +0000 (22:17 +0100)
committerKeith Packard <keithp@keithp.com>
Wed, 13 Jul 2011 18:28:07 +0000 (11:28 -0700)
The read back of the available FIFO entries is vital for system
stability, but extremely costly. However, we only need a guide so as to
avoid eating into the reserved entries and since we are the only
consumer we can cache the read of the count from the last write.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Keith Packard <keithp@keithp.com>
drivers/gpu/drm/i915/i915_drv.c
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_reg.h

index 6ed73ae..d988cc3 100644 (file)
@@ -348,12 +348,17 @@ void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)
 
 void __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv)
 {
-       int loop = 500;
-       u32 fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
-       while (fifo < 20 && loop--) {
-               udelay(10);
-               fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
+       if (dev_priv->gt_fifo_count < GT_FIFO_NUM_RESERVED_ENTRIES ) {
+               int loop = 500;
+               u32 fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
+               while (fifo <= GT_FIFO_NUM_RESERVED_ENTRIES && loop--) {
+                       udelay(10);
+                       fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
+               }
+               WARN_ON(loop < 0 && fifo <= GT_FIFO_NUM_RESERVED_ENTRIES);
+               dev_priv->gt_fifo_count = fifo;
        }
+       dev_priv->gt_fifo_count--;
 }
 
 static int i915_drm_freeze(struct drm_device *dev)
index 00dc59a..b37146c 100644 (file)
@@ -277,6 +277,7 @@ typedef struct drm_i915_private {
        int relative_constants_mode;
 
        void __iomem *regs;
+       u32 gt_fifo_count;
 
        struct intel_gmbus {
                struct i2c_adapter adapter;
index 96fb0fa..02db299 100644 (file)
 #define  FORCEWAKE_ACK                         0x130090
 
 #define  GT_FIFO_FREE_ENTRIES                  0x120008
+#define    GT_FIFO_NUM_RESERVED_ENTRIES                20
 
 #define GEN6_RPNSWREQ                          0xA008
 #define   GEN6_TURBO_DISABLE                   (1<<31)