drm/i915: Only call udelay() when waiting for clocks to stabilise

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 95c8416..df410e4 100644 (file)
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1989,8 +1989,8 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
        if ((temp & DPLL_VCO_ENABLE) == 0) {
                I915_WRITE(pch_dpll_reg, temp | DPLL_VCO_ENABLE);
                I915_READ(pch_dpll_reg);
+               udelay(200);
        }
-       udelay(200);
 
        if (HAS_PCH_CPT(dev)) {
                /* Be sure PCH DPLL SEL is set */
@@ -2136,8 +2136,6 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc)
        } else
                DRM_DEBUG_KMS("crtc %d is disabled\n", pipe);
 
-       udelay(100);
-
        /* Disable PF */
        I915_WRITE(pipe ? PFB_CTL_1 : PFA_CTL_1, 0);
        I915_WRITE(pipe ? PFB_WIN_SZ : PFA_WIN_SZ, 0);