[PATCH] x86_64: disallow multi-byte hardware execution breakpoints
authorJan Beulich <jbeulich@novell.com>
Sat, 25 Mar 2006 15:29:19 +0000 (16:29 +0100)
committerLinus Torvalds <torvalds@g5.osdl.org>
Sat, 25 Mar 2006 17:10:52 +0000 (09:10 -0800)
While AMD formally permits multi-byte execution breakpoints, Intel
disallows 8-byte as much as 2- or 4-byte ones.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
arch/x86_64/kernel/ptrace.c

index 5320562..d44b2c1 100644 (file)
@@ -420,9 +420,9 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                case offsetof(struct user, u_debugreg[7]):
                        /* See arch/i386/kernel/ptrace.c for an explanation of
                         * this awkward check.*/
-                                 data &= ~DR_CONTROL_RESERVED;
-                                 for(i=0; i<4; i++)
-                                         if ((0x5454 >> ((data >> (16 + 4*i)) & 0xf)) & 1)
+                       data &= ~DR_CONTROL_RESERVED;
+                       for(i=0; i<4; i++)
+                               if ((0x5554 >> ((data >> (16 + 4*i)) & 0xf)) & 1)
                                        break;
                        if (i == 4) {
                                child->thread.debugreg7 = data;