[MIPS] VSMP: Synchronize cp0 counters on bootup.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/kernel/smp-mt.c b/arch/mips/kernel/smp-mt.c
index 06b29fa..2ac19a6 100644 (file)
--- a/arch/mips/kernel/smp-mt.c
+++ b/arch/mips/kernel/smp-mt.c
@@ -153,6 +153,8 @@ static void __init smp_copy_vpe_config(void)
 
        /* Propagate Config7 */
        write_vpe_c0_config7(read_c0_config7());
+
+       write_vpe_c0_count(read_c0_count());
 }
 
 static unsigned int __init smp_vpe_init(unsigned int tc, unsigned int mvpconf0,

diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c
index 6597067..d817c60 100644 (file)
--- a/arch/mips/mips-boards/generic/time.c
+++ b/arch/mips/mips-boards/generic/time.c
@@ -209,6 +209,7 @@ static unsigned int __init estimate_cpu_frequency(void)
 #endif
 #if defined(CONFIG_MIPS_ATLAS) || defined(CONFIG_MIPS_MALTA)
        unsigned long flags;
+       unsigned int start;
 
        local_irq_save(flags);
 
@@ -217,13 +218,13 @@ static unsigned int __init estimate_cpu_frequency(void)
        while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
 
        /* Start r4k counter. */
-       write_c0_count(0);
+       start = read_c0_count();
 
        /* Read counter exactly on falling edge of update flag */
        while (CMOS_READ(RTC_REG_A) & RTC_UIP);
        while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
 
-       count = read_c0_count();
+       count = read_c0_count() - start;
 
        /* restore interrupts */
        local_irq_restore(flags);

diff --git a/include/asm-mips/mipsmtregs.h b/include/asm-mips/mipsmtregs.h
index f637ce7..3e9468f 100644 (file)
--- a/include/asm-mips/mipsmtregs.h
+++ b/include/asm-mips/mipsmtregs.h
@@ -352,6 +352,8 @@ do {                                                                        \
 #define write_vpe_c0_vpecontrol(val)   mttc0(1, 1, val)
 #define read_vpe_c0_vpeconf0()         mftc0(1, 2)
 #define write_vpe_c0_vpeconf0(val)     mttc0(1, 2, val)
+#define read_vpe_c0_count()            mftc0(9, 0)
+#define write_vpe_c0_count(val)                mttc0(9, 0, val)
 #define read_vpe_c0_status()           mftc0(12, 0)
 #define write_vpe_c0_status(val)       mttc0(12, 0, val)
 #define read_vpe_c0_cause()            mftc0(13, 0)