drm/nouveau: replace nv04_graph_fifo_access() use with direct reg bashing

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
index 72bfc14..d0bd010 100644 (file)
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -1142,7 +1142,6 @@ extern int  nvc0_fifo_unload_context(struct drm_device *);
 
 /* nv04_graph.c */
 extern int  nv04_graph_create(struct drm_device *);
-extern void nv04_graph_fifo_access(struct drm_device *, bool);
 extern int  nv04_graph_object_new(struct nouveau_channel *, int, u32, u16);
 extern int  nv04_graph_mthd_page_flip(struct nouveau_channel *chan,
                                      u32 class, u32 mthd, u32 data);

diff --git a/drivers/gpu/drm/nouveau/nv04_graph.c b/drivers/gpu/drm/nouveau/nv04_graph.c
index 3626ee7..4129793 100644 (file)
--- a/drivers/gpu/drm/nouveau/nv04_graph.c
+++ b/drivers/gpu/drm/nouveau/nv04_graph.c
@@ -450,13 +450,13 @@ nv04_graph_context_del(struct nouveau_channel *chan, int engine)
        unsigned long flags;
 
        spin_lock_irqsave(&dev_priv->context_switch_lock, flags);
-       nv04_graph_fifo_access(dev, false);
+       nv_mask(dev, NV04_PGRAPH_FIFO, 0x00000001, 0x00000000);
 
        /* Unload the context if it's the currently active one */
        if (nv04_graph_channel(dev) == chan)
                nv04_graph_unload_context(dev);
 
-       nv04_graph_fifo_access(dev, true);
+       nv_mask(dev, NV04_PGRAPH_FIFO, 0x00000001, 0x00000001);
        spin_unlock_irqrestore(&dev_priv->context_switch_lock, flags);
 
        /* Free the context resources */
@@ -545,17 +545,6 @@ nv04_graph_fini(struct drm_device *dev, int engine)
        return 0;
 }
 
-void
-nv04_graph_fifo_access(struct drm_device *dev, bool enabled)
-{
-       if (enabled)
-               nv_wr32(dev, NV04_PGRAPH_FIFO,
-                                       nv_rd32(dev, NV04_PGRAPH_FIFO) | 1);
-       else
-               nv_wr32(dev, NV04_PGRAPH_FIFO,
-                                       nv_rd32(dev, NV04_PGRAPH_FIFO) & ~1);
-}
-
 static int
 nv04_graph_mthd_set_ref(struct nouveau_channel *chan,
                        u32 class, u32 mthd, u32 data)

diff --git a/drivers/gpu/drm/nouveau/nv10_graph.c b/drivers/gpu/drm/nouveau/nv10_graph.c
index 0930c6c..2567522 100644 (file)
--- a/drivers/gpu/drm/nouveau/nv10_graph.c
+++ b/drivers/gpu/drm/nouveau/nv10_graph.c
@@ -708,8 +708,8 @@ static void nv10_graph_load_dma_vtxbuf(struct nouveau_channel *chan,
                0x2c000000 | chan->id << 20 | subchan << 16 | 0x18c);
        nv_wr32(dev, NV10_PGRAPH_FFINTFC_ST2_DL, inst);
        nv_mask(dev, NV10_PGRAPH_CTX_CONTROL, 0, 0x10000);
-       nv04_graph_fifo_access(dev, true);
-       nv04_graph_fifo_access(dev, false);
+       nv_mask(dev, NV04_PGRAPH_FIFO, 0x00000001, 0x00000001);
+       nv_mask(dev, NV04_PGRAPH_FIFO, 0x00000001, 0x00000000);
 
        /* Restore the FIFO state */
        for (i = 0; i < ARRAY_SIZE(fifo); i++)
@@ -879,13 +879,13 @@ nv10_graph_context_del(struct nouveau_channel *chan, int engine)
        unsigned long flags;
 
        spin_lock_irqsave(&dev_priv->context_switch_lock, flags);
-       nv04_graph_fifo_access(dev, false);
+       nv_mask(dev, NV04_PGRAPH_FIFO, 0x00000001, 0x00000000);
 
        /* Unload the context if it's the currently active one */
        if (nv10_graph_channel(dev) == chan)
                nv10_graph_unload_context(dev);
 
-       nv04_graph_fifo_access(dev, true);
+       nv_mask(dev, NV04_PGRAPH_FIFO, 0x00000001, 0x00000001);
        spin_unlock_irqrestore(&dev_priv->context_switch_lock, flags);
 
        /* Free the context resources */

diff --git a/drivers/gpu/drm/nouveau/nv20_graph.c b/drivers/gpu/drm/nouveau/nv20_graph.c
index f873627..3791222 100644 (file)
--- a/drivers/gpu/drm/nouveau/nv20_graph.c
+++ b/drivers/gpu/drm/nouveau/nv20_graph.c
@@ -454,13 +454,13 @@ nv20_graph_context_del(struct nouveau_channel *chan, int engine)
        unsigned long flags;
 
        spin_lock_irqsave(&dev_priv->context_switch_lock, flags);
-       nv04_graph_fifo_access(dev, false);
+       nv_mask(dev, NV04_PGRAPH_FIFO, 0x00000001, 0x00000000);
 
        /* Unload the context if it's the currently active one */
        if (nv10_graph_channel(dev) == chan)
                nv20_graph_unload_context(dev);
 
-       nv04_graph_fifo_access(dev, true);
+       nv_mask(dev, NV04_PGRAPH_FIFO, 0x00000001, 0x00000001);
        spin_unlock_irqrestore(&dev_priv->context_switch_lock, flags);
 
        /* Free the context resources */