return ret;
}
---/* Periodic interrupt is only available in ST variants. */
---static int pl031_irq_set_state(struct device *dev, int enabled)
---{
--- struct pl031_local *ldata = dev_get_drvdata(dev);
---
--- if (enabled == 1) {
--- /* Clear any pending timer interrupt. */
--- writel(RTC_BIT_PI, ldata->base + RTC_ICR);
---
--- writel(readl(ldata->base + RTC_IMSC) | RTC_BIT_PI,
--- ldata->base + RTC_IMSC);
---
--- /* Now start the timer */
--- writel(readl(ldata->base + RTC_TCR) | RTC_TCR_EN,
--- ldata->base + RTC_TCR);
---
--- } else {
--- writel(readl(ldata->base + RTC_IMSC) & (~RTC_BIT_PI),
--- ldata->base + RTC_IMSC);
---
--- /* Also stop the timer */
--- writel(readl(ldata->base + RTC_TCR) & (~RTC_TCR_EN),
--- ldata->base + RTC_TCR);
--- }
--- /* Wait at least 1 RTC32 clock cycle to ensure next access
--- * to RTC_TCR will succeed.
--- */
--- udelay(40);
---
--- return 0;
---}
---
---static int pl031_irq_set_freq(struct device *dev, int freq)
---{
--- struct pl031_local *ldata = dev_get_drvdata(dev);
---
--- /* Cant set timer if it is already enabled */
--- if (readl(ldata->base + RTC_TCR) & RTC_TCR_EN) {
--- dev_err(dev, "can't change frequency while timer enabled\n");
--- return -EINVAL;
--- }
---
--- /* If self start bit in RTC_TCR is set timer will start here,
--- * but we never set that bit. Instead we start the timer when
--- * set_state is called with enabled == 1.
--- */
--- writel(RTC_TIMER_FREQ / freq, ldata->base + RTC_TLR);
---
--- return 0;
---}
---
static int pl031_remove(struct amba_device *adev)
{
struct pl031_local *ldata = dev_get_drvdata(&adev->dev);
return 0;
}
-- -static int pl031_probe(struct amba_device *adev, struct amba_id *id)
++ +static int pl031_probe(struct amba_device *adev, const struct amba_id *id)
{
int ret;
struct pl031_local *ldata;
.read_alarm = pl031_read_alarm,
.set_alarm = pl031_set_alarm,
.alarm_irq_enable = pl031_alarm_irq_enable,
--- .irq_set_state = pl031_irq_set_state,
--- .irq_set_freq = pl031_irq_set_freq,
};
/* And the second ST derivative */
.read_alarm = pl031_stv2_read_alarm,
.set_alarm = pl031_stv2_set_alarm,
.alarm_irq_enable = pl031_alarm_irq_enable,
--- .irq_set_state = pl031_irq_set_state,
--- .irq_set_freq = pl031_irq_set_freq,
};
static struct amba_id pl031_ids[] = {
here and read <file:Documentation/kbuild/modules.txt>. The module
will be called amba-clcd.
---choice
---
--- depends on FB_ARMCLCD && (ARCH_LH7A40X || ARCH_LH7952X)
--- prompt "LCD Panel"
--- default FB_ARMCLCD_SHARP_LQ035Q7DB02
---
---config FB_ARMCLCD_SHARP_LQ035Q7DB02_HRTFT
--- bool "LogicPD LCD 3.5\" QVGA w/HRTFT IC"
--- help
--- This is an implementation of the Sharp LQ035Q7DB02, a 3.5"
--- color QVGA, HRTFT panel. The LogicPD device includes
--- an integrated HRTFT controller IC.
--- The native resolution is 240x320.
---
---config FB_ARMCLCD_SHARP_LQ057Q3DC02
--- bool "LogicPD LCD 5.7\" QVGA"
--- help
--- This is an implementation of the Sharp LQ057Q3DC02, a 5.7"
--- color QVGA, TFT panel. The LogicPD device includes an
--- The native resolution is 320x240.
---
---config FB_ARMCLCD_SHARP_LQ64D343
--- bool "LogicPD LCD 6.4\" VGA"
--- help
--- This is an implementation of the Sharp LQ64D343, a 6.4"
--- color VGA, TFT panel. The LogicPD device includes an
--- The native resolution is 640x480.
---
---config FB_ARMCLCD_SHARP_LQ10D368
--- bool "LogicPD LCD 10.4\" VGA"
--- help
--- This is an implementation of the Sharp LQ10D368, a 10.4"
--- color VGA, TFT panel. The LogicPD device includes an
--- The native resolution is 640x480.
---
---
---config FB_ARMCLCD_SHARP_LQ121S1DG41
--- bool "LogicPD LCD 12.1\" SVGA"
--- help
--- This is an implementation of the Sharp LQ121S1DG41, a 12.1"
--- color SVGA, TFT panel. The LogicPD device includes an
--- The native resolution is 800x600.
---
--- This panel requires a clock rate may be an integer fraction
--- of the base LCDCLK frequency. The driver will select the
--- highest frequency available that is lower than the maximum
--- allowed. The panel may flicker if the clock rate is
--- slower than the recommended minimum.
---
---config FB_ARMCLCD_AUO_A070VW01_WIDE
--- bool "AU Optronics A070VW01 LCD 7.0\" WIDE"
--- help
--- This is an implementation of the AU Optronics, a 7.0"
--- WIDE Color. The native resolution is 234x480.
---
---config FB_ARMCLCD_HITACHI
--- bool "Hitachi Wide Screen 800x480"
--- help
--- This is an implementation of the Hitachi 800x480.
---
---endchoice
---
---
config FB_ACORN
bool "Acorn VIDC support"
depends on (FB = y) && ARM && ARCH_ACORN
Say Y if you have a NetWinder or a graphics card containing this
device, otherwise say N.
+++ config FB_CYBER2000_DDC
+++ bool "DDC for CyberPro support"
+++ depends on FB_CYBER2000
+++ select FB_DDC
+++ default y
+++ help
+++ Say Y here if you want DDC support for your CyberPro graphics
+++ card. This is only I2C bus support, driver does not use EDID.
+++
+++ config FB_CYBER2000_I2C
+++ bool "CyberPro 2000/2010/5000 I2C support"
+++ depends on FB_CYBER2000 && I2C && ARCH_NETWINDER
+++ select I2C_ALGOBIT
+++ help
+++ Enable support for the I2C video decoder interface on the
+++ Integraphics CyberPro 20x0 and 5000 VGA chips. This is used
+++ on the Netwinder machines for the SAA7111 video capture.
+++
config FB_APOLLO
bool
depends on (FB = y) && APOLLO
select FB_SYS_IMAGEBLIT
select FB_SYS_FOPS
select FB_DEFERRED_IO
+++ select FB_BACKLIGHT
select SH_MIPI_DSI if SH_LCD_MIPI_DSI
---help---
Frame buffer driver for the on-chip SH-Mobile LCD controller.
help
Framebuffer support for the JZ4740 SoC.
+++config FB_PUV3_UNIGFX
+++ tristate "PKUnity v3 Unigfx framebuffer support"
+++ depends on FB && UNICORE32 && ARCH_PUV3
+++ select FB_SYS_FILLRECT
+++ select FB_SYS_COPYAREA
+++ select FB_SYS_IMAGEBLIT
+++ select FB_SYS_FOPS
+++ help
+++ Choose this option if you want to use the Unigfx device as a
+++ framebuffer device. Without the support of PCI & AGP.
+++
source "drivers/video/omap/Kconfig"
source "drivers/video/omap2/Kconfig"
git.openpandora.org / pandora-kernel.git / commitdiff