Merge branch 'docs/docbook/drm' of git://github.com/mfwitten/linux into docs-move

diff --combined drivers/gpu/drm/i915/i915_drv.c
index cc531bb,acf4ea8..e9c2cfe
--- 1/drivers/gpu/drm/i915/i915_drv.c
--- 2/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@@ -35,7 -35,6 +35,7 @@@
  #include "intel_drv.h"
  
  #include <linux/console.h>
 +#include <linux/module.h>
  #include "drm_crtc_helper.h"
  
  static int i915_modeset __read_mostly = -1;
@@@ -68,11 -67,11 +68,11 @@@ module_param_named(i915_enable_rc6, i91
  MODULE_PARM_DESC(i915_enable_rc6,
                "Enable power-saving render C-state 6 (default: true)");
  
 -unsigned int i915_enable_fbc __read_mostly = 1;
 +unsigned int i915_enable_fbc __read_mostly = -1;
  module_param_named(i915_enable_fbc, i915_enable_fbc, int, 0600);
  MODULE_PARM_DESC(i915_enable_fbc,
                "Enable frame buffer compression for power savings "
 -              "(default: false)");
 +              "(default: -1 (use per-chip default))");
  
  unsigned int i915_lvds_downclock __read_mostly = 0;
  module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);
@@@ -80,11 -79,11 +80,11 @@@ MODULE_PARM_DESC(lvds_downclock
                "Use panel (LVDS/eDP) downclocking for power savings "
                "(default: false)");
  
 -unsigned int i915_panel_use_ssc __read_mostly = 1;
 +unsigned int i915_panel_use_ssc __read_mostly = -1;
  module_param_named(lvds_use_ssc, i915_panel_use_ssc, int, 0600);
  MODULE_PARM_DESC(lvds_use_ssc,
                "Use Spread Spectrum Clock with panels [LVDS/eDP] "
 -              "(default: true)");
 +              "(default: auto from VBT)");
  
  int i915_vbt_sdvo_panel_type __read_mostly = -1;
  module_param_named(vbt_sdvo_panel_type, i915_vbt_sdvo_panel_type, int, 0600);
@@@ -295,7 -294,7 +295,7 @@@ MODULE_DEVICE_TABLE(pci, pciidlist)
  #define INTEL_PCH_CPT_DEVICE_ID_TYPE  0x1c00
  #define INTEL_PCH_PPT_DEVICE_ID_TYPE  0x1e00
  
 -void intel_detect_pch (struct drm_device *dev)
 +void intel_detect_pch(struct drm_device *dev)
  {
        struct drm_i915_private *dev_priv = dev->dev_private;
        struct pci_dev *pch;
@@@ -378,7 -377,7 +378,7 @@@ void gen6_gt_force_wake_put(struct drm_
  
  void __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv)
  {
 -      if (dev_priv->gt_fifo_count < GT_FIFO_NUM_RESERVED_ENTRIES ) {
 +      if (dev_priv->gt_fifo_count < GT_FIFO_NUM_RESERVED_ENTRIES) {
                int loop = 500;
                u32 fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
                while (fifo <= GT_FIFO_NUM_RESERVED_ENTRIES && loop--) {
@@@ -472,9 -471,6 +472,9 @@@ static int i915_drm_thaw(struct drm_dev
                error = i915_gem_init_ringbuffer(dev);
                mutex_unlock(&dev->struct_mutex);
  
 +              if (HAS_PCH_SPLIT(dev))
 +                      ironlake_init_pch_refclk(dev);
 +
                drm_mode_config_reset(dev);
                drm_irq_install(dev);
  
@@@ -774,12 -770,12 +774,12 @@@ static int i915_pm_poweroff(struct devi
  }
  
  static const struct dev_pm_ops i915_pm_ops = {
 -     .suspend = i915_pm_suspend,
 -     .resume = i915_pm_resume,
 -     .freeze = i915_pm_freeze,
 -     .thaw = i915_pm_thaw,
 -     .poweroff = i915_pm_poweroff,
 -     .restore = i915_pm_resume,
 +      .suspend = i915_pm_suspend,
 +      .resume = i915_pm_resume,
 +      .freeze = i915_pm_freeze,
 +      .thaw = i915_pm_thaw,
 +      .poweroff = i915_pm_poweroff,
 +      .restore = i915_pm_resume,
  };
  
  static struct vm_operations_struct i915_gem_vm_ops = {
@@@ -789,8 -785,8 +789,8 @@@
  };
  
  static struct drm_driver driver = {
-       /* don't use mtrr's here, the Xserver or user space app should
-        * deal with them for intel hardware.
+       /* Don't use MTRRs here; the Xserver or userspace app should
+        * deal with them for Intel hardware.
         */
        .driver_features =
            DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | /* DRIVER_USE_MTRR |*/
@@@ -899,43 -895,3 +899,43 @@@ module_exit(i915_exit)
  MODULE_AUTHOR(DRIVER_AUTHOR);
  MODULE_DESCRIPTION(DRIVER_DESC);
  MODULE_LICENSE("GPL and additional rights");
 +
 +/* We give fast paths for the really cool registers */
 +#define NEEDS_FORCE_WAKE(dev_priv, reg) \
 +      (((dev_priv)->info->gen >= 6) && \
 +      ((reg) < 0x40000) && \
 +      ((reg) != FORCEWAKE))
 +
 +#define __i915_read(x, y) \
 +u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \
 +      u##x val = 0; \
 +      if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
 +              gen6_gt_force_wake_get(dev_priv); \
 +              val = read##y(dev_priv->regs + reg); \
 +              gen6_gt_force_wake_put(dev_priv); \
 +      } else { \
 +              val = read##y(dev_priv->regs + reg); \
 +      } \
 +      trace_i915_reg_rw(false, reg, val, sizeof(val)); \
 +      return val; \
 +}
 +
 +__i915_read(8, b)
 +__i915_read(16, w)
 +__i915_read(32, l)
 +__i915_read(64, q)
 +#undef __i915_read
 +
 +#define __i915_write(x, y) \
 +void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val) { \
 +      trace_i915_reg_rw(true, reg, val, sizeof(val)); \
 +      if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
 +              __gen6_gt_wait_for_fifo(dev_priv); \
 +      } \
 +      write##y(val, dev_priv->regs + reg); \
 +}
 +__i915_write(8, b)
 +__i915_write(16, w)
 +__i915_write(32, l)
 +__i915_write(64, q)
 +#undef __i915_write